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21 条记录 (耗时 0.039 秒)

    Integrated circuit assembly having vented heat-spreader
    12.
    发明授权
    Integrated circuit assembly having vented heat-spreader 有权
    具有通风散热器的集成电路组件

    公开(公告)号：US08258013B1

    公开(公告)日：2012-09-04

    申请号：US12705441

    申请日：2010-02-12

    申请人： Kumar Nagarajan ,  S. Gabriel R. Dosdos ,  Dong W. Kim ,  Kong W. Lee

    发明人： Kumar Nagarajan ,  S. Gabriel R. Dosdos ,  Dong W. Kim ,  Kong W. Lee

    IPC分类号： H01L23/10 ,  H01L21/00

    CPC分类号： H01L23/564 ,  H01L23/3128 ,  H01L23/3733 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/10253 ,  H01L2924/00

    摘要： An integrated circuit package assembly includes a substrate, a semiconductor die having opposing first and second surfaces, and a head-spreader. The semiconductor die is mounted on the substrate with the first surface facing the substrate. The heat-spreader includes a central region thermally coupled to the second surface of the semiconductor die, a flange region mounted on the substrate, and a side wall region between the central and flange regions. A cavity is formed between the heat-spreader, the substrate, and the semiconductor die. The heat-spreader has at least one vent extending from the cavity through the heat-spreader.

    摘要翻译： 集成电路封装组件包括衬底，具有相对的第一表面和第二表面的半导体管芯，以及头戴式撒布机。 半导体管芯安装在衬底上，第一表面面向衬底。 散热器包括热耦合到半导体管芯的第二表面的中心区域，安装在基板上的凸缘区域和中心区域和凸缘区域之间的侧壁区域。 在散热器，基板和半导体管芯之间形成空腔。 散热器具有至少一个从空腔延伸通过散热器的通风口。

    LEAD-FREE STRUCTURES IN A SEMICONDUCTOR DEVICE
    13.
    发明申请
    LEAD-FREE STRUCTURES IN A SEMICONDUCTOR DEVICE 有权
    半导体器件中的无铅结构

    公开(公告)号：US20120098130A1

    公开(公告)日：2012-04-26

    申请号：US12912519

    申请日：2010-10-26

    申请人： Laurene Yip ,  Leilei Zhang ,  Kumar Nagarajan

    发明人： Laurene Yip ,  Leilei Zhang ,  Kumar Nagarajan

    IPC分类号： H01L23/488 ,  H01L21/60

    CPC分类号： H01L23/49866 ,  H01L23/49811 ,  H01L23/49822 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/00014

    摘要： A semiconductor device includes a semiconductor die and lead-free solder bumps disposed on a surface of the semiconductor die. A substrate includes metal layers and dielectric layers. One of the metal layers includes contact pads corresponding to lead-free solder bumps, and one of the dielectric layers is an exterior dielectric layer having respective openings for the contact pad. Respective copper posts are disposed on the contact pads. The respective copper post for each contact pad extends from the contact pad through the respective opening for the contact pad. The semiconductor die is mounted on the substrate with connections between the lead-free solder bumps and the copper posts.

    摘要翻译： 半导体器件包括设置在半导体管芯的表面上的半导体管芯和无铅焊料凸点。 衬底包括金属层和电介质层。 金属层中的一个包括与无铅焊料凸块相对应的接触焊盘，并且一个电介质层是具有用于接触焊盘的相应开口的外部电介质层。 各个铜柱设置在接触垫上。 每个接触焊盘的相应铜柱从接触焊盘延伸穿过用于接触焊盘的相应开口。 半导体管芯安装在衬底上，无铅焊料凸点和铜柱之间有连接。

    Overmold integrated circuit package
    14.
    发明授权
    Overmold integrated circuit package 有权
    封装集成电路封装

    公开(公告)号：US06519844B1

    公开(公告)日：2003-02-18

    申请号：US09940130

    申请日：2001-08-27

    申请人： Kumar Nagarajan ,  Seng Sooi Lim ,  Chok J. Chia

    发明人： Kumar Nagarajan ,  Seng Sooi Lim ,  Chok J. Chia

    IPC分类号： H05K330

    CPC分类号： H01L24/32 ,  H01L23/13 ,  H01L23/3128 ,  H01L2224/16225 ,  H01L2224/27013 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83051 ,  H01L2224/83385 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01075 ,  H01L2924/01082 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  Y10T29/49144 ,  Y10T29/49146 ,  H01L2924/00

    摘要： An integrated circuit package manufacturing process is described which reduces or eliminates the formation of voids in a molding compound between a die and an underlying substrate. The process includes providing the substrate, which has an upper surface and an air space above the upper surface. Electrically conductive vias are formed through the upper surface of the substrate which extend at least partially through the substrate, and fluid communication is provided between the vias and the overlying air space. The process includes attaching the integrated circuit die to the upper surface of the substrate over at least a portion of the vias, while leaving a gap between the die and the upper surface of the substrate. The process further includes flowing the molding compound into the gap between the die and the upper surface of the substrate while maintaining fluid communication between the vias and the air space. In this manner, air trapped between the molding compound and the upper surface of the substrate is urged to flow into the vias rather than forming a void in the molding compound. Fluid communication between the plurality of vias and the air space may be provided by not tenting the vias with a solder mask layer, or by removing any solder mask or other material which may have filled or tented over the vias during processing of the substrate.

    摘要翻译： 描述了一种集成电路封装制造工艺，其减少或消除了在管芯和下层衬底之间的模塑料中形成空隙。 该方法包括提供在上表面上方具有上表面和空气空间的基底。 导电孔通过衬底的上表面形成，其至少部分延伸通过衬底，并且在通孔和上覆空气空间之间提供流体连通。 该过程包括在集成电路管芯的至少一部分通孔之上附接集成电路管芯到衬底的上表面，同时在管芯和衬底的上表面之间留下间隙。 该方法还包括使模塑料流动到模具和衬底的上表面之间的间隙中，同时保持通孔和空气空间之间的流体连通。 以这种方式，被迫在模塑料和衬底的上表面之间被捕获的空气被迫流入通孔，而不是在模塑料中形成空隙。 多个通孔和空气空间之间的流体连通可以通过不用通孔焊接掩模层来提供，或者通过在衬底的处理期间移除可能已经填充或覆盖过孔的任何焊接掩模或其他材料来提供。

    Semiconductor structure and method for interconnection of integrated circuits
    16.
    发明授权
    Semiconductor structure and method for interconnection of integrated circuits 有权
    集成电路互连的半导体结构和方法

    公开(公告)号：US08519528B1

    公开(公告)日：2013-08-27

    申请号：US13159338

    申请日：2011-06-13

    申请人： Kumar Nagarajan ,  Raghunandan Chaware

    发明人： Kumar Nagarajan ,  Raghunandan Chaware

    IPC分类号： H01L23/04

    CPC分类号： H01L23/49827 ,  H01L23/147 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01L2924/3511

    摘要： In one embodiment, an interposer resistant to warping is provided. The interposer includes a semiconductor body having a first contact array included on a first side of the semiconductor body. Vias are formed through the semiconductor body. One or more wiring layers are included on the first side of the semiconductor body. The wiring layers electrically couple each contact of the first contact array to a respective one of the vias. Contacts of a second contact array, included on a second side of the semiconductor body, are respectively coupled to the vias. A stabilization layer is included on the second side of the semiconductor body. The stabilization layer is configured to counteract stresses exerted on a front side of the interposer due to thermal expansion of wiring layers.

    摘要翻译： 在一个实施例中，提供了耐弯曲的插入件。 插入器包括具有包括在半导体本体的第一侧上的第一接触阵列的半导体本体。 通孔通过半导体体形成。 一个或多个布线层包括在半导体本体的第一侧上。 布线层将第一接触阵列的每个接触件电耦合到相应的一个通孔。 包括在半导体主体的第二侧上的第二接触阵列的触点分别耦合到通孔。 半导体本体的第二面上包含稳定层。 稳定层被配置为抵消由于布线层的热膨胀而施加在插入件的前侧上的应力。

    Lead-free structures in a semiconductor device
    17.
    发明授权
    Lead-free structures in a semiconductor device 有权
    半导体器件中的无铅结构

    公开(公告)号：US08410604B2

    公开(公告)日：2013-04-02

    申请号：US12912519

    申请日：2010-10-26

    申请人： Laurene Yip ,  Leilei Zhang ,  Kumar Nagarajan

    发明人： Laurene Yip ,  Leilei Zhang ,  Kumar Nagarajan

    IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/44 ,  H01L21/00

    CPC分类号： H01L23/49866 ,  H01L23/49811 ,  H01L23/49822 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/056 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2924/00014

    摘要： A semiconductor device includes a semiconductor die and a plurality of lead-free solder bumps disposed on a surface of the semiconductor die. A substrate includes a plurality of metal layers and a plurality of dielectric layers. One of the metal layers includes a plurality of contact pads corresponding to the plurality of lead-free solder bumps, and one of the dielectric layers is an exterior dielectric layer having a plurality of respective openings for the contact pad. A plurality of respective copper posts is disposed on the contact pads. The respective copper post for each contact pad extends from the contact pad through the respective opening for the contact pad. The semiconductor die is mounted on the substrate with connections between the plurality of lead-free solder bumps and the plurality of copper posts.

    摘要翻译： 半导体器件包括半导体管芯和设置在半导体管芯的表面上的多个无铅焊料凸点。 衬底包括多个金属层和多个电介质层。 金属层中的一个包括与多个无铅焊料凸块相对应的多个接触焊盘，并且一个电介质层是具有用于接触焊盘的多个相应开口的外部电介质层。 多个相应的铜柱设置在接触垫上。 每个接触焊盘的相应铜柱从接触焊盘延伸穿过用于接触焊盘的相应开口。 半导体管芯通过多个无铅焊料凸点和多个铜柱之间的连接安装在基板上。