中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

52 records (took 0.021 seconds)

    Semiconductor device structures
    14.
    发明授权
    Semiconductor device structures 有权
    半导体器件结构

    公开(公告)号：US09142504B2

    公开(公告)日：2015-09-22

    申请号：US14457658

    申请日：2014-08-12

    Applicant: Micron Technology, Inc.

    Inventor： Adam L. Olson ,  Kaveri Jain ,  Lijing Gou ,  William R. Brown ,  Ho Seop Eom ,  Xue Chen ,  Anton J. deVilliers

    IPC: H01L29/06 ,  H01L23/52 ,  H01L21/467 ,  H01L21/768 ,  H01L21/027

    CPC classification number: H01L23/528 ,  H01L21/0226 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/441 ,  H01L21/467 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/52 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Methods of forming features are disclosed. One method comprises forming a resist over a pool of acidic or basic material on a substrate structure, selectively exposing the resist to an energy source to form exposed resist portions and non-exposed resist portions, and diffusing acid or base of the acidic or basic material from the pool into proximal portions of the resist. Another method comprises forming a plurality of recesses in a substrate structure. The plurality of recesses are filled with a pool material comprising acid or base. A resist is formed over the pool material and the substrate structure and acid or base is diffused into adjacent portions of the resist. The resist is patterned to form openings in the resist. The openings comprise wider portions distal to the substrate structure and narrower portions proximal to the substrate structure. Additional methods and semiconductor device structures including the features are disclosed.

    Abstract translation: 公开了形成特征的方法。 一种方法包括在衬底结构上的酸性或碱性材料池上形成抗蚀剂，选择性地将抗蚀剂暴露于能量源以形成暴露的抗蚀剂部分和未曝光的抗蚀剂部分，以及将酸性或碱性材料的酸或碱扩散 从池中到抗蚀剂的近端部分。 另一种方法包括在衬底结构中形成多个凹陷。 多个凹部填充有包含酸或碱的池材料。 在池材料上形成抗蚀剂，并且衬底结构和酸或碱扩散到抗蚀剂的相邻部分。 抗蚀剂被图案化以在抗蚀剂中形成开口。 开口包括远离衬底结构的较宽部分和靠近衬底结构的较窄部分。 公开了包括这些特征的附加方法和半导体器件结构。

    METHODS OF FORMING FEATURES IN SEMICONDUCTOR DEVICE STRUCTURES
    15.
    发明申请
    METHODS OF FORMING FEATURES IN SEMICONDUCTOR DEVICE STRUCTURES 有权
    在半导体器件结构中形成特征的方法

    公开(公告)号：US20140145311A1

    公开(公告)日：2014-05-29

    申请号：US13687419

    申请日：2012-11-28

    Applicant: MICRON TECHNOLOGY, INC.

    Inventor： Adam L. Olson ,  Kaveri Jain ,  Lijing Gou ,  William R. Brown ,  Ho Seop Eom ,  Xue Chen ,  Anton J. deVilliers

    IPC: H01L21/467 ,  H01L23/00 ,  H01L21/441

    CPC classification number: H01L23/528 ,  H01L21/0226 ,  H01L21/0273 ,  H01L21/0274 ,  H01L21/3085 ,  H01L21/3086 ,  H01L21/441 ,  H01L21/467 ,  H01L21/76804 ,  H01L21/76816 ,  H01L21/76877 ,  H01L21/76885 ,  H01L23/52 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Methods of forming features are disclosed. One method comprises forming a resist over a pool of acidic or basic material on a substrate structure, selectively exposing the resist to an energy source to form exposed resist portions and non-exposed resist portions, and diffusing acid or base of the acidic or basic material from the pool into proximal portions of the resist. Another method comprises forming a plurality of recesses in a substrate structure. The plurality of recesses are filled with a pool material comprising acid or base. A resist is formed over the pool material and the substrate structure and acid or base is diffused into adjacent portions of the resist. The resist is patterned to form openings in the resist. The openings comprise wider portions distal to the substrate structure and narrower portions proximal to the substrate structure. Additional methods and semiconductor device structures including the features are disclosed.

    Abstract translation: 公开了形成特征的方法。 一种方法包括在衬底结构上的酸性或碱性材料池上形成抗蚀剂，选择性地将抗蚀剂暴露于能量源以形成暴露的抗蚀剂部分和未曝光的抗蚀剂部分，以及将酸性或碱性材料的酸或碱扩散 从池中到抗蚀剂的近端部分。 另一种方法包括在衬底结构中形成多个凹陷。 多个凹部填充有包含酸或碱的池材料。 在池材料上形成抗蚀剂，并且衬底结构和酸或碱扩散到抗蚀剂的相邻部分。 抗蚀剂被图案化以在抗蚀剂中形成开口。 开口包括远离衬底结构的较宽部分和靠近衬底结构的较窄部分。 公开了包括这些特征的附加方法和半导体器件结构。

    Methods of forming microelectronic devices, and related microelectronic devices, and electronic systems
    16.
    发明授权
    Methods of forming microelectronic devices, and related microelectronic devices, and electronic systems 有权

    公开(公告)号：US11282747B2

    公开(公告)日：2022-03-22

    申请号：US16799254

    申请日：2020-02-24

    Applicant: Micron Technology, Inc.

    Inventor： Bo Zhao ,  Nancy M. Lomeli ,  Lifang Xu ,  Adam L. Olson

    IPC: H01L27/00 ,  H01L21/8229 ,  H01L21/768 ,  H01L27/11573 ,  H01L27/1157 ,  H01L27/11578

    Abstract: A microelectronic device comprises a microelectronic device structure having a memory array region and a staircase region. The microelectronic device structure comprises a stack structure having tiers each comprising a conductive structure and an insulative structure; staircase structures confined within the staircase region and having steps comprising edges of the tiers of the stack structure within the deck and the additional deck; and semiconductive pillar structures confined within the memory array region and extending through the stack structures. The stack structure comprises a deck comprising a group of the tiers; an additional deck overlying the deck and comprising an additional group of the tiers; and an interdeck section between the deck and the additional deck and comprising a dielectric structure confined within the memory array region, and another group of the tiers within vertical boundaries of the dielectric structure and confined within the staircase region.

    SEMICONDUCTOR DEVICES COMPRISING STEPS
    17.
    发明申请
    SEMICONDUCTOR DEVICES COMPRISING STEPS 有权

    公开(公告)号：US20210407930A1

    公开(公告)日：2021-12-30

    申请号：US17447618

    申请日：2021-09-14

    Applicant: Micron Technology, Inc.

    Inventor： Rohit Kothari ,  Adam L. Olson ,  John D. Hopkins ,  Jeslin J. Wu

    IPC: H01L23/00 ,  H01L21/762 ,  H01L21/3105 ,  H01L21/311

    Abstract: A method of forming a semiconductor device comprising forming a patterned resist over a stack comprising at least one material and removing a portion of the stack exposed through the patterned resist to form a stack opening. A portion of the patterned resist is laterally removed to form a trimmed resist and an additional portion of the stack exposed through the trimmed resist is removed to form steps in sidewalls of the stack. A dielectric material is formed between the sidewalls of the stack to substantially completely fill the stack opening, and the dielectric material is planarized. Additional methods are disclosed, as well as semiconductor devices.

    METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED MICROELECTRONIC DEVICES, AND ELECTRONIC SYSTEMS
    18.
    发明申请
    METHODS OF FORMING MICROELECTRONIC DEVICES, AND RELATED MICROELECTRONIC DEVICES, AND ELECTRONIC SYSTEMS 有权

    公开(公告)号：US20210265216A1

    公开(公告)日：2021-08-26

    申请号：US16799254

    申请日：2020-02-24

    Applicant: Micron Technology, Inc.

    Inventor： Bo Zhao ,  Nancy M. Lomeli ,  Lifang Xu ,  Adam L. Olson

    IPC: H01L21/8229 ,  H01L21/768

    Abstract: A microelectronic device comprises a microelectronic device structure having a memory array region and a staircase region. The microelectronic device structure comprises a stack structure having tiers each comprising a conductive structure and an insulative structure; staircase structures confined within the staircase region and having steps comprising edges of the tiers of the stack structure within the deck and the additional deck; and semiconductive pillar structures confined within the memory array region and extending through the stack structures. The stack structure comprises a deck comprising a group of the tiers; an additional deck overlying the deck and comprising an additional group of the tiers; and an interdeck section between the deck and the additional deck and comprising a dielectric structure confined within the memory array region, and another group of the tiers within vertical boundaries of the dielectric structure and confined within of the staircase region.

    Methods of forming staircase structures
    20.
    发明授权
    Methods of forming staircase structures 有权

    公开(公告)号：US10600796B2

    公开(公告)日：2020-03-24

    申请号：US15624422

    申请日：2017-06-15

    Applicant: Micron Technology, Inc.

    Inventor： Rohit Kothari ,  Jason C. McFarland ,  Jason Reece ,  David A. Kewley ,  Adam L. Olson

    IPC: H01L21/3213 ,  H01L27/11556 ,  H01L21/311 ,  H01L27/11582 ,  G03F7/00

    Abstract: Methods of improving adhesion between a photoresist and conductive or insulating structures. The method comprises forming a slot through at least a portion of alternating conductive structures and insulating structures on a substrate. Portions of the conductive structures or of the insulating structures are removed to form recesses in the conductive structures or in the insulating structures. A photoresist is formed over the alternating conductive structures and insulating structures and within the slot. Methods of improving adhesion between a photoresist and a spin-on dielectric material are also disclosed, as well as methods of forming a staircase structure.

Patent Agency Ranking