Dynamically boosting read voltage for a memory device

    公开(公告)号:US12205641B2

    公开(公告)日:2025-01-21

    申请号:US17834702

    申请日:2022-06-07

    Abstract: Systems, methods, and apparatus related to dynamically determining read voltages used in memory devices. In one approach, a memory device has a memory array including memory cells. One or more resistors are formed as part of the memory array. A memory controller increments a counter as write operations are performed on the memory cells. When the counter reaches a limit, a write operation is performed on the resistors. The write operation applies voltages to the resistors similarly as applied to the memory cells over time during normal operation. When performing a read operation, a current is applied to one or more of the resistors to determine a boost voltage. When reading the memory cells, a read voltage is adjusted based on the boost voltage. The memory cells are read using the adjusted read voltage.

    DYNAMICALLY BOOSTING READ VOLTAGE FOR A MEMORY DEVICE

    公开(公告)号:US20220301623A1

    公开(公告)日:2022-09-22

    申请号:US17834702

    申请日:2022-06-07

    Abstract: Systems, methods, and apparatus related to dynamically determining read voltages used in memory devices. In one approach, a memory device has a memory array including memory cells. One or more resistors are formed as part of the memory array. A memory controller increments a counter as write operations are performed on the memory cells. When the counter reaches a limit, a write operation is performed on the resistors. The write operation applies voltages to the resistors similarly as applied to the memory cells over time during normal operation. When performing a read operation, a current is applied to one or more of the resistors to determine a boost voltage. When reading the memory cells, a read voltage is adjusted based on the boost voltage. The memory cells are read using the adjusted read voltage.

    DYNAMIC ADJUSTMENT OF THRESHOLD VOLTAGE OFFSETS FOR WORDLINE GROUPS

    公开(公告)号:US20240427500A1

    公开(公告)日:2024-12-26

    申请号:US18733350

    申请日:2024-06-04

    Abstract: A system includes a memory device and a processing device, operatively coupled with the memory device, to perform operations including: receiving a request to perform a read operation on a set of memory cells of the memory device; identifying a wordline group coupled to the set of memory cells of the memory device; identifying a threshold voltage offset bin associated with the set of memory cells; determining a current temperature associated with the set of memory cells; determining, based on the threshold voltage offset bin and the current temperature, a read mask identifier associated with the set of memory cells; determining, based on the read mask identifier and the wordline group, a set of threshold voltage offsets associated with the set of memory cells; and performing the read operation using the set of threshold voltage offsets.

Patent Agency Ranking