公开(公告)号：US20140162455A1

公开(公告)日：2014-06-12

申请号：US13712635

申请日：2012-12-12

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Andrew Dennis Watson Carswell ,  Wayne Hai-Wei Huang ,  Siddartha Kondoju ,  Jin Lu ,  Suresh Ramakrishnan ,  Kozaburo Sakai ,  Sony Varghese ,  Andrey V. Zagrebelny

IPC: H01L21/306

CPC classification number: H01L21/30625 ,  H01L21/31053 ,  H01L21/31058 ,  H01L21/32125

Abstract: A method of forming a planar surface for a semiconductor device structure. The method comprises forming a particle film comprising a plurality of discrete particles on a non-planar surface of a semiconductor device structure. The semiconductor device structure is subjected to at least one chemical-mechanical polishing process after forming the particle film on the non-planar surface of the semiconductor device structure. Methods of forming a semiconductor device structure are also described.

Abstract translation: 一种形成半导体器件结构的平面的方法。 该方法包括在半导体器件结构的非平面表面上形成包含多个离散粒子的粒子膜。 半导体器件结构在半导体器件结构的非平面表面上形成颗粒膜之后经历至少一个化学机械抛光工艺。 还描述了形成半导体器件结构的方法。

公开(公告)号：US20240297068A1

公开(公告)日：2024-09-05

申请号：US18663364

申请日：2024-05-14

Applicant: Micron Technology, Inc.

Inventor： Gurtej S. Sandhu ,  Sony Varghese ,  John A. Smythe ,  Hyun Sik Kim

IPC: H01L21/762 ,  B29C35/08 ,  B29C41/08 ,  B29K83/00 ,  B32B3/26 ,  H01L21/02 ,  H01L21/288 ,  H01L21/32 ,  H01L21/67 ,  H01L21/768

CPC classification number: H01L21/7624 ,  B29C41/08 ,  H01L21/02216 ,  H01L21/02222 ,  H01L21/0226 ,  H01L21/02288 ,  H01L21/02631 ,  H01L21/288 ,  H01L21/76232 ,  H01L21/76837 ,  H01L21/76877 ,  B29C2035/0827 ,  B29K2083/00 ,  B32B3/266 ,  H01L21/32 ,  H01L21/6715

Abstract: Some embodiments include a construction having a horizontally-extending layer of fluorocarbon material over a semiconductor construction. Some embodiments include methods of filling openings that extend into a semiconductor construction. The methods may include, for example, printing the material into the openings or pressing the material into the openings. The construction may be treated so that surfaces within the openings adhere the material provided within the openings while surfaces external of the openings do not adhere the material. In some embodiments, the surfaces external of the openings are treated to reduce adhesion of the material.

公开(公告)号：US12020979B2

公开(公告)日：2024-06-25

申请号：US17224003

申请日：2021-04-06

Applicant: Micron Technology, Inc.

Inventor： Gurtej S. Sandhu ,  Sony Varghese ,  John A. Smythe ,  Hyun Sik Kim

IPC: H01L21/762 ,  B29C41/08 ,  H01L21/02 ,  H01L21/288 ,  H01L21/32 ,  H01L21/67 ,  H01L21/768 ,  B29C35/08 ,  B29K83/00 ,  B32B3/26

CPC classification number: H01L21/7624 ,  B29C41/08 ,  H01L21/02216 ,  H01L21/02222 ,  H01L21/0226 ,  H01L21/02288 ,  H01L21/02631 ,  H01L21/288 ,  H01L21/76232 ,  H01L21/76837 ,  H01L21/76877 ,  B29C2035/0827 ,  B29K2083/00 ,  B32B3/266 ,  H01L21/32 ,  H01L21/6715

Abstract: Some embodiments include a construction having a horizontally-extending layer of fluorocarbon material over a semiconductor construction. Some embodiments include methods of filling openings that extend into a semiconductor construction. The methods may include, for example, printing the material into the openings or pressing the material into the openings. The construction may be treated so that surfaces within the openings adhere the material provided within the openings while surfaces external of the openings do not adhere the material. In some embodiments, the surfaces external of the openings are treated to reduce adhesion of the material.

公开(公告)号：US20190067084A1

公开(公告)日：2019-02-28

申请号：US16179415

申请日：2018-11-02

Applicant: Micron Technology, Inc.

Inventor： Gurtej S. Sandhu ,  Scott L. Light ,  John A. Smythe ,  Sony Varghese

IPC: H01L21/762 ,  G03F7/30 ,  G03F7/039 ,  G03F7/038 ,  G03F7/075 ,  H01L29/06 ,  H01L21/02 ,  H01L21/3105 ,  G03F7/20

Abstract: Some embodiments include a semiconductor construction which has one or more openings extending into a substrate. The openings are at least partially filled with dielectric material comprising silicon, oxygen and carbon. The carbon is present to a concentration within a range of from about 3 atomic percent to about 20 atomic percent. Some embodiments include a method of providing dielectric fill across a semiconductor construction having an opening extending therein. The semiconductor construction has an upper surface proximate the opening. The method includes forming photopatternable dielectric material within the opening and across the upper surface, and exposing the photopatternable dielectric material to patterned actinic radiation. Subsequently, the photopatternable dielectric material is developed to pattern the photopatternable dielectric material into a first dielectric structure which at least partially fills the opening, and to remove the photopatternable dielectric material from over the upper surface.

公开(公告)号：US10103134B2

公开(公告)日：2018-10-16

申请号：US15728123

申请日：2017-10-09

Applicant: Micron Technology, Inc.

Inventor： Wei Zhou ,  Aibin Yu ,  Zhaohui Ma ,  Sony Varghese ,  Jonathan S. Hacker ,  Bret K. Street ,  Shijian Luo

IPC: H01L29/40 ,  H01L25/18 ,  H01L21/56 ,  H01L25/00 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L21/683 ,  H01L21/78 ,  H01L23/544

Abstract: Methods of making semiconductor device packages may involve attaching a first semiconductor die to a carrier wafer, an inactive surface of the first semiconductor die facing the carrier wafer. One or more additional semiconductor die may be stacked on the first semiconductor die on a side of the first semiconductor die opposite the carrier wafer to form a stack of semiconductor dice. A protective material may be positioned over the stack of semiconductor dice, a portion of the protective material extending along side surfaces of the first semiconductor die to a location proximate the inactive surface of the first semiconductor die. The carrier wafer may be detached from the first semiconductor die.

公开(公告)号：US20160225723A1

公开(公告)日：2016-08-04

申请号：US14609272

申请日：2015-01-29

Applicant: Micron Technology, Inc.

Inventor： Ahmed H. Abdelnaby ,  Sony Varghese

IPC: H01L23/00 ,  H01L21/683 ,  H01L21/48

CPC classification number: H01L23/562 ,  H01L21/304 ,  H01L21/568 ,  H01L21/6835 ,  H01L2221/68327 ,  H01L2224/80

Abstract: Apparatuses and methods for reducing the warp of semiconductor wafer stacks during manufacturing are disclosed. An engineered carrier wafer is disclosed. The engineered carrier wafer may be pre-stressed such that it exhibits a warp. The warp may be configured to counteract a warp of a device wafer included in the wafer stack. The overall warp of the wafer stack may be reduced.

Abstract translation: 公开了用于在制造期间减少半导体晶片堆叠的翘曲的装置和方法。 公开了一种工程载体晶片。 工程载体晶片可以预应力使其呈现翘曲。 翘曲可以被配置为抵消包括在晶片堆叠中的器件晶片的翘曲。 可以减小晶片堆叠的整体翘曲。

公开(公告)号：US09153451B2

公开(公告)日：2015-10-06

申请号：US13712635

申请日：2012-12-12

Applicant: Micron Technology, Inc.

Inventor： Andrew Dennis Watson Carswell ,  Wayne Hai-Wei Huang ,  Siddartha Kondoju ,  Jin Lu ,  Suresh Ramakrishnan ,  Kozaburo Sakai ,  Sony Varghese ,  Andrey V. Zagrebelny

IPC: H01L21/302 ,  H01L21/461 ,  H01L21/306 ,  H01L21/3105 ,  H01L21/321

CPC classification number: H01L21/30625 ,  H01L21/31053 ,  H01L21/31058 ,  H01L21/32125

Abstract: A method of forming a planar surface for a semiconductor device structure. The method comprises forming a particle film comprising a plurality of discrete particles on a non-planar surface of a semiconductor device structure. The semiconductor device structure is subjected to at least one chemical-mechanical polishing process after forming the particle film on the non-planar surface of the semiconductor device structure. Methods of forming a semiconductor device structure are also described.

Abstract translation: 一种形成半导体器件结构的平面的方法。 该方法包括在半导体器件结构的非平面表面上形成包含多个离散粒子的粒子膜。 半导体器件结构在半导体器件结构的非平面表面上形成颗粒膜之后经历至少一个化学机械抛光工艺。 还描述了形成半导体器件结构的方法。

公开(公告)号：US10763155B2

公开(公告)日：2020-09-01

申请号：US16179415

申请日：2018-11-02

Applicant: Micron Technology, Inc.

Inventor： Gurtej S. Sandhu ,  Scott L. Light ,  John A. Smythe ,  Sony Varghese

IPC: H01L21/70 ,  H01L21/762 ,  H01L21/02 ,  H01L21/3105 ,  H01L29/06 ,  G03F7/075 ,  G03F7/038 ,  G03F7/039 ,  G03F7/20 ,  G03F7/30 ,  G03F7/023 ,  H01L21/311

Abstract: Some embodiments include a semiconductor construction which has one or more openings extending into a substrate. The openings are at least partially filled with dielectric material comprising silicon, oxygen and carbon. The carbon is present to a concentration within a range of from about 3 atomic percent to about 20 atomic percent. Some embodiments include a method of providing dielectric fill across a semiconductor construction having an opening extending therein. The semiconductor construction has an upper surface proximate the opening. The method includes forming photopatternable dielectric material within the opening and across the upper surface, and exposing the photopatternable dielectric material to patterned actinic radiation. Subsequently, the photopatternable dielectric material is developed to pattern the photopatternable dielectric material into a first dielectric structure which at least partially fills the opening, and to remove the photopatternable dielectric material from over the upper surface.

公开(公告)号：US10153195B1

公开(公告)日：2018-12-11

申请号：US15598795

申请日：2017-05-18

Applicant: Micron Technology, Inc.

Inventor： Gurtej S. Sandhu ,  Scott L. Light ,  John A. Smythe ,  Sony Varghese

IPC: H01L21/70 ,  H01L21/762 ,  H01L21/02 ,  H01L21/3105 ,  H01L29/06 ,  G03F7/075 ,  G03F7/038 ,  G03F7/039 ,  G03F7/20 ,  G03F7/30

Abstract: Some embodiments include a semiconductor construction which has one or more openings extending into a substrate. The openings are at least partially filled with dielectric material comprising silicon, oxygen and carbon. The carbon is present to a concentration within a range of from about 3 atomic percent to about 20 atomic percent. Some embodiments include a method of providing dielectric fill across a semiconductor construction having an opening extending therein. The semiconductor construction has an upper surface proximate the opening. The method includes forming photopatternable dielectric material within the opening and across the upper surface, and exposing the photopatternable dielectric material to patterned actinic radiation. Subsequently, the photopatternable dielectric material is developed to pattern the photopatternable dielectric material into a first dielectric structure which at least partially fills the opening, and to remove the photopatternable dielectric material from over the upper surface.

公开(公告)号：US09761474B2

公开(公告)日：2017-09-12

申请号：US14134199

申请日：2013-12-19

Applicant: Micron Technology, Inc.

Inventor： Sony Varghese

IPC: H01L21/00 ,  H01L21/683 ,  B32B38/10 ,  H01L21/78 ,  B32B37/08 ,  B32B37/12 ,  B32B37/18

CPC classification number: H01L21/6835 ,  B32B7/14 ,  B32B37/08 ,  B32B37/12 ,  B32B37/1292 ,  B32B37/18 ,  B32B38/10 ,  B32B2309/02 ,  B32B2457/14 ,  H01L21/2007 ,  H01L21/6836 ,  H01L21/78 ,  H01L2221/68318 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68381 ,  Y10T428/265 ,  Y10T428/2848

Abstract: Methods of forming semiconductor structures include providing a polymeric material over a carrier substrate, bonding another substrate to the polymeric material, and lowering a temperature of the polymeric material to below about 15° C. to separate the another substrate from the carrier substrate. Some methods include forming a polymeric material over a first substrate, securing a second substrate to the first substrate over the polymeric material, cooling the polymeric material to a temperature below a glass transition temperature of the polymeric material, and separating the second substrate from the first substrate. Semiconductor structures may include a polymeric material over at least a portion of a first substrate, an adhesive material over the polymeric material, and a second substrate over the adhesive material. The polymeric material may have a glass transition temperature of about 10° C. or lower and a melting point of about 100° C. or greater.