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公开(公告)号：US07943509B2
公开(公告)日：2011-05-17
申请号：US12521982
申请日：2008-12-31
申请人： Roel Daamen , Robertus A. M. Wolters , Martinus P. M. Maas , Pascal Bancken , Julien M. M. Michelon
发明人： Roel Daamen , Robertus A. M. Wolters , Martinus P. M. Maas , Pascal Bancken , Julien M. M. Michelon
IPC分类号： H01L21/4763
CPC分类号： H01L21/7682 , H01L21/76808 , H01L21/76835 , H01L21/76849 , H01L21/76867 , H01L2221/1031
摘要： A damascene process is described using a copper fill process to fill a trench (12). The copper fill (20) is started with a deposited seed layer which includes (5) copper and titanium. Some titanium migrates to the surface during the copper fill process. The structure is annealed in a nitrogen atmosphere which creates a self-aligned TiN barrier (24) at the surface of the copper fill (20). Air gaps (26) may be created in the same annealing process. The process may be used to form a multilayer structure.
摘要翻译： 描述使用铜填充工艺填充沟槽（12）的镶嵌工艺。 铜填充物（20）由包括（5）铜和钛的沉积种子层开始。 在铜填充过程中，一些钛迁移到表面。 该结构在氮气氛中退火，在铜填充物（20）的表面产生自对准TiN阻挡层（24）。 可以在相同的退火过程中产生气隙（26）。 该方法可用于形成多层结构。
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12.发明申请公开(公告)号：US20100187527A1
公开(公告)日：2010-07-29
申请号：US12671067
申请日：2008-07-29
IPC分类号： H01L23/52
CPC分类号： H01L23/576 , H01L24/73 , H01L2224/48091 , H01L2224/73265 , H01L2924/09701 , H01L2924/14 , H01L2924/3011 , H01L2924/00014 , H01L2924/00
摘要： The invention relates to a tamper-resistant semiconductor device comprising a substrate (5) comprising an electronic circuit arranged on a first side thereof. An electrically-conductive protection layer (50, 50a, 50b) is arranged on a second side of the substrate (5) opposite to the first side. At least three through-substrate electrically-conductive connections (45) extend from the first side of the substrate (5) into the substrate (5) and in electrical contact with the electrically-conductive protection layer (50, 50a, 50b) on the second side of the substrate (5). A security circuit is arranged on the first side connected to the through-substrate electrically-conductive connections (45) and is arranged for measuring at least two resistance values (R12, R23, R34, R14, R13, R24) of the electrically-conductive protection layer (50, 50a, 50b) through the through-substrate electrically-conductive connections (45). The security circuit is further arranged for comparing the measured resistance values (R12, R23, R34, R14, R13, R24) with reference resistance values.
摘要翻译： 本发明涉及一种防篡改半导体器件，其包括基板（5），该基板包括布置在其第一侧上的电子电路。 导电保护层（50,50a，50b）布置在与第一侧相对的基板（5）的第二侧上。 至少三个贯穿基板的导电连接（45）从基板（5）的第一侧延伸到基板（5）中并与导电保护层（50,50a，50b）电接触 基板（5）的第二侧。 安全电路布置在与贯穿基板导电连接（45）连接的第一侧上，并且布置成用于测量导电的至少两个电阻值（R12，R23，R34，R14，R13，R24） 保护层（50,50a，50b）穿过贯通基板导电连接（45）。 安全电路还被布置为将测得的电阻值（R12，R23，R34，R14，R13，R24）与参考电阻值进行比较。
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公开(公告)号：US20090302419A1
公开(公告)日：2009-12-10
申请号：US11720322
申请日：2005-11-25
IPC分类号： H01L27/06 , H01L21/02 , H01L21/302
CPC分类号： H01L28/84 , H01L27/1087 , H01L29/66181
摘要： In the method a first layer, particularly of amorphous silicon, is deposited on the surface of a substrate with trenches. Part of this surface is covered with a protective layer. The first layer is thereafter maskless removed with a dry etching treatment on the substrate surface while it is kept within the trench.
摘要翻译： 在该方法中，特别是非晶硅的第一层被沉积在具有沟槽的衬底的表面上。 该表面的一部分被保护层覆盖。 此后，第一层通过在衬底表面上进行干蚀刻处理而被除去，同时保持在沟槽内。
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14.发明授权Method of manufacturing a semiconductor device comprising a capacitor with a ferroelectric dielectric, and semiconductor device comprising such a capacitor 失效制造包括具有铁电电介质的电容器的半导体器件的方法以及包括这种电容器的半导体器件
公开(公告)号：US5396095A
公开(公告)日：1995-03-07
申请号：US206916
申请日：1994-03-04
IPC分类号： H01G7/06 , H01L21/02 , H01L21/318 , H01L21/822 , H01L21/8246 , H01L27/04 , H01L27/105 , H01L27/115 , H01L29/49 , H01L27/02
CPC分类号： H01L27/11502 , H01L28/55 , H01L29/49 , Y10S438/909
摘要： A semiconductor device in which a capacitor (2) is provided on a surface (10) of a semiconductor body (3) with a semiconductor element (1) in which a lower electrode (11), an oxidic ferroelectric dielectric (12) and an upper electrode (13) are provided in that order, the upper electrode not covering an edge of the dielectric, after which an insulating layer (14) with superimposed metal conductor tracks is provided. According to the invention, the edge of the dielectric (12) not covered by the upper electrode (13) is coated with a coating layer (14, 20, or 30) practically imperviable to hydrogen, after which the device is heated in a hydrogen-containing atmosphere. Heating in a hydrogen atmosphere neutralizes dangling bonds which arise during deposition of the conductor tracks on the insulating layer, while the coating layer protects the dielectric from attacks by hydrogen. The semiconductor device then has a shorter access time.
摘要翻译： 一种半导体器件，其中在具有半导体元件（1）的半导体本体（3）的表面（10）上提供电容器（2），其中下电极（11），氧化铁电介质（12）和 上电极（13）依次设置，上电极不覆盖电介质的边缘，之后设置具有叠加金属导体轨迹的绝缘层（14）。 根据本发明，未被上电极（13）覆盖的电介质（12）的边缘涂覆有几乎不受氢气影响的涂层（14,20或30），之后将器件在氢气中加热 含气氛 在氢气气氛中加热中和在绝缘层上沉积导体轨迹期间产生的悬挂键，而涂层保护电介质免受氢的侵蚀。 因此，半导体器件具有较短的访问时间。
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公开(公告)号：US5278450A
公开(公告)日：1994-01-11
申请号：US818004
申请日：1992-01-08
IPC分类号： H01L21/28 , H01L21/285 , H01L21/288 , H01L21/768 , H01L23/532 , H01L23/48 , H01L29/46 , H01L29/54 , H01L29/62
CPC分类号： H01L21/288 , H01L21/28512 , H01L23/53223 , H01L2924/0002
摘要： A semiconductor device with a monocrystalline silicon body (1) is provided with a dielectric layer (2) with contact holes (3) through which the silicon body (1) is contacted with an aluminum metallization. To avoid undesirable separation of silicon, a discontinuous nucleus layer (5) of a metal nobler than silicon is formed on the silicon body (1) in the contact holes (3) preceding the provision of the metallization (4). Metals such as palladium and copper may be used to form the discontinuous layer.
摘要翻译： 具有单晶硅体（1）的半导体器件设置有具有接触孔（3）的介电层（2），硅体（1）通过该接触孔与铝金属化物接触。 为了避免硅的不期望的分离，在提供金属化（4）之前的接触孔（3）中的硅体（1）上形成了比硅更贵的不连续的核层（5）。 可以使用诸如钯和铜的金属来形成不连续层。
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公开(公告)号：US20100234209A1
公开(公告)日：2010-09-16
申请号：US12738129
申请日：2008-10-13
CPC分类号： C09C1/36 , B01J35/004 , B82Y30/00 , C01P2002/72 , C01P2002/84 , C01P2004/04 , C01P2004/61 , C01P2004/62 , C01P2006/40 , C09C1/00 , C09C1/627 , C09C1/642 , C09C3/063 , Y10T428/25 , Y10T428/2991 , Y10T428/2993
摘要： The present invention relates to particles comprising a core and a shell, a method of producing said particle, various uses of said particle as well as various products comprising said particle. The particle according to the invention may be used as photocatalyst, as antibacterial agent, as cleaning agent, as anti-fogging agent and as decomposing agent. Furthermore the particle is applicable as solar cells.
摘要翻译： 本发明涉及包含核和壳的颗粒，制备所述颗粒的方法，所述颗粒的各种用途以及包含所述颗粒的各种产品。 根据本发明的颗粒可以用作光催化剂，作为抗菌剂，作为清洁剂，作为防雾剂和分解剂。 此外，该颗粒可用作太阳能电池。
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17.发明授权Method of manufacturing a semiconductor device having a capacitor with a ferroelectric, dielectric 失效制造具有铁电电介质的电容器的半导体器件的制造方法
公开(公告)号：US5554559A
公开(公告)日：1996-09-10
申请号：US346975
申请日：1994-11-29
IPC分类号： H01G7/06 , H01L21/02 , H01L21/318 , H01L21/822 , H01L21/8246 , H01L27/04 , H01L27/105 , H01L27/115 , H01L29/49 , H01L21/302
CPC分类号： H01L27/11502 , H01L28/55 , H01L29/49 , Y10S438/909
摘要： A semiconductor device in which a capacitor (2) is provided on a surface (10) of a semiconductor body (3) with a semiconductor element (1) in which a lower electrode (11), an oxidic ferroelectric dielectric (12) and an upper electrode (13) are provided in that order, the upper electrode not covering an edge of the dielectric, after which an insulating layer (14) with superimposed metal conductor tracks is provided. According to the invention, the edge of the dielectric (12) not covered by the upper electrode (13) is coated with a coating layer (14, 20, or 30) practically imperviable to hydrogen, after which the device is heated in a hydrogen-containing atmosphere. Heating in a hydrogen atmosphere neutralizes dangling bonds which arise during deposition of the conductor tracks on the insulating layer, while the coating layer protects the dielectric from attacks by hydrogen. The semiconductor device then has a shorter access time.
摘要翻译： 一种半导体器件，其中在具有半导体元件（1）的半导体本体（3）的表面（10）上提供电容器（2），其中下电极（11），氧化铁电介质（12）和 上电极（13）依次设置，上电极不覆盖电介质的边缘，之后设置具有叠加金属导体轨迹的绝缘层（14）。 根据本发明，未被上电极（13）覆盖的电介质（12）的边缘涂覆有几乎不受氢气影响的涂层（14,20或30），之后将器件在氢气中加热 含气氛 在氢气气氛中加热中和在绝缘层上沉积导体轨迹期间产生的悬挂键，而涂层保护电介质免受氢的侵蚀。 因此，半导体器件具有较短的访问时间。
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18.发明授权Method of manufacturing a semiconductor device, in which a metal conductor track is provided on a surface of a semiconductor body 失效制造半导体器件的方法，其中金属导体轨道设置在半导体本体的表面上
公开(公告)号：US5366928A
公开(公告)日：1994-11-22
申请号：US73244
申请日：1993-06-04
IPC分类号： H01L21/768 , H01L21/28 , H01L21/285 , H01L21/336 , H01L23/31 , H01L29/78 , H01L21/283
CPC分类号： H01L23/3157 , H01L21/28518 , H01L21/76895 , H01L2924/0002 , Y10S148/015 , Y10S438/902
摘要： A method of manufacturing a semiconductor device is set forth comprising a semiconductor body (1) having a surface (2) adjoined by a semiconductor region (3) and a field oxide region (4) surrounding this region, on which surface (2) is provided a metal layer (13), in which a conductor track (17, 18) is formed, after which an isolating layer of silicon oxide (19) is deposited over the conductor track (17, 18) on the surface (2). According to the invention, before the layer of silicon oxide (19) is provided over the conductor track (17, 18), this track is provided with a top layer (16) of an oxidation-preventing material. By providing this top layer (16), it is avoided that the conductor track (17, 18) covered by silicon oxide (19) has a high electrical resistance or even an electrical interruption.
摘要翻译： 提出了一种制造半导体器件的方法，其包括具有邻接半导体区域（3）的表面（2）和围绕该区域的场氧化物区域（4）的半导体本体（1），表面（2） 提供了形成导体轨道（17,18）的金属层（13），之后在表面（2）上的导体轨道（17,18）上沉积氧化硅隔离层（19）。 根据本发明，在氧化硅层（19）设置在导体轨道（17,18）之上之前，该轨道设置有防氧化材料的顶层（16）。 通过设置该顶层（16），避免被氧化硅（19）覆盖的导体轨道（17,18）具有高电阻或甚至电中断。
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公开(公告)号：US5160762A
公开(公告)日：1992-11-03
申请号：US706822
申请日：1991-05-29
申请人： Hans-Wolfgang Brand , Mareike K. Klee , Johan W. C. De Vries , Rainer M. Waser , Robertus A. M. Wolters
发明人： Hans-Wolfgang Brand , Mareike K. Klee , Johan W. C. De Vries , Rainer M. Waser , Robertus A. M. Wolters
CPC分类号： H01L28/55 , H01G4/1227
摘要： A method of manufacturing monolayer capacitors having a ferroelectric layer on the basis of titanium as a dielectric on a substrate, the ferroelectric layer being located between a first and a second noble metal electrode, in which the ferroelectric layer is formed as a barium titanate layer having a layer thickness in the range of from 0.2 to 0.6 .mu.m in that a stable solution of salts of carbonic acids, alkoxides and/or acetyl acetonates is applied and is thermally decomposed at temperatures in the range of from 500.degree. to 700.degree. C., the solution constituting the ferroelectric layer being adjusted so that after the thermal decomposition process an excess quantity of titanium oxide of about 1 mol. % is obtained, and this coating process being repeated until the desired layer thickness is attained, after which the second noble metal electrode is provided on the ferroelectric layer.
摘要翻译： 一种制造单层电容器的方法，所述单层电容器具有基于钛作为电介质的铁电层，所述铁电层位于第一和第二贵金属电极之间，所述铁电层形成为钛酸钡层，所述钛酸钡层具有 层厚度在0.2至0.6μm的范围内，因为碳酸，醇盐和/或乙酰基丙酮酸盐的稳定溶液被施加并且在500-700℃的温度下被热分解。 ，调整构成铁电体层的溶液，使得在热分解处理后，过量的氧化钛为约1mol。 ％，并重复该涂覆处理直到达到所需的层厚度，之后将第二贵金属电极设置在强电介质层上。
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20.发明授权
公开(公告)号：US5122477A
公开(公告)日：1992-06-16
申请号：US661030
申请日：1991-02-25
IPC分类号： H01L27/04 , H01L21/02 , H01L21/822 , H01L21/8242 , H01L21/8246 , H01L27/10 , H01L27/105 , H01L27/108 , H01L27/115
CPC分类号： H01L27/11502 , H01L28/40 , H01L28/60 , H01L28/55 , H01L28/75
摘要： A method of manufacturing a semiconductor device comprising a semiconductor body (3) with a surface (10) on which capacitors (2) are provided, which form memory elements, with a lower electrode (11) including platinum, a ferroelectric dielectric material (12) and an upper electrode (13) is presented. In the method according to the invention, the electrodes (11, 13) including platinum are formed by the successive deposition on a surface of a first layer (19, 26) comprising a metal from the group titanium, zirconium, hafnium or an alloy of these metals, a second layer (20, 27) comprising platinum, and a third layer (21, 28) comprising a metal from the group titanium, zirconium, hafnium, or an alloy of these metals, upon which the semiconductor body is heated in an atmosphere containing oxygen. The first metal layer ensures a good adhesion of the electrode, the second layer acts as the electrode proper, while the third metal layer counteracts adverse effects of the first layer. Semiconductor devices having electrodes with good adhesion and a smooth surface can be manufactured in such a way. As a result, the semicondcutor device is reliable, while switching of the capacitors (2) acting as memory elements between two polarization states takes place at a positive and a negative voltage of equal value.
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