INTEGRATED CIRCUIT DEVICE
    15.
    发明公开

    公开(公告)号:US20240136254A1

    公开(公告)日:2024-04-25

    申请号:US18320423

    申请日:2023-05-18

    Abstract: An integrated circuit (IC) device includes a substrate, a pair of fin-type active regions protruding from the substrate to define a trench region on the substrate, the fin-type active regions extending in a first lateral direction, a pair of source/drain regions on the fin-type active regions, respectively, a device isolation film in the trench region, the device isolation film apart from the substrate in a vertical direction, an etch stop structure filling at least a portion of the trench region between the substrate and the device isolation film, a via power rail between the pair of fin-type active regions and between the pair of source/drain regions, the via power rail passing through at least a portion of the etch stop structure, and a backside power rail passing through the substrate, the backside power rail in contact with one end of the via power rail.

    INTEGRATED CIRCUIT DEVICE
    16.
    发明申请

    公开(公告)号:US20230129825A1

    公开(公告)日:2023-04-27

    申请号:US17828327

    申请日:2022-05-31

    Abstract: An integrated circuit (IC) device including a fin-type active region on a substrate and a gate line on the fin-type active and having a first uppermost surface at a first vertical level, an insulating spacer covering a sidewall of the gate line and having a second uppermost surface at the first vertical level, and an insulating guide film covering the second uppermost surface of the insulating spacer may be provided. The gate line may include a multilayered conductive film structure that includes a plurality of conductive patterns and have a top surface defined by the conductive patterns, which includes at least first and second conductive patterns including different materials from each other and a unified conductive pattern that is in contact with a top surface of each of the conductive patterns and has a top surface that defines the first uppermost surface.

    INTEGRATED CIRCUIT DEVICE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20210125856A1

    公开(公告)日:2021-04-29

    申请号:US16872955

    申请日:2020-05-12

    Abstract: An integrated circuit device according to the inventive concepts includes lower wiring structures formed on a substrate, an air gap arranged between the lower wiring structures, a capping layer covering an upper surface of the air gap, an etch stop layer conformally covering an upper surfaces of the lower wiring structures and the capping layer and having a protrusion and recess structure, an insulating layer covering the etch stop layer, and an upper wiring structure penetrating the insulating layer and connected to the upper surface of the lower wiring structure not covered with the etch stop layer, wherein the upper wiring structure covers a portion of an upper surface of the capping layer, and a level of the upper surface of the capping layer is higher than a level of the upper surface of the lower wiring structures.

    ELECTRICALLY CONDUCTIVE THIN FILMS
    20.
    发明申请
    ELECTRICALLY CONDUCTIVE THIN FILMS 有权
    电导电薄膜

    公开(公告)号:US20160141067A1

    公开(公告)日:2016-05-19

    申请号:US14940223

    申请日:2015-11-13

    Abstract: An electrically conductive thin film including: a material including a compound represented by Chemical Formula 1 and having a layered crystal structure, MemAa   Chemical Formula 1 wherein Me is Al, Ga, In, Si, Ge, Sn, A is S, Se, Te, or a combination thereof, and m and a each are independently a number selected so that the compound of Chemical Formula 1 is neutral; and a dopant disposed in the compound of Chemical Formula 1, wherein the dopant is a metal dopant that is different from Me and has an oxidation state which is greater than an oxidation state of Me, a non-metal dopant having a greater number of valence electrons than a number of valence electrons of A in Chemical Formula 1, or a combination thereof, and wherein the compound of Chemical Formula 1 includes a chemical bond which includes a valence electron of an s orbital of Me.

    Abstract translation: 一种导电薄膜,包括:包含由化学式1表示并具有层状晶体结构的化合物的材料,其中Me为Al,Ga,In,Si,Ge,Sn,A的MemAa化学式1为S,Se,Te ,或它们的组合,m和a各自独立地选择为使化学式1的化合物为中性的数字; 以及配置在化学式1的化合物中的掺杂剂,其中所述掺杂剂是与Me不同的金属掺杂剂,并且具有大于Me的氧化态的氧化态,具有更大数量化合价的非金属掺杂剂 电子与化学式1中A的多价价电子或其组合,其中化学式1的化合物包括包含Me轨道的价电子的化学键。

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