SEMICONDUCTOR DEVICES WITH SINGLE-PHOTON AVALANCHE DIODES AND HYBRID ISOLATION STRUCTURES

    公开(公告)号:US20210175380A1

    公开(公告)日:2021-06-10

    申请号:US16948325

    申请日:2020-09-14

    Abstract: An imaging device may include single-photon avalanche diodes (SPADs). To improve the sensitivity and signal-to-noise ratio of the SPADs, light scattering structures may be formed in the semiconductor substrate to increase the path length of incident light through the semiconductor substrate. To mitigate crosstalk, an isolation structure may be formed in a ring around the SPAD. The isolation structure may be a hybrid isolation structure with both a metal filler that absorbs light and a low-index filler that reflects light. The isolation structure may be formed as a single trench or may include a backside deep trench isolation portion and a front side deep trench isolation portion. The isolation structure may also include a color filtering material.

    HIGH DYNAMIC RANGE PIXEL WITH IN-PIXEL LIGHT SHIELD STRUCTURES

    公开(公告)号:US20190131333A1

    公开(公告)日:2019-05-02

    申请号:US15799833

    申请日:2017-10-31

    Abstract: Multi-photodiode image pixels may include sub-pixels with differing light sensitivities. Microlenses may be formed over the multi-photodiode image pixels so that light sensitivity of sub-pixels in an outer group of sub-pixels is enhanced. To prevent high angle light incident upon one of the sub-pixels of the image pixel from generating charges in a photosensitive region of another sub-pixel of the image pixel, intra-pixel isolation structures may be formed. Intra-pixel isolation structures may surround, and in some embodiments, overlap the light collecting region of an inner photodiode. When the intra-pixel isolation structures have a different index of refraction than light filtering material formed adjacent to the isolation structures, high angle light incident upon the isolation structures may be reflected back into the sub-pixel it was initially incident upon. Intra-pixel isolation structures may be formed entirely from optically transparent materials or a combination of optically transparent and opaque materials.

    METHODS OF FORMING CURVED IMAGE SENSORS
    14.
    发明申请
    METHODS OF FORMING CURVED IMAGE SENSORS 有权
    形成弯曲图像传感器的方法

    公开(公告)号:US20160286102A1

    公开(公告)日:2016-09-29

    申请号:US14667457

    申请日:2015-03-24

    Abstract: A method for forming curved image sensors may include applying positive pressure to the face of an image sensor, forcing the image sensor to adhere the curved surface of a substrate. The pressure may be applied to the face of the image sensor in a variety of ways, including using pneumatic pressure, hydraulic pressure, or pressure from an elastic or inelastic solid. Processing may occur on either a single image sensor die or an image sensor wafer. When an image sensor wafer is processed, a substrate may be used that has a number of cavities defined by respective curved surfaces with each cavity corresponding to a respective image sensor. When pressure is applied to the image sensor, the image sensor may deform until the curvature of the image sensor matches the curvature of the curved surface of the underlying substrate.

    Abstract translation: 用于形成弯曲图像传感器的方法可以包括向图像传感器的表面施加正压力,迫使图像传感器粘附基底的弯曲表面。 压力可以以各种方式施加到图像传感器的表面,包括使用气动压力,液压或来自弹性或非弹性固体的压力。 处理可能发生在单个图像传感器裸片或图像传感器晶片上。 当处理图像传感器晶片时,可以使用具有由各个曲面限定的多个空腔的基板,每个空腔对应于相应的图像传感器。 当对图像传感器施加压力时,图像传感器可能变形直到图像传感器的曲率与下面的基底的曲面的曲率相匹配。

    ARC PREVENTION FOR BONDED WAFERS OF A CHIP STACK

    公开(公告)号:US20250125284A1

    公开(公告)日:2025-04-17

    申请号:US18488628

    申请日:2023-10-17

    Abstract: A semiconductor device may include a first chip with a first wafer and a first dielectric layer, and a second chip that includes a second wafer and a second dielectric layer, the second chip having a backside surface and a frontside surface opposed to the backside surface and bonded to the first chip at the frontside surface to define a bond line between the first dielectric layer and the second dielectric layer. The semiconductor device may include a die seal layer on the backside surface having a die seal ground contact in contact with the second wafer, and an electrostatic discharge path that includes the die seal layer, the die seal ground contact, a first die seal in the first dielectric layer, a second die seal in the second dielectric layer, and a hybrid bond connecting the first die seal and the second die seal through the bond line.

    CHIP STACKING WITH BOND PAD ABOVE A BONDLINE

    公开(公告)号:US20240371905A1

    公开(公告)日:2024-11-07

    申请号:US18309933

    申请日:2023-05-01

    Abstract: A semiconductor device may include a first chip that includes a first wafer and a first dielectric layer disposed thereon. The semiconductor device may include a second chip that includes a second wafer and a second dielectric layer disposed thereon, the second chip having a backside surface and a frontside surface opposed to the backside surface, the second chip being bonded to the first chip at the frontside surface to define a bond line between the first dielectric layer and the second dielectric layer. An opening through the backside surface of the second chip may extend into the second dielectric layer, and a bond pad may be disposed within the second dielectric layer between the second wafer and the bond line.

    IMAGING SYSTEMS, AND IMAGE PIXELS AND RELATED METHODS

    公开(公告)号:US20230230987A1

    公开(公告)日:2023-07-20

    申请号:US18065992

    申请日:2022-12-14

    CPC classification number: H01L27/14621 H01L27/14627 H04N25/131

    Abstract: Imaging systems, and image pixels and related methods. At least one example is an image sensor comprising a plurality of image pixels. Each image pixel may comprise: a color router defining a router collection area on an upper surface; a first photosensitive region beneath the color router; a second photosensitive region beneath the color router; and a third photosensitive region beneath the color router. The color router may be configured to route photons of a first wavelength received at the router collection area to the first photosensitive region, route photons of a second wavelength received at the router collection area to the second photosensitive region, and route photons of a third wavelength received at the router collection area to the third photosensitive region.

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