公开(公告)号：US20170309617A1

公开(公告)日：2017-10-26

申请号：US15648264

申请日：2017-07-12

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Prasad VENKATRAMAN ,  Zia HOSSAIN ,  Chun-Li LIU ,  Woochul JEON ,  Jason MCDONALD

IPC: H01L27/06 ,  H01L21/8258 ,  H01L23/367 ,  H01L27/02 ,  H01L29/417 ,  H01L21/74 ,  H01L29/10 ,  H01L29/778 ,  H01L29/872 ,  H01L23/48 ,  H01L29/20 ,  H01L29/861

CPC classification number: H01L27/0629 ,  H01L21/743 ,  H01L21/8258 ,  H01L23/3677 ,  H01L23/481 ,  H01L27/0255 ,  H01L27/0266 ,  H01L27/0688 ,  H01L29/1087 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/7783 ,  H01L29/861 ,  H01L29/872 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In one embodiment, a cascode rectifier structure includes a group III-V semiconductor structure includes a heterostructure disposed on a semiconductor substrate. A first current carrying electrode and a second current carrying electrode are disposed adjacent a major surface of the heterostructure and a control electrode is disposed between the first and second current carrying electrode. A rectifier device is integrated with the group III-V semiconductor structure and is electrically connected to the first current carrying electrode and to a third electrode. The control electrode is further electrically connected to the semiconductor substrate and the second current path is generally perpendicular to a primary current path between the first and second current carrying electrodes. The cascode rectifier structure is configured as a two terminal device.

公开(公告)号：US20230113308A1

公开(公告)日：2023-04-13

申请号：US17938096

申请日：2022-10-05

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Prasad VENKATRAMAN ,  Sauvik CHOWDHURY

IPC: H01L29/78 ,  H01L29/66 ,  H01L21/265 ,  H01L29/06 ,  H01L29/423

Abstract: In a general aspect, a vertical transistor can include a semiconductor region of a first conductivity type, and a plurality of perpendicularly intersecting trenches having a shielded gate structure of the vertical transistor disposed therein. A mesa of the semiconductor region can be defined by the plurality of perpendicularly intersecting trenches. The mesa can include a proximal end portion having a first doping concentration of the first conductivity type, a distal end portion having the first doping concentration of the first conductivity type, and a central portion disposed between the proximal end portion and the distal end portion. The central portion can have a second doping concentration of the first conductivity type that is less than the first doping concentration.

公开(公告)号：US20220238427A1

公开(公告)日：2022-07-28

申请号：US17248426

申请日：2021-01-25

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Prasad VENKATRAMAN ,  Gary Horst LOECHELT

IPC: H01L23/528 ,  H01L29/40 ,  H01L29/423

Abstract: In a general aspect, a transistor can include a trench disposed in a semiconductor region and a gate electrode disposed in an upper portion of the trench. The gate electrode can include a first and second gate electrode segments. The transistor can also include a shield electrode having a first shield electrode portion disposed in a lower portion of the trench, and a second shield electrode portion orthogonally extending from the first shield electrode portion in the lower portion of the trench to the upper portion of the trench. The first shield electrode portion can be disposed below the first and second gate electrode segments, and the second shield electrode portion can being disposed between the first and second gate electrode segments. The transistor can also include a patterned buried conductor layer. The first and second gate electrode segments can be electrically coupled via the patterned buried conductor layer.

公开(公告)号：US20200295149A1

公开(公告)日：2020-09-17

申请号：US16450149

申请日：2019-06-24

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Prasad VENKATRAMAN ,  Zia HOSSAIN ,  Donald ZAREMBA ,  Gordon M. GRIVNA ,  Alexander YOUNG

IPC: H01L29/423 ,  H01L21/762

Abstract: Systems and methods of the disclosed embodiments include an electronic device that has a gate electrode for supplying a gate voltage, a source, a drain, and a channel doped to enable a current to flow from the drain to the source when a voltage is applied to the gate electrode. The electronic device may also include a gate insulator between the channel and the gate electrode. The gate insulator may include a first gate insulator section comprising a first thickness, and a second gate insulator section comprising a second thickness that is less than the first thickness. The gate insulator sections thereby improve the safe operating area by enabling the current to flow through the second gate insulator section at a lower voltage than the first gate insulator section.

公开(公告)号：US20190123043A1

公开(公告)日：2019-04-25

申请号：US16225930

申请日：2018-12-19

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Prasad VENKATRAMAN ,  Zia HOSSAIN ,  Chun-Li LIU ,  Woochul JEON ,  Jason MCDONALD

IPC: H01L27/06 ,  H01L29/10 ,  H01L27/02 ,  H01L23/367 ,  H01L29/417 ,  H01L29/778 ,  H01L21/74 ,  H01L21/8258

Abstract: A method for forming a cascode rectifier structure includes providing a group III-V semiconductor structure includes a heterostructure disposed on a semiconductor substrate. A first current carrying electrode and a second current carrying electrode are provided adjacent a major surface of the heterostructure and a control electrode is provided between the first and second current carrying electrode. A rectifier device is provided integrated with the group III-V semiconductor structure and is electrically connected to the first current carrying electrode and to a third electrode. The control electrode is provided further electrically connected to the semiconductor substrate and the second current path is generally perpendicular to a primary current path between the first and second current carrying electrodes. The cascode rectifier structure is provided as a two terminal device.

公开(公告)号：US20190067266A1

公开(公告)日：2019-02-28

申请号：US16104039

申请日：2018-08-16

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Kirk K. HUANG ,  Prasad VENKATRAMAN ,  Emily M. LINEHAN ,  Zia HOSSAIN

IPC: H01L27/02 ,  H01L29/10 ,  H01L29/78 ,  H01L29/423 ,  H01L29/08 ,  H01L27/088

Abstract: An electronic device can include a transistor having a gate electrode, a first portion, and a second portion, wherein along the gate electrode, the first portion of the transistor has a first gate-to-drain capacitance and a first gate-to-source capacitance, the second portion of the transistor has a second gate-to-drain capacitance and a second gate-to-source capacitance, and a ratio of the first gate-to-drain capacitance to the first gate-to-source capacitance is less than a ratio of the second gate-to-drain capacitance to the second gate-to-source capacitance.

公开(公告)号：US20140145256A1

公开(公告)日：2014-05-29

申请号：US14171427

申请日：2014-02-03

Applicant: Semiconductor Components Industries, LLC

Inventor： Prasad VENKATRAMAN ,  Gordon M. GRIVNA ,  Gary H. LOECHELT

IPC: H01L29/78

CPC classification number: H01L29/7827 ,  H01L21/2815 ,  H01L29/0634 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42376 ,  H01L29/66659 ,  H01L29/66689 ,  H01L29/66696 ,  H01L29/7816 ,  H01L29/7835

Abstract: An electronic device can include a semiconductor layer overlying a substrate and having a primary surface and a thickness, wherein a trench extends through at least approximately 50% of the thickness of semiconductor layer to a depth. The electronic device can further include a conductive structure within the trench, wherein the conductive structure extends at least approximately 50% of the depth of the trench. The electronic device can still further include a vertically-oriented doped region within the semiconductor layer adjacent to and electrically insulated from the conductive structure; and an insulating layer disposed between the vertically-oriented doped region and the conductive structure. A process of forming an electronic device can include patterning a semiconductor layer to define a trench extending through at least approximately 50% of the thickness of the semiconductor layer and forming a vertically-oriented doped region after patterning the semiconductor layer to define the trench.

Abstract translation: 电子器件可以包括覆盖衬底并具有主表面和厚度的半导体层，其中沟槽延伸穿过半导体层厚度的至少大约50％的深度。 电子器件还可以包括在沟槽内的导电结构，其中导电结构延伸至沟槽深度的至少约50％。 电子器件还可以进一步包括在半导体层内的垂直取向的掺杂区域，该掺杂区域与导电结构相邻并与导电结构电绝缘; 以及设置在垂直取向的掺杂区域和导电结构之间的绝缘层。 形成电子器件的过程可以包括图案化半导体层以限定延伸穿过至少大约50％的半导体层的厚度的沟槽，并且在图案化半导体层以形成沟槽之后形成垂直取向的掺杂区域。

公开(公告)号：US20230065659A1

公开(公告)日：2023-03-02

申请号：US17446672

申请日：2021-09-01

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Prasad VENKATRAMAN

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/423 ,  H01L29/66

Abstract: A MOSFET device die includes an active area formed on a semiconductor substrate. The active area includes a first active area portion and a second active area portion. At least one mesa is formed in the semiconductor substrate extending in a longitudinal direction through the active area. The at least one mesa includes a channel region extending in a longitudinal direction. The channel region includes low threshold voltage channel portions and high threshold voltage channel portions. The first active area portion includes the channel portions in a first ratio of low threshold voltage channel portions to high threshold voltage channel portions, and the second active area portion includes channel portions in a second ratio of low threshold voltage channel portions to high threshold voltage channel portions. The first ratio is larger than the second ratio.

公开(公告)号：US20220085204A1

公开(公告)日：2022-03-17

申请号：US17534084

申请日：2021-11-23

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Dean E. PROBST ,  Peter A. BURKE ,  Prasad VENKATRAMAN

IPC: H01L29/78 ,  H01L21/765 ,  H01L29/40 ,  H01L29/423 ,  H01L29/66 ,  H01L29/739

Abstract: In one embodiment, a semiconductor device is formed having a plurality of active trenches formed within an active region of the semiconductor device. A first insulator is formed along at least a portion of sidewalls of each active trench. A perimeter termination trench is formed that surrounds the active region. The perimeter termination trench is formed having a first sidewall that is adjacent the active region and a second sidewall that is opposite the first sidewall. An insulator is formed along the second sidewall that has a thickness is greater than an insulator that is formed along the first sidewall.

公开(公告)号：US20200013886A1

公开(公告)日：2020-01-09

申请号：US16026897

申请日：2018-07-03

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Woochul JEON ,  Prasad VENKATRAMAN

IPC: H01L29/778 ,  H01L27/088 ,  H01L27/06

Abstract: An electronic device can include a channel layer and a barrier layer overlying the channel layer. In an embodiment, the electronic device can include a component disposed along a current path between a gate terminal and a gate electrode of a first transistor. In another embodiment, the electronic device can include a second transistor wherein source and gate electrodes of the second transistor are coupled to the gate electrode of the first transistor, and a drain electrode of the second transistor is coupled to the gate terminal. A circuit can include a transistor and a diode. The transistor can include a drain, a gate, and a source, wherein the drain is coupled to a drain terminal, and the source is coupled to a source terminal. The diode can have an anode is coupled to the gate terminal, and a cathode is coupled to a gate of the transistor.