公开(公告)号：US20200295149A1

公开(公告)日：2020-09-17

申请号：US16450149

申请日：2019-06-24

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Prasad VENKATRAMAN ,  Zia HOSSAIN ,  Donald ZAREMBA ,  Gordon M. GRIVNA ,  Alexander YOUNG

IPC: H01L29/423 ,  H01L21/762

Abstract: Systems and methods of the disclosed embodiments include an electronic device that has a gate electrode for supplying a gate voltage, a source, a drain, and a channel doped to enable a current to flow from the drain to the source when a voltage is applied to the gate electrode. The electronic device may also include a gate insulator between the channel and the gate electrode. The gate insulator may include a first gate insulator section comprising a first thickness, and a second gate insulator section comprising a second thickness that is less than the first thickness. The gate insulator sections thereby improve the safe operating area by enabling the current to flow through the second gate insulator section at a lower voltage than the first gate insulator section.

公开(公告)号：US20180130726A1

公开(公告)日：2018-05-10

申请号：US15866248

申请日：2018-01-09

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Phuong Trong LE ,  Alexander YOUNG

IPC: H01L23/495 ,  H01L23/31 ,  H01L29/78 ,  H01L23/00 ,  H01L29/20 ,  H01L29/778 ,  H01L21/56

CPC classification number: H01L23/49575 ,  H01L21/561 ,  H01L23/3121 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L29/2003 ,  H01L29/7787 ,  H01L29/7816 ,  H01L29/7817 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/0603 ,  H01L2224/06181 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/83851 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/85 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A semiconductor package includes an electrically conductive base (base) having a source connector. A drain connector and a gate connector are electrically coupled with the base. A depletion mode gallium nitride field-effect transistor (GaN FET) and an enhancement mode laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOS FET) are also coupled with the base. The gate connector and a gate contact of the LDMOS FET are both included in a first electrical node, the source connector and a source contact of the LDMOS FET are both included in a second electrical node, and the drain connector and a drain contact of the GaN FET are both included in a third electrical node. The GaN FET and LDMOS FET together form a cascode that operates as an enhancement mode amplifier. The semiconductor package does not include an interposer between the GaN FET and the base or between the LDMOS FET and the base.

公开(公告)号：US20170077015A1

公开(公告)日：2017-03-16

申请号：US15341735

申请日：2016-11-02

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Phuong Trong LE ,  Alexander YOUNG

IPC: H01L23/495 ,  H01L29/78 ,  H01L29/778 ,  H01L23/31 ,  H01L29/20

CPC classification number: H01L23/49575 ,  H01L21/561 ,  H01L23/3121 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L29/2003 ,  H01L29/7787 ,  H01L29/7816 ,  H01L29/7817 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/0603 ,  H01L2224/06181 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/83851 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/85 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A semiconductor package includes an electrically conductive base (base) having a source connector. A drain connector and a gate connector are electrically coupled with the base. A depletion mode gallium nitride field-effect transistor (GaN FET) and an enhancement mode laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOS FET) are also coupled with the base. The gate connector and a gate contact of the LDMOS FET are both included in a first electrical node, the source connector and a source contact of the LDMOS FET are both included in a second electrical node, and the drain connector and a drain contact of the GaN FET are both included in a third electrical node. The GaN FET and LDMOS FET together form a cascode that operates as an enhancement mode amplifier. The semiconductor package does not include an interposer between the GaN FET and the base or between the LDMOS FET and the base.

Abstract translation: 半导体封装包括具有源极连接器的导电基底（基底）。 漏极连接器和栅极连接器与基座电耦合。 耗尽型氮化镓场效应晶体管（GaN FET）和增强型横向扩散金属氧化物半导体场效应晶体管（LDMOS FET）也与基极耦合。 LDMOS FET的栅极连接器和栅极接触都包含在第一个电气节点中，源极连接器和LDMOS FET的源极接触都包含在第二个电气节点中，而漏极连接器和漏极接触器 GaN FET都包含在第三电节点中。 GaN FET和LDMOS FET一起形成作为增强型放大器工作的共源共栅。 半导体封装不包括GaN FET和基极之间或LDMOS FET与基极之间的插入器。

公开(公告)号：US20190252303A1

公开(公告)日：2019-08-15

申请号：US16389492

申请日：2019-04-19

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Phuong Trong LE ,  Alexander YOUNG

IPC: H01L23/495 ,  H01L29/78 ,  H01L23/31 ,  H01L29/20 ,  H01L23/00 ,  H01L29/778

CPC classification number: H01L23/49575 ,  H01L21/561 ,  H01L23/3121 ,  H01L23/49524 ,  H01L23/49562 ,  H01L24/06 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/97 ,  H01L29/2003 ,  H01L29/7787 ,  H01L29/7816 ,  H01L29/7817 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/0603 ,  H01L2224/06181 ,  H01L2224/291 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/48137 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/73265 ,  H01L2224/83 ,  H01L2224/83851 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/1033 ,  H01L2924/1306 ,  H01L2924/13064 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2224/85 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2924/00

Abstract: A semiconductor package includes an electrically conductive base (base) having a source connector. A drain connector and a gate connector are electrically coupled with the base. A depletion mode gallium nitride field-effect transistor (GaN FET) and an enhancement mode laterally diffused metal-oxide-semiconductor field-effect transistor (LDMOS FET) are also coupled with the base. The gate connector and a gate contact of the LDMOS FET are both included in a first electrical node, the source connector and a source contact of the LDMOS FET are both included in a second electrical node, and the drain connector and a drain contact of the GaN FET are both included in a third electrical node. The GaN FET and LDMOS FET together form a cascode that operates as an enhancement mode amplifier. The semiconductor package does not include an interposer between the GaN FET and the base or between the LDMOS FET and the base.

公开(公告)号：US20190123041A1

公开(公告)日：2019-04-25

申请号：US16215870

申请日：2018-12-11

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Prasad VENKATRAMAN ,  Zia HOSSAIN ,  Chun-Li LIU ,  Jason MCDONALD ,  Ali SALIH ,  Alexander YOUNG

IPC: H01L27/06 ,  H01L29/10 ,  H01L27/02 ,  H01L23/367 ,  H01L29/417 ,  H01L29/778 ,  H01L21/74 ,  H01L21/8258

CPC classification number: H01L27/0629 ,  H01L21/743 ,  H01L21/8258 ,  H01L23/3677 ,  H01L23/481 ,  H01L27/0255 ,  H01L27/0266 ,  H01L27/0688 ,  H01L29/1087 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/7783 ,  H01L29/861 ,  H01L29/872 ,  H01L2224/40245 ,  H01L2224/48247 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A cascode switch structure includes a group III-V transistor structure having a first current carrying electrode, a second current carrying electrode and a first control electrode. A semiconductor MOSFET device includes a third current carrying electrode electrically connected to the first current carrying electrode, a fourth current carrying electrode electrically connected to the first control electrode, and a second control electrode. A first diode includes a first cathode electrode electrically connected to the second current carrying electrode and a first anode electrode. A second diode includes a second anode electrode electrically connected to the first anode electrode and a second cathode electrode electrically connected to the fourth current carrying electrode. In one embodiment, the group III-V transistor structure, the first diode, and the second diode are integrated within a common substrate.

公开(公告)号：US20170317072A1

公开(公告)日：2017-11-02

申请号：US15648211

申请日：2017-07-12

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Prasad VENKATRAMAN ,  Zia HOSSAIN ,  Chun-Li LIU ,  Jason MCDONALD ,  Ali SALIH ,  Alexander YOUNG

IPC: H01L27/06 ,  H01L21/8258 ,  H01L23/367 ,  H01L27/02 ,  H01L29/417 ,  H01L21/74 ,  H01L29/10 ,  H01L29/778 ,  H01L29/872 ,  H01L23/48 ,  H01L29/20 ,  H01L29/861

CPC classification number: H01L27/0629 ,  H01L21/743 ,  H01L21/8258 ,  H01L23/3677 ,  H01L23/481 ,  H01L27/0255 ,  H01L27/0266 ,  H01L27/0688 ,  H01L29/1087 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/7783 ,  H01L29/861 ,  H01L29/872 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A cascode switch structure includes a group III-V transistor structure having a first current carrying electrode, a second current carrying electrode and a first control electrode. A semiconductor MOSFET device includes a third current carrying electrode electrically connected to the second current carrying electrode, a fourth current carrying electrode electrically connected to the first control electrode, and a second control electrode. A first diode includes a first cathode electrode electrically connected to the first current carrying electrode and a first anode electrode. A second diode includes a second anode electrode electrically connected to the first anode electrode and a second cathode electrode electrically connected to the fourth current carrying electrode. In one embodiment, the group III-V transistor structure, the first diode, and the second diode are integrated within a common substrate.

公开(公告)号：US20160322969A1

公开(公告)日：2016-11-03

申请号：US15133644

申请日：2016-04-20

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Prasad VENKATRAMAN ,  Peter MOENS ,  Mihir MUDHOLKAR ,  Joe FULTON ,  Philip CELAYA ,  Stephen ST. GERMAIN ,  Chun-Li LIU ,  Jason MCDONALD ,  Alexander YOUNG ,  Ali SALIH

IPC: H03K17/687 ,  H01L25/11 ,  H01L29/778

CPC classification number: H01L29/747 ,  H01L21/8258 ,  H01L23/4952 ,  H01L23/49524 ,  H01L23/49541 ,  H01L23/49562 ,  H01L23/49575 ,  H01L24/40 ,  H01L25/115 ,  H01L25/18 ,  H01L27/0629 ,  H01L27/088 ,  H01L27/0883 ,  H01L29/205 ,  H01L29/404 ,  H01L29/4238 ,  H01L29/7416 ,  H01L29/742 ,  H01L29/7786 ,  H01L29/7787 ,  H01L2224/0603 ,  H01L2224/40245 ,  H01L2224/48247 ,  H01L2224/49113 ,  H01L2224/73221 ,  H01L2224/83801 ,  H01L2224/8385 ,  H01L2924/00014 ,  H03K17/6874 ,  H03K2017/6878 ,  H03K2217/0009 ,  H03K2217/0018 ,  H01L2224/37099

Abstract: A half-bridge circuit can include a high-side HEMT, a high-side switch transistor, a low-side HEMT, and a low-side switch transistor. The die substrates of the HEMTs can be coupled to the sources of their corresponding switch transistors. In another aspect, a packaged electronic device for a half-bridge circuit can have a design that can use shorter connectors that help to reduce parasitic inductance and resistance. In a further aspect, a packaged electronic device for a half-bridge circuit can include more than one connection along the bottom of the package allows less lead connections along the periphery of the packaged electronic device and can allow for a smaller package.

Abstract translation: 半桥电路可以包括高侧HEMT，高侧开关晶体管，低侧HEMT和低侧开关晶体管。 HEMT的管芯衬底可以耦合到其相应的开关晶体管的源极。 在另一方面，用于半桥电路的封装电子器件可以具有可以使用有助于减小寄生电感和电阻的较短连接器的设计。 在另一方面，用于半桥电路的封装电子设备可以包括沿着封装底部的多于一个的连接允许沿着封装的电子器件的周边的较少的引线连接并且可以允许较小的封装。

公开(公告)号：US20160118490A1

公开(公告)日：2016-04-28

申请号：US14853720

申请日：2015-09-14

Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC

Inventor： Balaji PADMANABHAN ,  Prasad VENKATRAMAN ,  Zia HOSSAIN ,  Chun-Li LIU ,  Jason MCDONALD ,  Ali SALIH ,  Alexander YOUNG

IPC: H01L29/778 ,  H01L27/02

CPC classification number: H01L27/0629 ,  H01L21/743 ,  H01L21/8258 ,  H01L23/3677 ,  H01L23/481 ,  H01L27/0255 ,  H01L27/0266 ,  H01L27/0688 ,  H01L29/1087 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/7783 ,  H01L29/861 ,  H01L29/872 ,  H01L2924/0002 ,  H01L2924/00

Abstract: In one embodiment, a group III-V transistor structure includes a heterostructure disposed on a semiconductor substrate. A first current carrying electrode and a second current carrying electrode are disposed adjacent a major surface of the heterostructure and a control electrode is disposed between the first and second current carrying electrode. A clamping device is integrated with the group III-V transistor structure and is electrically connected to the first current carrying electrode a third electrode to provide a secondary current path during, for example, an electrical stress event.

Abstract translation: 在一个实施例中，III-V族晶体管结构包括设置在半导体衬底上的异质结构。 第一载流电极和第二载流电极邻近异质结构的主表面设置，并且控制电极设置在第一和第二载流电极之间。 钳位装置与III-V族晶体管结构集成，并且在第一电流承载电极处电连接第三电极，以在例如电应力事件期间提供次级电流路径。