-
公开(公告)号：US20140286089A1
公开(公告)日：2014-09-25
申请号：US14297213
申请日：2014-06-05
Applicant: SK HYNIX INC.
Inventor： Hae Chan PARK , Soo Gil KIM
IPC: G11C13/00
CPC classification number: G11C13/0069 , G11C11/00 , G11C13/0004 , G11C13/0033 , G11C2013/0092 , Y10S977/754
Abstract: A semiconductor integrated circuit system includes a phase-change line including a first phase-change area constituting a first memory cell and a second phase-change area constituting a second memory cell, a write current providing unit configured to phase-change a selected one of the first and second phase-change areas, and a phase-change compensation unit configured to restore the other of the first and second phase-change areas by compensating for a dummy phase-change caused in the other phase-change area due to a phase-change of the selected phase-change area.
Abstract translation: 一种半导体集成电路系统包括：相变线，包括构成第一存储单元的第一相变区和构成第二存储单元的第二相变区;写入电流提供单元，被配置为对 第一相变区和第二相变区，以及相变补偿单元，被配置为通过补偿由于相位而在另一个相变区域中引起的虚拟相位变化来恢复第一和第二相变区域中的另一个 - 所选择的相变区域的更换。
-
公开(公告)号：US20140145140A1
公开(公告)日：2014-05-29
申请号：US13843180
申请日：2013-03-15
Applicant: SK HYNIX INC.
Inventor： Soo Gil KIM
IPC: H01L45/00
CPC classification number: H01L45/06 , G11C13/0002 , H01L27/2409 , H01L27/249 , H01L45/04 , H01L45/08 , H01L45/085 , H01L45/1233 , H01L45/1293 , H01L45/144 , H01L45/146 , H01L45/147
Abstract: The present invention relates to a variable resistance memory device and a method for forming the same. A variable resistance memory device according to the present invention includes a first electrode; a second electrode spaced apart from the first electrode; a resistance variable layer and a metal-insulator transition layer provided between the first electrode and the second electrode; and a heat barrier layer provided (i) between the first electrode and the metal-insulator transition layer, (ii) between the metal-insulator transition layer and the resistance variable layer, or (iii) between the second electrode and the metal-insulator transition layer. The present invention prevents dissipation of heat generated in the metal-insulator transition layer using a thermal boundary resistance (TBR) phenomenon, and thus current and voltage to operate the variable resistance memory device can be reduced.
Abstract translation: 可变电阻存储器件及其形成方法技术领域本发明涉及可变电阻存储器件及其形成方法。 根据本发明的可变电阻存储器件包括第一电极; 与所述第一电极间隔开的第二电极; 设置在第一电极和第二电极之间的电阻变化层和金属 - 绝缘体过渡层; （i）在第一电极和金属 - 绝缘体过渡层之间设置（ii）金属 - 绝缘体转移层和电阻变化层之间的隔热层，或者（iii）第二电极和金属 - 绝缘体之间 过渡层。 本发明通过使用热边界电阻（TBR）现象来防止在金属 - 绝缘体过渡层中产生的热量的散失，从而能够降低用于操作可变电阻存储器件的电流和电压。
-
公开(公告)号：US20240334849A1
公开(公告)日：2024-10-03
申请号：US18193336
申请日：2023-03-30
Applicant: SK hynix Inc.
Inventor： Jong Min YUN , Soo Gil KIM , Soo Man SEO
CPC classification number: H10N70/8833 , H10B63/80 , H10N70/063 , H10N70/841
Abstract: A semiconductor device may include: a first conductive line; a second conductive line disposed over the first conductive line and spaced apart from the first conductive line; a memory cell disposed between the first conductive line and the second conductive line and including a memory layer; and one or more shield layers disposed at least one of at a first location over the memory layer or a second location under the memory layer, the one or more shield layers including an MXene material.
-
Patent Agency Ranking
公开(公告)号：US20180315922A1
公开(公告)日：2018-11-01
申请号：US15824999
申请日：2017-11-28
Applicant: SK hynix Inc.
Inventor： Young Seok KO , Soo Gil KIM , Joo Young MOON
CPC classification number: H01L45/1608 , H01L27/2463 , H01L45/1233 , H01L45/1641
Abstract: In an embodiment, a substrate that includes a cell region and a dummy region is provided. Lower interconnection structures are formed in the cell region and the dummy region. One or more first multilayered structure patterns are formed in the cell region and one or more second multilayered structure patterns in the dummy region over the lower interconnection structures. The first multilayered structure patterns and second multilayered structure patterns extend in a first direction. Each of the second multilayered structure patterns includes an etch target layer. An insulating material layer is formed over the first multilayered structure patterns and the second multilayered structure patterns. An interlayer insulating layer that fills a space between two adjacent patterns of the first multilayered structure patterns and second multilayered structure patterns is formed by planarizing the insulating material layer. The etch target layer in each of the second multilayered structure patterns is removed.
-
15.发明申请公开(公告)号：US20170365640A1
公开(公告)日：2017-12-21
申请号：US15432806
申请日：2017-02-14
Applicant: SK hynix Inc.
Inventor： Beom Yong KIM , Soo Gil KIM
CPC classification number: H01L27/2418 , G11C11/28 , H01G2/00 , H01L21/823807 , H01L45/065 , H01L45/085 , H01L45/1233 , H01L45/1253 , H01L45/141 , H01L45/146 , H01L45/147
Abstract: A switch includes a first electrode layer, a second electrode layer disposed over the first electrode layer, and a selecting element layer interposed between the first electrode layer and the second electrode layer. The selecting element layer includes a gas region in which a current flows or does not flow according to a voltage applied to the switch. When the current flows, the switch is in an on-state, and, when the current does not flow, the switch is in an off-state.
-
公开(公告)号：US20210184102A1
公开(公告)日：2021-06-17
申请号：US17032938
申请日：2020-09-25
Applicant: SK hynix Inc. , Kioxia Corporation
Inventor： Tae Young LEE , Guk Cheon KIM , Soo Gil KIM , Soo Man SEO , Jong Koo LIM , Taiga ISODA
Abstract: An electronic device may include a semiconductor memory, and the semiconductor memory may include a magnetic tunnel junction (MTJ) structure including a free layer, a pinned layer, and a tunnel barrier layer, the free layer having a variable magnetization direction, the pinned layer having a fixed magnetization direction, the tunnel barrier layer being interposed between the free layer and the pinned layer; and a thermal stability enhanced layer (TSEL) including a homogeneous material having an Fe—O bond.
-
公开(公告)号：US20200144500A1
公开(公告)日：2020-05-07
申请号：US16413491
申请日：2019-05-15
Applicant: SK hynix Inc.
Inventor： Joo Young MOON , Young Seok KO , Soo Gil KIM
IPC: H01L45/00
Abstract: A method for forming a semiconductor device is disclosed. The method for forming the semiconductor device includes forming a first sacrificial film over a target layer to be etched, forming a first partition mask over the first sacrificial film, forming a first sacrificial film pattern by etching the first sacrificial film using the first partition mask, forming a first spacer at a sidewall of the first sacrificial film pattern, and forming a first spacer pattern by removing the first sacrificial film pattern. The first partition mask includes a plurality of first line-shaped space patterns extending in a first direction. A width of at least one space pattern located at both edges from among the plurality of first space patterns is smaller than a width of each of other space patterns.
-
18.发明申请公开(公告)号：US20140160839A1
公开(公告)日：2014-06-12
申请号：US14183193
申请日：2014-02-18
Applicant: SK hynix Inc.
Inventor： Myoung Sub KIM , Soo Gil KIM , Nam Kyun PARK , Sung Cheoul KIM , Gap Sok DO , Joon Seop SIM , Hyun Jeong LEE
IPC: G11C13/00
CPC classification number: H01L45/1675 , G11C13/0004 , G11C2013/008 , G11C2213/71 , H01L27/2409 , H01L27/249 , H01L45/06 , H01L45/1226 , H01L45/1246 , H01L45/126 , H01L45/144
Abstract: A semiconductor integrated circuit device, a method of manufacturing the same, and a method of driving the same are provided. The device includes a semiconductor substrate, an upper electrode extending from a surface of the semiconductor substrate; a plurality of switching structures extending from both sidewalls of the upper electrode in a direction parallel to the surface of the semiconductor substrate, and a phase-change material layer disposed between the plurality of switching structures and the upper electrode.
-
-
-
-
-
-
-
Search Results
18
records
(took 0.013 seconds)
