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    SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME
    13.
    发明申请
    SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME 有权

    公开(公告)号：US20240414922A1

    公开(公告)日：2024-12-12

    申请号：US18809829

    申请日：2024-08-20

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Kohji KANAMORI ,  Shinhwan KANG ,  Jeehoon HAN

    IPC: H10B43/50 ,  H10B41/10 ,  H10B41/27 ,  H10B41/41 ,  H10B41/50 ,  H10B43/10 ,  H10B43/27 ,  H10B43/40

    Abstract: A semiconductor device includes a substrate; a stack structure on the substrate and including an alternating stack of interlayer insulating layers and gate electrodes; first and second separation regions each extending through the stack structure and extending in a first direction; a first upper separation region between the first and second separation regions and extending through a portion of the stack structure; a plurality of channel structures between the first and second separation regions and extending through the stack structure; and a plurality of first vertical structures each extending through a particular one of the first and second separation regions. Each of the first and second separation regions has a first width in a second direction that is perpendicular to the first direction. Each first vertical structure has a second width in the second direction, the second width being greater than the first width.

    SEMICONDUCTOR MEMORY DEVICE
    14.
    发明公开
    SEMICONDUCTOR MEMORY DEVICE 审中-公开

    公开(公告)号：US20240276720A1

    公开(公告)日：2024-08-15

    申请号：US18404079

    申请日：2024-01-04

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kohji KANAMORI ,  Jeehoon HAN

    IPC: H10B43/27 ,  H01L29/423 ,  H10B41/10 ,  H10B41/27 ,  H10B43/10

    CPC classification number: H10B43/27 ,  H01L29/4236 ,  H10B41/10 ,  H10B41/27 ,  H10B43/10

    Abstract: A semiconductor memory device includes structures including insulation layers and semiconductor layers alternately stacked in a vertical direction, the structures being spaced apart from one another in a horizontal direction; an interlayer insulation layer between the structures; gate electrodes respectively in gate trenches passing through the interlayer insulation layer in the vertical direction, between the structures, the gate electrodes connected to the semiconductor layers; and vertical insulation layers respectively on sidewalls of the gate trenches, wherein each gate electrode includes first portions overlapping the insulation layers in the horizontal direction and second portions overlapping the semiconductor layers in the horizontal direction, and a first width of each first portion in the horizontal direction is greater than a second width of each second portion in the horizontal direction.

    SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME
    15.
    发明公开
    SEMICONDUCTOR DEVICE AND ELECTRONIC SYSTEM INCLUDING THE SAME 审中-公开

    公开(公告)号：US20240268113A1

    公开(公告)日：2024-08-08

    申请号：US18229560

    申请日：2023-08-02

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sanghun CHUN ,  Jaehoon LEE ,  Kyung Taek CHO ,  Donghyuck JANG ,  Jeehoon HAN

    IPC: H10B43/27 ,  H10B43/40

    CPC classification number: H10B43/27 ,  H10B43/40

    Abstract: A semiconductor device includes a circuit region, a peripheral circuit structure on a first substrate; a cell region on the circuit region, a cell array region and connection region, the cell region including a second substrate; gate stacking structure on the second substrate, a lower structure, upper structures including gate electrodes; a channel structure penetrating the gate stacking structure; a gate contact penetrating the gate stacking structure electrically connected to the circuit region, and to a connection gate electrode insulated from a gate electrode by an insulating pattern between the gate electrode and the gate contact; a boundary insulating pattern partially formed in a boundary gate electrode among the gate electrodes of the lower structure adjacent to a boundary portion between the upper and lower structure surrounding the gate contact to maintain an electrical connection path of the boundary gate electrode and having a different structure from the insulating pattern.

    SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING THE SAME
    18.
    发明申请
    SEMICONDUCTOR DEVICE AND DATA STORAGE SYSTEM INCLUDING THE SAME 有权

    公开(公告)号：US20220406801A1

    公开(公告)日：2022-12-22

    申请号：US17692797

    申请日：2022-03-11

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Seungyoon KIM ,  Jaeryong SIM ,  Jeehoon HAN

    IPC: H01L27/11524 ,  H01L27/11519 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/1157 ,  H01L27/11582 ,  H01L23/528 ,  H01L23/522

    Abstract: A semiconductor device and a data storage system, the device including a lower structure; and an upper structure on the lower structure and including a memory cell array, wherein the lower structure includes a semiconductor substrate, first and second active regions spaced apart from each other in a first direction on the semiconductor substrate, the first and second active regions being defined by an isolation insulating layer on the semiconductor substrate, and first and second gate pattern structures extending in the first direction to cross the first and second active regions, respectively, on the semiconductor substrate, the first gate pattern structure and the second gate pattern structure have first and second end portions spaced apart from each other in a facing manner in the first direction, respectively, and the first and second end portions are concavely curved in opposite directions away from each other in a plan view.

    SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME
    19.
    发明申请
    SEMICONDUCTOR DEVICES AND DATA STORAGE SYSTEMS INCLUDING THE SAME 有权

    公开(公告)号：US20220336421A1

    公开(公告)日：2022-10-20

    申请号：US17582387

    申请日：2022-01-24

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Seungyoon KIM ,  Junghoon JUN ,  Sanghun CHUN ,  Jeehoon HAN

    IPC: H01L25/065 ,  H01L25/18 ,  H01L23/00

    Abstract: A semiconductor memory device including a substrate, first pad layers and a second pad layer on the substrate, a pattern structure including first openings on the first pad layers and a second opening on the second pad layer, and having first and second regions, gate electrodes on the pattern structure and each including a pad region, channel structures penetrating through the gate electrodes in the first region, gate contact plugs electrically connected to the gate electrodes through the pad region of each of the gate electrodes and extending in a vertical direction to penetrate the first openings and connected to the first pad layers, a source contact plug, extending in the vertical direction penetrating the second opening and connected to the second pad layer, and a source connection patter under the pattern structure and in contact with the source contact plug and the second pad layer may be provided.

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