公开(公告)号：US11996443B2

公开(公告)日：2024-05-28

申请号：US17729676

申请日：2022-04-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungkeun Lim ,  Unki Kim ,  Yuyeong Jo ,  Yihwan Kim ,  Jinbum Kim ,  Pankwi Park ,  Ilgyou Shin ,  Seunghun Lee

IPC: H01L29/06 ,  H01L21/02 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/0638 ,  H01L21/0245 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785

Abstract: A semiconductor device includes; an active region; an isolation region defining the active region; a barrier layer on the active region; an upper semiconductor layer on the barrier layer; and a gate structure covering an upper surface, a lower surface, and side surfaces of the upper semiconductor layer in a first direction. The first direction is a direction parallel to an upper surface of the active region, and the barrier layer is disposed between the gate structure and the active region.

公开(公告)号：US20240087884A1

公开(公告)日：2024-03-14

申请号：US18513297

申请日：2023-11-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： GYEOM KIM ,  Dongwoo Kim ,  Jihye Yi ,  JINBUM KIM ,  Sangmoon Lee ,  Seunghun Lee

IPC: H01L21/02 ,  H01L21/285 ,  H01L21/768 ,  H01L21/8234 ,  H01L23/485 ,  H01L29/06 ,  H01L29/08 ,  H01L29/165 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

CPC classification number: H01L21/02293 ,  H01L21/28518 ,  H01L21/76897 ,  H01L21/823431 ,  H01L21/823481 ,  H01L23/485 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/41766 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/66553 ,  H01L29/6656 ,  H01L29/775 ,  H01L29/7848 ,  H01L29/78696

Abstract: A semiconductor device is provided. The semiconductor device includes: an active region on a semiconductor substrate; a channel region on the active region; a source/drain region adjacent to the channel region on the active region; a gate structure overlapping the channel region, on the channel region; a contact structure on the source/drain region; a gate spacer between the contact structure and the gate structure; and a contact spacer surrounding a side surface of the contact structure. The source/drain region includes a first epitaxial region having a recessed surface and a second epitaxial region on the recessed surface of the first epitaxial region, and the second epitaxial region includes an extended portion, extended from a portion overlapping the contact structure in a vertical direction, in a horizontal direction and overlapping the contact spacer in the vertical direction.

公开(公告)号：US20240049438A1

公开(公告)日：2024-02-08

申请号：US18116107

申请日：2023-03-01

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seunghun Lee ,  Seokhyeon Yoon ,  Kyowook Lee ,  Hyejin Lee

IPC: H10B10/00 ,  G11C11/412

CPC classification number: H10B10/12 ,  G11C11/412

Abstract: A semiconductor device includes a substrate, a SRAM cell including a pass-gate transistor, a pull-down transistor, and a pull-up transistor on substrate. The SRAM cell includes an active fin extending in a first direction, the pass-gate transistor and the pull-down transistor are disposed adjacent to each other on the active fin in the first direction, the pass-gate transistor includes first channel layers, a first gate electrode, first source/drain regions, and first inner spacers, the pull-down transistor includes second channel layers, a second gate electrode, second source/drain regions, and second inner spacers, and one of the first inner spacers and one of the second inner spacers are disposed on the same height level and have different thicknesses in the first direction.

公开(公告)号：US11869765B2

公开(公告)日：2024-01-09

申请号：US17853990

申请日：2022-06-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyeom Kim ,  Dongwoo Kim ,  Jihye Yi ,  Jinbum Kim ,  Sangmoon Lee ,  Seunghun Lee

IPC: H01L21/02 ,  H01L21/285 ,  H01L21/768 ,  H01L21/8234 ,  H01L23/485 ,  H01L29/06 ,  H01L29/08 ,  H01L29/165 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786 ,  H01L23/532 ,  B82Y10/00 ,  H01L29/10 ,  H01L29/161 ,  H01L21/28

CPC classification number: H01L21/02293 ,  H01L21/28518 ,  H01L21/76897 ,  H01L21/823431 ,  H01L21/823481 ,  H01L23/485 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/41766 ,  H01L29/41791 ,  H01L29/42392 ,  H01L29/6656 ,  H01L29/66439 ,  H01L29/66553 ,  H01L29/775 ,  H01L29/7848 ,  H01L29/78696

Abstract: A semiconductor device is provided. The semiconductor device includes: an active region on a semiconductor substrate; a channel region on the active region; a source/drain region adjacent to the channel region on the active region; a gate structure overlapping the channel region, on the channel region; a contact structure on the source/drain region; a gate spacer between the contact structure and the gate structure; and a contact spacer surrounding a side surface of the contact structure. The source/drain region includes a first epitaxial region having a recessed surface and a second epitaxial region on the recessed surface of the first epitaxial region, and the second epitaxial region includes an extended portion, extended from a portion overlapping the contact structure in a vertical direction, in a horizontal direction and overlapping the contact spacer in the vertical direction.

公开(公告)号：US20240006485A1

公开(公告)日：2024-01-04

申请号：US18196081

申请日：2023-05-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seokhyeon Yoon ,  Taehyeon Kim ,  Seunghun Lee ,  Hyeongrae Kim

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/786 ,  H01L29/775 ,  H01L29/423

CPC classification number: H01L29/0673 ,  H01L29/66545 ,  H01L29/78696 ,  H01L29/775 ,  H01L29/42392

Abstract: A semiconductor device include first and second active patterns, first and second gate structures, and first and second source/drain layers. The first and second active patterns extend on the first and second regions in a first direction. The first and second gate structures are formed on the first and second active patterns, and extend in a second direction. The first and second source/drain layers are formed on the first and second active patterns adjacent to the first and second gate structures. The first active pattern includes a first well having first and second impurity regions. The second active pattern includes a second well having third and fourth impurity regions. A width in the second direction of the first impurity region is greater than that of the second impurity region. A width in the second direction of the third impurity region is smaller than that of the fourth impurity region.

公开(公告)号：US20230317725A1

公开(公告)日：2023-10-05

申请号：US18332298

申请日：2023-06-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Keomyoung Shin ,  Pankwi Park ,  Seunghun Lee

IPC: H01L29/08 ,  H01L29/06 ,  H01L29/26 ,  H01L29/78 ,  H01L27/088

CPC classification number: H01L27/0886 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/26 ,  H01L29/785

Abstract: An integrated circuit (IC) device includes a fin-type active region extending lengthwise in a first direction, a plurality of nanosheets overlapping each other in a second direction on a fin top surface of the fin-type active region, and a source/drain region on the fin-type active region and facing the plurality of nanosheets in the first direction. The plurality of nanosheets include a first nanosheet, which is closest to the fin top surface of the fin-type active region and has a shortest length in the first direction, from among the plurality of nanosheets. The source/drain region includes a source/drain main region and a first source/drain protruding region protruding from the source/drain main region. The first source/drain protruding region protrudes from the source/drain main region toward the first nanosheet and overlaps portions of the plurality of nanosheets in the second direction.

公开(公告)号：US20220254878A1

公开(公告)日：2022-08-11

申请号：US17729676

申请日：2022-04-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sungkeun Lim ,  Unki Kim ,  Yuyeong Jo ,  Yihwan Kim ,  Jinbum Kim ,  Pankwi Park ,  Ilgyou Shin ,  Seunghun Lee

IPC: H01L29/06 ,  H01L29/66 ,  H01L29/78 ,  H01L21/02

Abstract: A semiconductor device includes; an active region; an isolation region defining the active region; a barrier layer on the active region; an upper semiconductor layer on the barrier layer; and a gate structure covering an upper surface, a lower surface, and side surfaces of the upper semiconductor layer in a first direction. The first direction is a direction parallel to an upper surface of the active region, and the barrier layer is disposed between the gate structure and the active region.

公开(公告)号：US11205649B2

公开(公告)日：2021-12-21

申请号：US16946060

申请日：2020-06-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyungin Choi ,  Dahye Kim ,  Jaemun Kim ,  Jinbum Kim ,  Seunghun Lee

IPC: H01L27/088 ,  H01L21/02 ,  H01L21/306 ,  H01L21/762 ,  H01L21/8234 ,  H01L29/06 ,  H01L29/165 ,  H01L29/66

Abstract: Integrated circuit devices may include a fin-type active area, a semiconductor liner contacting a side wall of the fin-type active area and including a protrusion portion protruding outward from the fin-type active area in the vicinity of an edge of an upper surface of the fin-type active area, and an isolation layer spaced apart from the fin-type active area with the semiconductor liner therebetween. To manufacture the integrated circuit devices, a crystalline semiconductor layer covering the fin-type active area with a first thickness and an amorphous semiconductor layer covering the mask pattern with a second thickness may be formed, an extended crystalline semiconductor layer covering the mask pattern may be formed by crystalizing the amorphous semiconductor layer, and a semiconductor liner including a protrusion portion may be formed from the extended crystalline semiconductor layer and the crystalline semiconductor layer.

公开(公告)号：US20210118877A1

公开(公告)日：2021-04-22

申请号：US16991530

申请日：2020-08-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaemun Kim ,  Gyeom Kim ,  Dahye Kim ,  Jinbum Kim ,  Kyungin Choi ,  llgyou Shin ,  Seunghun Lee

IPC: H01L27/088 ,  H01L21/8234 ,  H01L21/02

Abstract: An integrated circuit device includes: a fin-type active area protruding from a substrate, extending in a first direction parallel to an upper surface of the substrate, and including a first semiconductor material; an isolation layer arranged on the substrate and covering a lower portion of a sidewall of the fin-type active area, the isolation layer including an insulation liner conformally arranged on the lower portion of the sidewall of the fin-type active area, and an insulation filling layer on the insulation liner; a capping layer surrounding an upper surface and the sidewall of the fin-type active area, including a second semiconductor material different from the first semiconductor material, and with the capping layer having an upper surface, a sidewall, and a facet surface between the upper surface and the sidewall; and a gate structure arranged on the capping layer and extending in a second direction perpendicular to the first direction.

公开(公告)号：US12215454B2

公开(公告)日：2025-02-04

申请号：US17728431

申请日：2022-04-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junhyun Park ,  Kanghyun Kim ,  Seunghun Lee

IPC: D06F37/30 ,  D06F34/18 ,  D06F103/04 ,  D06F105/48

Abstract: A washer includes a drum, a motor connected to the drum, a motor drive connected to the motor and configured to supply a driving current to the motor to rotate the drum, and a processor connected to the motor drive. The processor is configured to control the motor drive to supply the driving current to the motor to rotate the motor at a target speed and to determine a magnitude of a load accommodated in the drum while controlling a rotational speed of the motor within a predetermined range.