公开(公告)号：US10304555B2

公开(公告)日：2019-05-28

申请号：US15410043

申请日：2017-01-19

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hiroyuki Miyake ,  Kouhei Toyotaka

IPC: H01L27/12 ,  G02F1/1368 ,  G11C19/28 ,  H01L29/786 ,  G02F1/1362 ,  G09G3/36

Abstract: To provide a semiconductor device having a high aperture ratio and including a capacitor with a high charge capacitance. To provide a semiconductor device with a narrow bezel. A transistor over a substrate; a first conductive film over a surface over which a gate electrode of the transistor is provided; a second conductive film over a surface over which a pair of electrodes of the transistor is provided; and a first light-transmitting conductive film electrically connected to the first conductive film and the second conductive film are included. The second conductive film overlaps the first conductive film with a gate insulating film of the transistor laid between the second conductive film and the first conductive film.

公开(公告)号：US10074747B2

公开(公告)日：2018-09-11

申请号：US15372493

申请日：2016-12-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kei Takahashi ,  Kouhei Toyotaka ,  Masashi Tsubuku ,  Kosei Noda ,  Hideaki Kuwabara

IPC: H01L29/78 ,  H01L29/786 ,  H01L23/66 ,  H01L29/24 ,  H01L27/088 ,  H01L29/66 ,  H01L21/8236 ,  G06K19/077 ,  G11C7/00 ,  G11C19/28 ,  H02M3/07

CPC classification number: H01L29/78609 ,  G06K19/07758 ,  G11C7/00 ,  G11C19/28 ,  H01L21/8236 ,  H01L23/66 ,  H01L27/0883 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/26 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2223/6677 ,  H02M3/07

Abstract: An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.

公开(公告)号：US10073551B2

公开(公告)日：2018-09-11

申请号：US15225950

申请日：2016-08-02

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Daisuke Kubota ,  Kouhei Toyotaka

IPC: G06F3/041 ,  G09G3/36 ,  G09G3/3225 ,  G09G5/36

CPC classification number: G06F3/0414 ,  G06F3/0488 ,  G09G3/3225 ,  G09G3/3648 ,  G09G5/363 ,  G09G2300/023 ,  G09G2300/046 ,  G09G2310/06 ,  G09G2330/023 ,  G09G2354/00 ,  G09G2360/144

Abstract: Provided is a novel display panel which is highly convenient or reliable or a driving method thereof. The display panel includes a first display element, a first conductive film electrically connected to the first display element, a second conductive film having a region overlapping with the first conductive film, an insulating film having a region sandwiched between the second conductive film and the first conductive film, a pixel circuit electrically connected to the second conductive film, and a second display element electrically connected to the pixel circuit. The insulating film has an opening. The second conductive film is electrically connected to the first conductive film in the opening.

公开(公告)号：US09886905B2

公开(公告)日：2018-02-06

申请号：US15221662

申请日：2016-07-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kouhei Toyotaka

IPC: G09G3/3233 ,  G09G3/20

CPC classification number: G09G3/3233 ,  G09G3/20 ,  G09G2300/0809 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2310/08 ,  G09G2330/021

Abstract: A display device includes a plurality of pulse output circuits each of which outputs signals to one of the two kinds of scan lines and a plurality of inverted pulse output circuits each of which outputs, to the other of the two kinds of scan lines, inverted or substantially inverted signals of the signals output from the pulse output circuits. Each of the plurality of inverted pulse output circuits operates with at least two kinds of signals used for the operation of the plurality of pulse output circuits. Thus, through current generated in the inverted pulse output circuits can be reduced.

公开(公告)号：US09482919B2

公开(公告)日：2016-11-01

申请号：US14184996

申请日：2014-02-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Hideaki Shishido ,  Hiroyuki Miyake ,  Seiko Inoue ,  Kouhei Toyotaka ,  Koji Kusunoki

IPC: G02F1/1362 ,  H01L29/66 ,  H01L27/12

CPC classification number: G02F1/136286 ,  G02F1/136204 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/66

Abstract: Transistors each include a gate electrode, a gate insulating layer over the gate electrode, an oxide semiconductor layer over the gate insulating layer, and a source electrode and a drain electrode over the oxide semiconductor layer. A driver circuit portion includes first to third wirings formed in the same step as the gate electrode, fourth to sixth wirings formed in the same step as the source electrode and the drain electrode, a seventh wiring formed in the same step as a pixel electrode, a first region where the second wiring intersects with the fifth wiring, and a second region where the third wiring intersects with the sixth wiring. The first wiring is connected to the fourth wiring through the seventh wiring. A distance between the wirings in the second region is longer than that in the first region.

Abstract translation: 晶体管各自包括栅电极，栅电极上的栅极绝缘层，栅极绝缘层上的氧化物半导体层，以及氧化物半导体层上的源电极和漏电极。 驱动器电路部分包括以与栅电极相同的步骤形成的第一至第三布线，以与源电极和漏电极相同的步骤形成的第四至第六布线，与像素电极在相同步骤中形成的第七布线， 第二布线与第五布线相交的第一区域和第三布线与第六布线相交的第二区域。 第一布线通过第七布线连接到第四布线。 第二区域中的布线之间的距离比第一区域长。

公开(公告)号：US09337343B2

公开(公告)日：2016-05-10

申请号：US14185221

申请日：2014-02-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Hiroyuki Miyake ,  Kouhei Toyotaka

IPC: G09G3/36 ,  G11C19/28 ,  H01L29/786 ,  H01L27/12

CPC classification number: G11C19/28 ,  G02F1/136277 ,  G09G3/3677 ,  G09G2310/0286 ,  G09G2310/0291 ,  G09G2310/0297 ,  H01L27/1225 ,  H01L29/7869

Abstract: To provide a semiconductor device having a high aperture ratio and including a capacitor with a high charge capacitance. To provide a semiconductor device with a narrow bezel. A transistor over a substrate; a first conductive film over a surface over which a gate electrode of the transistor is provided; a second conductive film over a surface over which a pair of electrodes of the transistor is provided; and a first light-transmitting conductive film electrically connected to the first conductive film and the second conductive film are included. The second conductive film overlaps the first conductive film with a gate insulating film of the transistor laid between the second conductive film and the first conductive film.

Abstract translation: 提供具有高孔径比的半导体器件，并且包括具有高电荷电容的电容器。 提供具有窄边框的半导体器件。 衬底上的晶体管; 在其上提供晶体管的栅电极的表面上的第一导电膜; 在其上提供晶体管的一对电极的表面上的第二导电膜; 并且包括与第一导电膜和第二导电膜电连接的第一透光性导电膜。 第二导电膜与第二导电膜和第一导电膜之间的晶体管的栅极绝缘膜与第一导电膜重叠。

公开(公告)号：US09171842B2

公开(公告)日：2015-10-27

申请号：US13947741

申请日：2013-07-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kouhei Toyotaka

IPC: H01L29/10 ,  H01L27/088 ,  H01L27/12

CPC classification number: H01L27/088 ,  H01L27/1225

Abstract: A highly reliable semiconductor device in which a shift in the threshold voltage of a transistor due to deterioration is prevented is provided. The semiconductor device is formed using a sequential circuit including: a first transistor controlling the electrical connection between a first wiring and a second wiring; a second transistor and a third transistor in each of which a source and a drain are electrically connected to each other and which control the electrical connection between the second wiring and a third wiring; and a switch group controlling the electrical connection between a gate of the first transistor and the third wiring or a fourth wiring, the electrical connection between a gate of the second transistor and the third wiring or the fourth wiring, and the electrical connection between a gate of the third transistor and the third wiring or the fourth wiring in response to a control signal.

Abstract translation: 提供了一种高度可靠的半导体器件，其中防止由于劣化导致的晶体管的阈值电压偏移。 半导体器件使用顺序电路形成，该顺序电路包括：第一晶体管，其控制第一布线和第二布线之间的电连接; 第二晶体管和第三晶体管，其中源极和漏极彼此电连接并且控制第二布线和第三布线之间的电连接; 以及控制第一晶体管的栅极与第三布线或第四布线之间的电连接的开关组，第二晶体管的栅极与第三布线或第四布线之间的电连接以及栅极之间的电连接 的第三晶体管和第三布线或第四布线。

公开(公告)号：US08576978B2

公开(公告)日：2013-11-05

申请号：US13660470

申请日：2012-10-25

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kouhei Toyotaka

IPC: G11C19/00

CPC classification number: H03K19/0013 ,  G11C19/184 ,  G11C19/28 ,  H03K19/096 ,  H03K23/44

Abstract: An object of the present invention is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. In an embodiment of the pulse signal output circuit, a transistor has a source terminal or a drain terminal connected to a gate electrode of another transistor having a source terminal or a drain terminal forming an output terminal of the pulse signal output circuit, the channel length of the transistor being longer than the channel length of the other transistor. Thereby, the amount of a leakage current modifying the gate potential of the other transistor can be reduced, and a malfunction of the pulse signal output circuit can be prevented.

Abstract translation: 本发明的目的是提供一种能够稳定运行的脉冲信号输出电路和包括脉冲信号输出电路的移位寄存器。 在脉冲信号输出电路的实施例中，晶体管具有连接到具有形成脉冲信号输出电路的输出端的源极端子或漏极端子的另一晶体管的栅电极的源极端子或漏极端子，沟道长度 的晶体管比另一个晶体管的沟道长度长。 因此，可以减小修正另一个晶体管的栅极电位的漏电流的量，并且可以防止脉冲信号输出电路的故障。

公开(公告)号：US20130250529A1

公开(公告)日：2013-09-26

申请号：US13891364

申请日：2013-05-10

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Seiko Amano ,  Kouhei Toyotaka ,  Hiroyuki Miyake ,  Aya Miyazaki ,  Hideaki Shishido ,  Koji Kusunoki

IPC: G11C19/28 ,  H05K7/02 ,  H01L25/03

CPC classification number: G11C19/28 ,  G09G3/3677 ,  G09G3/3696 ,  G09G2300/0809 ,  G09G2310/0286 ,  G11C19/184 ,  H01L25/03 ,  H01L27/1222 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1251 ,  H01L27/127 ,  H01L27/1288 ,  H01L2924/0002 ,  H03K19/0013 ,  H05K7/02 ,  H01L2924/00

Abstract: An object is to provide a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit. A pulse signal output circuit according to one embodiment of the disclosed invention includes first to tenth transistors. The ratio W/L of the channel width W to the channel length L of the first transistor and W/L of the third transistor are each larger than W/L of the sixth transistor. W/L of the fifth transistor is larger than W/L of the sixth transistor. W/L of the fifth transistor is equal to W/L of the seventh transistor. W/L of the third transistor is larger than W/L of the fourth transistor. With such a structure, a pulse signal output circuit capable of operating stably and a shift register including the pulse signal output circuit can be provided.

Abstract translation: 目的在于提供能够稳定运行的脉冲信号输出电路和包括脉冲信号输出电路的移位寄存器。 根据所公开的发明的一个实施例的脉冲信号输出电路包括第一至第十晶体管。 沟道宽度W与第一晶体管的沟道长度L和第三晶体管的W / L的比W / L分别大于第六晶体管的W / L。 第五晶体管的W / L大于第六晶体管的W / L。 第五晶体管的W / L等于第七晶体管的W / L。 第三晶体管的W / L大于第四晶体管的W / L。 通过这样的结构，可以提供能够稳定运行的脉冲信号输出电路和包括脉冲信号输出电路的移位寄存器。

公开(公告)号：US20130135278A1

公开(公告)日：2013-05-30

申请号：US13687744

申请日：2012-11-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kouhei Toyotaka

IPC: G09G3/30

CPC classification number: G09G3/30 ,  G09G3/3233 ,  G09G3/3266 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2300/0861 ,  G09G2310/0262 ,  G09G2310/0267 ,  G09G2310/0286 ,  G09G2320/043 ,  G09G2330/021 ,  G11C19/28 ,  Y02B20/343 ,  Y02B20/346

Abstract: To reduce power consumption of a display device including a scan line driver circuit formed using either n-channel transistors or p-channel transistors when the scan line driver circuit outputs, to one of two kinds of scan lines, inverted or substantially inverted signals of signals output to the other of the two kinds of scan lines. The display device includes a plurality of pulse output circuits each of which outputs a signal to one of two kinds of scan lines and a plurality of inverted pulse output circuits each of which outputs, to the other of the two kinds of scan lines, an inverted or substantially inverted signal output from the each of the pulse output circuits. The plurality of inverted pulse output circuits operate with signals used for the operation of the plurality of pulse output circuits. Thus, through current generated in the inverted pulse output circuits can be reduced.

Abstract translation: 为了降低显示装置的功耗，包括当扫描线驱动电路输出时，使用n沟道晶体管或p沟道晶体管形成的扫描线驱动电路，将两个扫描线中的一个扫描线反转或基本上反相的信号信号 输出到两种扫描线中的另一条。 显示装置包括多个脉冲输出电路，每个脉冲输出电路向两种扫描线之一输出信号，多个反相脉冲输出电路分别向两条扫描线中的另一条输出反相 或基本上反相的信号从每个脉冲输出电路输出。 多个反相脉冲输出电路与用于多个脉冲输出电路的操作的信号一起工作。 因此，可以减少在反相脉冲输出电路中产生的电流。