公开(公告)号：US10096690B2

公开(公告)日：2018-10-09

申请号：US15412924

申请日：2017-01-23

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Jiun-Lei Jerry Yu ,  Fu-Wei Yao ,  Chen-Ju Yu ,  Chun-Wei Hsu ,  King-Yuen Wong

IPC: H01L21/28 ,  H01L27/092 ,  H01L29/66 ,  H01L29/778 ,  H01L21/02 ,  H01L29/20 ,  H01L29/205 ,  H01L29/40 ,  H01L29/45

Abstract: A circuit structure includes a substrate, a III-V semiconductor compound over the substrate, a AlxGa(1-X)N (AlGaN) layer over the III-V semiconductor compound, a gate over the AlGaN layer, a passivation film over the gate and over a portion of the AlGaN layer, a source structure, and a drain structure on an opposite side of the gate from the source structure, wherein X ranges from 0.1 to 1. The source structure has a source contact portion and an overhead portion. The overhead portion is over at least a portion of the passivation film between the source contact portion and the gate. A distance between the source contact portion and the gate is less than a distance between the gate and the drain structure.

公开(公告)号：US10050117B2

公开(公告)日：2018-08-14

申请号：US15645463

申请日：2017-07-10

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chun-Wei Hsu ,  Jiun-Lei Jerry Yu ,  Fu-Wei Yao ,  Chen-Ju Yu ,  Fu-Chih Yang ,  Chun Lin Tsai

IPC: H01L29/66 ,  H01L29/778 ,  H01L21/02 ,  H01L29/10 ,  H01L29/20 ,  H01L29/267 ,  H01L29/417 ,  H01L29/43

Abstract: A high electron mobility transistor (HEMT) includes a first III-V compound layer and a second III-V compound layer disposed on the first III-V compound layer and is different from the first III-V compound layer in composition. A source feature and a drain feature are disposed on the second III-V compound layer. A p-type layer is disposed on a portion of the second III-V compound layer between the source feature and the drain feature. A gate electrode is disposed on the p-type layer. A capping layer is disposed on the second III-V compound layer.

公开(公告)号：US09748372B2

公开(公告)日：2017-08-29

申请号：US14926783

申请日：2015-10-29

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： King-Yuen Wong ,  Chen-Ju Yu ,  Fu-Wei Yao ,  Chun-Wei Hsu ,  Jiun-Lei Jerry Yu ,  Chih-Wen Hsiung ,  Fu-Chih Yang

IPC: H01L29/778 ,  H01L29/51 ,  H01L29/66 ,  H01L21/28 ,  H01L29/20 ,  H01L29/207

CPC classification number: H01L29/7786 ,  H01L21/28264 ,  H01L29/2003 ,  H01L29/207 ,  H01L29/513 ,  H01L29/517 ,  H01L29/66462 ,  H01L29/7787

Abstract: A method of forming a semiconductor structure includes growing a second III-V compound layer over a first III-V compound layer, wherein the second III-V compound layer has a different band gap from the first III-V compound layer. The method further includes forming a source feature and a drain feature over the second III-V compound layer. The method further includes forming a gate dielectric layer over the second III-V compound layer, the source feature and the drain feature. The method further includes implanting at least one fluorine-containing compound into a portion of the gate dielectric layer. The method further includes forming a gate electrode over the portion of the gate dielectric layer.

公开(公告)号：US09728613B2

公开(公告)日：2017-08-08

申请号：US14855460

申请日：2015-09-16

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Fu-Wei Yao ,  Chun-Wei Hsu ,  Chen-Ju Yu ,  Jiun-Lei Jerry Yu ,  Fu-Chih Yang ,  Chih-Wen Hsiung ,  King-Yuen Wong

IPC: H01L29/66 ,  H01L29/40 ,  H01L29/778 ,  H01L29/20

CPC classification number: H01L29/402 ,  H01L29/2003 ,  H01L29/66462 ,  H01L29/7787

Abstract: A transistor includes a first layer over a substrate. The transistor also includes a second layer over the first layer. The transistor further includes a carrier channel layer at an interface of the first layer and the second layer. The transistor additionally includes a gate structure, a drain, and a source over the second layer. The transistor also includes a passivation material in the second layer between an edge of the gate structure and an edge of the drain in a top-side view. The carrier channel layer has a smaller surface area than the first layer between the edge of the gate structure and the edge of the drain in the top-side view.

公开(公告)号：US09583588B2

公开(公告)日：2017-02-28

申请号：US14533864

申请日：2014-11-05

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Chen-Ju Yu ,  Chih-Wen Hsiung ,  Fu-Wei Yao ,  Chun-Wei Hsu ,  King-Yuen Wong ,  Jiun-Lei Jerry Yu ,  Fu-Chih Yang

IPC: H01L29/778 ,  H01L29/06 ,  H01L21/335 ,  H01L21/336 ,  H01L29/66 ,  H01L29/423 ,  H01L29/10 ,  H01L29/20 ,  H01L21/02 ,  H01L21/225 ,  H01L21/3065 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/3213 ,  H01L21/324 ,  H01L29/201 ,  H01L29/205

CPC classification number: H01L29/66462 ,  H01L21/0254 ,  H01L21/2258 ,  H01L21/3065 ,  H01L21/32051 ,  H01L21/321 ,  H01L21/32133 ,  H01L21/324 ,  H01L29/0653 ,  H01L29/0843 ,  H01L29/1029 ,  H01L29/2003 ,  H01L29/201 ,  H01L29/205 ,  H01L29/42316 ,  H01L29/66431 ,  H01L29/7787

Abstract: A method includes epitaxially growing a gallium nitride (GaN) layer over a silicon substrate. The method further includes epitaxially growing a donor-supply layer over the GaN layer. The method further includes forming a source and a drain on the donor-supply layer. The method further includes forming a gate structure between the source and the drain on the donor-supply layer. The method further includes plasma etching a portion of a drift region of the donor-supply layer to a depth of less than 60% of a donor-supply layer thickness. The method further includes depositing a dielectric layer over the donor-supply layer.

Abstract translation: 一种方法包括在硅衬底上外延生长氮化镓（GaN）层。 该方法还包括在GaN层上外延生长施主供体层。 该方法还包括在供体层上形成源极和漏极。 该方法还包括在供体层上的源极和漏极之间形成栅极结构。 该方法还包括将供体供体层的漂移区域的一部分等离子体蚀刻到小于施主供体层厚度的60％的深度。 该方法还包括在供体供体层上沉积介电层。

公开(公告)号：US09553182B2

公开(公告)日：2017-01-24

申请号：US14827839

申请日：2015-08-17

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Jiun-Lei Jerry Yu ,  Fu-Wei Yao ,  Chen-Ju Yu ,  Chun-Wei Hsu ,  King-Yuen Wong

IPC: H01L21/28 ,  H01L27/092 ,  H01L29/778 ,  H01L29/20 ,  H01L29/205 ,  H01L29/40 ,  H01L29/45 ,  H01L29/66

CPC classification number: H01L29/66462 ,  H01L21/02381 ,  H01L21/0254 ,  H01L21/0262 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/402 ,  H01L29/452 ,  H01L29/778 ,  H01L29/7787

Abstract: A circuit structure includes a substrate, a III-V semiconductor compound over the substrate, a AlxGa(1−X)N (AlGaN) layer over the III-V semiconductor compound, a gate over the AlGaN layer, a passivation film over the gate and over a portion of the AlGaN layer, a source structure, and a drain structure on an opposite side of the gate from the source structure, wherein X ranges from 0.1 to 1. The source structure has a source contact portion and an overhead portion. The overhead portion is over at least a portion of the passivation film between the source contact portion and the gate. A distance between the source contact portion and the gate is less than a distance between the gate and the drain structure.

Abstract translation: 电路结构包括衬底，衬底上的III-V半导体化合物，III-V半导体化合物上的Al x Ga（1-X）N（AlGaN）层，AlGaN层上的栅极，栅极上的钝化膜 并且在源极结构的栅极的相对侧上的AlGaN层的一部分，源极结构和漏极结构，其中X的范围为0.1至1.源极结构具有源极接触部分和顶部部分。 顶部部分在源极接触部分和栅极之间的钝化膜的至少一部分之上。 源极接触部分和栅极之间的距离小于栅极和漏极结构之间的距离。

公开(公告)号：US09419093B2

公开(公告)日：2016-08-16

申请号：US14585758

申请日：2014-12-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Chun-Wei Hsu ,  Jiun-Lei Jerry Yu ,  Fu-Wei Yao ,  Chen-Ju Yu ,  Po-Chih Chen ,  King-Yuen Wong

IPC: H01L21/338 ,  H01L29/66 ,  H01L29/267 ,  H01L29/43 ,  H01L29/778 ,  H01L29/417 ,  H01L29/10

CPC classification number: H01L29/66462 ,  H01L29/0653 ,  H01L29/1066 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/267 ,  H01L29/41766 ,  H01L29/432 ,  H01L29/7786 ,  H01L29/7787

Abstract: A method of forming a high electron mobility transistor (HEMT) includes forming a second III-V compound layer on a first III-V compound layer, forming a source feature and a drain feature on the second III-V compound layer, depositing a p-type layer on a portion of the second III-V compound layer between the source feature and the drain feature, and forming a gate electrode on the p-type layer. A carrier channel is located between the first III-V compound layer and the second III-V compound layer.

Abstract translation: 形成高电子迁移率晶体管（HEMT）的方法包括在第一III-V化合物层上形成第二III-V化合物层，在第二III-V化合物层上形成源特征和漏极特征，沉积p 在源特征和漏极特征之间的第二III-V化合物层的一部分上形成p型层，并在p型层上形成栅电极。 载体通道位于第一III-V化合物层和第二III-V化合物层之间。

公开(公告)号：US09263565B2

公开(公告)日：2016-02-16

申请号：US14587747

申请日：2014-12-31

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Po-Chih Chen ,  Jiun-Lei Jerry Yu ,  Fu-Wei Yao ,  Chun-Wei Hsu ,  Fu-Chih Yang ,  Chun Lin Tsai

IPC: H01L29/66 ,  H01L29/778 ,  H01L29/205 ,  H01L29/20

CPC classification number: H01L29/7784 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L29/778 ,  H01L29/7787

Abstract: A semiconductor structure comprises a first layer. The first layer comprises a first III-V semiconductor material. The semiconductor structure also comprises a second layer over the first layer. The second layer comprises a second III-V semiconductor material different from the first III-V semiconductor material. The semiconductor structure further comprises an insulating layer over the second layer. The insulating layer is patterned to expose a portion of the first layer. The exposed portion of the first layer comprises electrons of the second layer. The semiconductor structure additionally comprises an intermetallic compound over the exposed portion of the first layer.

Abstract translation: 半导体结构包括第一层。 第一层包括第一III-V族半导体材料。 半导体结构还包括在第一层上的第二层。 第二层包括与第一III-V族半导体材料不同的第二III-V族半导体材料。 半导体结构还包括在第二层上的绝缘层。 图案化绝缘层以暴露第一层的一部分。 第一层的暴露部分包括第二层的电子。 半导体结构还包括在第一层的暴露部分上的金属间化合物。

公开(公告)号：US09111904B2

公开(公告)日：2015-08-18

申请号：US13650548

申请日：2012-10-12

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Jiun-Lei Jerry Yu ,  Fu-Wei Yao ,  Chen-Ju Yu ,  Chun-Wei Hsu ,  King-Yuen Wong

IPC: H01L21/28 ,  H01L27/092 ,  H01L29/40 ,  H01L29/45 ,  H01L29/66 ,  H01L29/778

CPC classification number: H01L29/66462 ,  H01L21/02381 ,  H01L21/0254 ,  H01L21/0262 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/402 ,  H01L29/452 ,  H01L29/778 ,  H01L29/7787

Abstract: A method of making a high-electron mobility transistor (HEMT) includes forming an unintentionally doped gallium nitride (UID GaN) layer over a silicon substrate, a donor-supply layer over the UID GaN layer, a gate, a passivation layer over the gate and portions of the donor-supply layer, an ohmic source structure and an ohmic drain structure over the donor-supply layer and portions of the passivation layer. The source structure includes a source contact portion and an overhead portion. The overhead portion overlaps the passivation layer between the source contact portion and the gate, and may overlap a portion of the gate and a portion of the passivation layer between the gate and the drain structure.

Abstract translation: 制造高电子迁移率晶体管（HEMT）的方法包括在硅衬底上形成无意掺杂的氮化镓（UID GaN）层，UID GaN层上的施主供体层，栅极，栅极上的钝化层 以及施主供体层和钝化层的部分上的供体供体层，欧姆源结构和欧姆漏极结构的部分。 源结构包括源极接触部分和顶部部分。 顶部部分与源极接触部分和栅极之间的钝化层重叠，并且可以在栅极和漏极结构之间与栅极的一部分和钝化层的一部分重叠。

公开(公告)号：US08946012B2

公开(公告)日：2015-02-03

申请号：US14200777

申请日：2014-03-07

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Po-Chih Chen ,  Jiun-Lei Jerry Yu ,  Fu-Wei Yao ,  Chun-Wei Hsu ,  Fu-Chih Yang ,  Chun Lin Tsai

IPC: H01L21/338 ,  H01L29/66 ,  H01L29/778 ,  H01L29/20

CPC classification number: H01L29/7784 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L29/778 ,  H01L29/7787

Abstract: A method of forming a semiconductor structure having a substrate is disclosed. The semiconductor structure includes a first layer formed in contact with the substrate. The first layer made of a first III-V semiconductor material selected from GaN, GaAs and InP. A second layer is formed on the first layer. The second layer made of a second III-V semiconductor material selected from AlGaN, AlGaAs and AlInP. An interface is between the first layer and the second layer forms a carrier channel. An insulating layer is formed on the second layer. Portions of the insulating layer and the second layer are removed to expose a top surface of the first layer. A metal feature is formed in contact with the carrier channel and the metal feature is annealed to form a corresponding intermetallic compound.

Abstract translation: 公开了一种形成具有衬底的半导体结构的方法。 半导体结构包括与衬底接触形成的第一层。 第一层由选自GaN，GaAs和InP的第一III-V族半导体材料制成。 在第一层上形成第二层。 第二层由选自AlGaN，AlGaAs和AlInP的第二III-V半导体材料制成。 在第一层和第二层之间的界面形成载体通道。 绝缘层形成在第二层上。 除去绝缘层和第二层的部分以露出第一层的顶表面。 形成与载体通道接触的金属特征，金属特征退火以形成对应的金属间化合物。