公开(公告)号：US20110306985A1

公开(公告)日：2011-12-15

申请号：US12986848

申请日：2011-01-07

Applicant: Takayuki INOUE ,  Koichi KURAMOTO ,  Yoshio NAKASHIMA ,  Naohiko SUGITA ,  Mamoru MITSUISHI ,  Yoshikazu NAKASHIMA

Inventor： Takayuki INOUE ,  Koichi KURAMOTO ,  Yoshio NAKASHIMA ,  Naohiko SUGITA ,  Mamoru MITSUISHI ,  Yoshikazu NAKASHIMA

IPC: A61B19/00

CPC classification number: G06T19/003 ,  A61B34/20 ,  A61B34/30 ,  A61B2034/107 ,  G06T15/08 ,  G06T2210/41

Abstract: A surgical assistance system for operating on biological tissue using a surgical tool attached to an arm of an automatically-controlled surgical instrument so that an optimal feed rate of the tool is calculated and outputted to the surgical instrument, the system including: a device for storing and voxelizing medical image data obtained from a biological tissue subject to surgery; a device for setting an operative location based on the shape of the biological tissue; a device for calculating a tool path along which the tool travels to perform surgery at an operative location; a device for determining the region of interference between the tool and the voxels; a device for determining the hardness of the biological tissue in the interference region; a device for calculating an optimal tool feed rate corresponding to the hardness; and a device for outputting the feed rate obtained by the calculations to the surgical instrument.

Abstract translation: 一种外科辅助系统，用于使用附接到自动控制的手术器械的臂上的外科手术工具进行生物组织的操作，从而计算出所述工具的最佳进给速率并将其输出到所述手术器械，所述系统包括： 并且从进行手术的生物组织获得的医学图像数据的体素化; 用于基于生物组织的形状设置操作位置的装置; 用于计算工具行进的工具路径以在操作位置执行手术的装置; 用于确定所述工具与所述体素之间的干涉区域的装置; 用于确定干涉区域中生物组织的硬度的装置; 用于计算对应于硬度的最佳刀具进给速率的装置; 以及用于将通过计算获得的进给速率输出到外科器械的装置。

公开(公告)号：US20110248268A1

公开(公告)日：2011-10-13

申请号：US13167762

申请日：2011-06-24

Applicant: Koji DAIRIKI ,  Takayuki IKEDA ,  Hidekazu MIYAIRI ,  Yoshiyuki KUROKAWA ,  Hiromichi GODO ,  Daisuke KAWAE ,  Takayuki INOUE ,  Satoshi KOBAYASHI

Inventor： Koji DAIRIKI ,  Takayuki IKEDA ,  Hidekazu MIYAIRI ,  Yoshiyuki KUROKAWA ,  Hiromichi GODO ,  Daisuke KAWAE ,  Takayuki INOUE ,  Satoshi KOBAYASHI

IPC: H01L29/786

CPC classification number: H01L29/78618 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78696

Abstract: To improve problems with on-state current and off-state current of thin film transistors, a thin film transistor includes a pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added, provided with a space therebetween; a conductive layer which is overlapped, over the gate insulating layer, with the gate electrode and one of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added; and an amorphous semiconductor layer which is provided successively between the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added in such a manner that the amorphous semiconductor layer extends over the gate insulating layer from the conductive layer and is in contact with both of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added.

Abstract translation: 为了改善薄膜晶体管的导通电流和截止电流的问题，薄膜晶体管包括一对杂质半导体层，赋予一种导电类型的杂质元素，在其间具有间隔; 在所述栅极绝缘层上与所述栅电极和添加了赋予一种导电类型的杂质元素的所述一对杂质半导体层中的一个重叠的导电层; 以及非晶半导体层，其被连续地设置在赋予一种导电类型的杂质元素的一对杂质半导体层之间，使得非晶半导体层从导电层延伸到栅极绝缘层上并且接触 同时添加赋予一种导电类型的杂质元素的一对杂质半导体层。

公开(公告)号：US20110039402A1

公开(公告)日：2011-02-17

申请号：US12848594

申请日：2010-08-02

Applicant: Shunpei YAMAZAKI ,  Yukie SUZUKI ,  Yasuyuki ARAI ,  Takayuki INOUE ,  Erumu KIKUCHI

Inventor： Shunpei YAMAZAKI ,  Yukie SUZUKI ,  Yasuyuki ARAI ,  Takayuki INOUE ,  Erumu KIKUCHI

IPC: H01L21/20

CPC classification number: H01L21/02595 ,  C23C16/24 ,  C23C16/4404 ,  C23C16/45565 ,  C23C16/45574 ,  C23C16/5096 ,  H01J37/3244 ,  H01J37/32449 ,  H01J37/32541 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/04 ,  H01L29/66765 ,  H01L29/78696

Abstract: A microcrystalline semiconductor film with high crystallinity is manufactured. In addition, a thin film transistor with excellent electric characteristics and high reliability, and a display device including the thin film transistor are manufactured with high productivity. A deposition gas containing silicon or germanium is introduced from an electrode including a plurality of projecting portions provided in a treatment chamber of a plasma CVD apparatus, glow discharge is caused by supplying high-frequency power, and thereby crystal particles are formed over a substrate, and a microcrystalline semiconductor film is formed over the crystal particles by a plasma CVD method.

Abstract translation: 制造具有高结晶度的微晶半导体膜。 此外，以高生产率制造具有优异的电特性和高可靠性的薄膜晶体管，以及包括薄膜晶体管的显示装置。 从设置在等离子体CVD装置的处理室中的多个突出部的电极引入含有硅或锗的沉积气体，通过供给高频电力而产生辉光放电，由此在基板上形成晶体粒子， 并且通过等离子体CVD法在晶体颗粒上形成微晶半导体膜。

公开(公告)号：US20140238924A1

公开(公告)日：2014-08-28

申请号：US14347525

申请日：2012-08-10

Applicant: Hideyuki NIIZATO ,  Takayuki INOUE ,  Kiyokazu MUKAI ,  Hitoshi MIMURA

Inventor： Hideyuki NIIZATO ,  Takayuki INOUE ,  Kiyokazu MUKAI ,  Hitoshi MIMURA

IPC: B01D24/46 ,  C02F1/00

CPC classification number: B01D24/4626 ,  B01D24/4621 ,  C02F1/004 ,  C02F2103/08 ,  C02F2201/008 ,  C02F2303/16 ,  E02B3/023 ,  E02F3/8866 ,  E03B3/04 ,  Y02W10/37

Abstract: To provide a cleaning apparatus suitable for removing clogging substances trapped in a surface layer of a sand filtration layer. A cleaning apparatus equipped with drive wheels serving as a driving device configured to move across a surface of a sand filtration layer. A pump and a jet nozzle are provided as an agitation device configured to agitate a surface layer portion of the sand filtration layer only at a desired depth, and which blows the clogging substances upward into the seawater in a turbid water intake pit together with a filtration sand. A perforated pipe for suctioning turbid water, a pump, an ejector, and a discharge pipe for dilute turbid water are provided as a suction and discharge device configured to suction turbid water blown upward into seawater in the water intake pit by the agitation device, and discharge it to outside of the turbid water intake pit. Prevents clogging by performing a timely cleaning of the sand filtration layer, thereby making it possible to maintain a high-speed seawater infiltration rate for seawater. Impact on the surrounding environment is reduced, because the apparatus suctions turbid water containing clogging substances which is blown upward into the turbid water intake pit, and discharges it to outside of the system.

Abstract translation: 提供一种适用于除去捕集在砂过滤层表层的堵塞物质的清洗装置。 一种配备有用作驱动装置的驱动轮的清洁装置，构造成移动穿过砂过滤层的表面。 提供泵和喷嘴作为搅拌装置，其仅在期望的深度搅拌砂过滤层的表层部分，并且将堵塞物质向上吹入混浊水进水口中的海水以及过滤 砂。 提供了一种用于吸入混浊水的多孔管，一个泵，一个喷射器和一个用于稀混浊水的排放管，作为吸入和排出装置，其被配置成通过搅拌装置吸入向上进入进水坑中的海水的混浊水， 将其排放到浑浊的进水口外面。 通过及时清洗砂过滤层，防止堵塞，可以保持海水的高速海水渗透率。 对周围环境的影响减小，因为装置吸入含有堵塞物质的混浊水，向上吹入混浊水进入坑，并将其排放到系统外部。

公开(公告)号：US20130012006A1

公开(公告)日：2013-01-10

申请号：US13618472

申请日：2012-09-14

Applicant: Shunpei YAMAZAKI ,  Takayuki INOUE ,  Erumu KIKUCHI ,  Hiroto INOUE

Inventor： Shunpei YAMAZAKI ,  Takayuki INOUE ,  Erumu KIKUCHI ,  Hiroto INOUE

IPC: H01L21/314 ,  H01L21/283 ,  H01L21/20

CPC classification number: H01J37/32449 ,  H01J37/3244 ,  H01J37/32541 ,  H01L29/66765

Abstract: A structure of the plasma treatment apparatus is employed in which an upper electrode has projected portions provided with first introduction holes and recessed portions provided with second introduction holes, the first introduction hole of the upper electrode is connected to a first cylinder filled with a gas which is not likely to be dissociated, the second introduction hole is connected to a second cylinder filled with a gas which is likely to be dissociated, the gas which is not likely to be dissociated is introduced into a reaction chamber from an introduction port of the first introduction hole provided on a surface of the projected portion of the upper electrode, and the gas which is likely to be dissociated is introduced into the reaction chamber from an introduction port of the second introduction hole provided on a surface of the recessed portion.

Abstract translation: 采用等离子体处理装置的结构，其中上电极具有设置有第一导入孔的突出部分和设置有第二导入孔的凹部，上电极的第一导入孔与填充有气体的第一圆筒连接， 不可能解离，第二引入孔连接到填充有可能解离的气体的第二气缸，不可能解离的气体从第一引入孔的引入口引入反应室 设置在上部电极的突出部分的表面上的引入孔和可能被解离的气体从设置在凹部的表面上的第二引入孔的引入口引入到反应室中。

公开(公告)号：US20120064664A1

公开(公告)日：2012-03-15

申请号：US13222513

申请日：2011-08-31

Applicant: Shunpei YAMAZAKI ,  Yusuke NONAKA ,  Takayuki INOUE ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Akiharu MIYANAGA

Inventor： Shunpei YAMAZAKI ,  Yusuke NONAKA ,  Takayuki INOUE ,  Masashi TSUBUKU ,  Kengo AKIMOTO ,  Akiharu MIYANAGA

IPC: H01L21/44

CPC classification number: H01L29/78606 ,  H01L23/552 ,  H01L23/564 ,  H01L29/04 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An object is to manufacture a semiconductor device including an oxide semiconductor film, which has stable electric characteristics and high reliability. A crystalline oxide semiconductor film is formed, without performing a plurality of steps, as follows: by utilizing a difference in atomic weight of plural kinds of atoms included in an oxide semiconductor target, zinc with low atomic weight is preferentially deposited on an oxide insulating film to form a seed crystal including zinc; and tin, indium, or the like with high atomic weight is deposited on the seed crystal while causing crystal growth. Further, a crystalline oxide semiconductor film is formed by causing crystal growth using a seed crystal with a hexagonal crystal structure including zinc as a nucleus, whereby a single crystal oxide semiconductor film or a substantially single crystal oxide semiconductor film is formed.

Abstract translation: 本发明的目的是制造具有稳定的电特性和高可靠性的氧化物半导体膜的半导体装置。 通过利用包含在氧化物半导体靶中的多种原子的原子量的差异，形成结晶氧化物半导体膜，而不进行多个步骤，优选将低原子量的锌沉积在氧化物绝缘膜上 形成包含锌的晶种; 并且具有高原子量的锡，铟等沉积在晶种上同时引起晶体生长。 此外，通过使用具有包含锌作为核的六方晶系结构的晶种进行晶体生长来形成结晶氧化物半导体膜，从而形成单晶氧化物半导体膜或大致单晶氧化物半导体膜。

公开(公告)号：US20100302887A1

公开(公告)日：2010-12-02

申请号：US12850736

申请日：2010-08-05

Applicant: Takayuki INOUE ,  Yoshiyuki KUROKAWA

Inventor： Takayuki INOUE ,  Yoshiyuki KUROKAWA

IPC: G11C29/04

CPC classification number: G11C5/141 ,  G11C5/142 ,  G11C29/70

Abstract: An object is to provide a semiconductor device having a memory which can efficiently improve a yield by employing a structure which facilitates the use of a spare memory cell. The semiconductor device includes a memory cell array having a memory cell and a spare memory cell, a decoder connected to the memory cell and the spare memory cell, a data holding circuit connected to the decoder, and a battery which supplies electric power to the data holding circuit. The spare memory cell operates in accordance with an output from the data holding circuit.

Abstract translation: 目的是提供一种具有存储器的半导体器件，其可以通过采用有利于使用备用存储单元的结构来有效地提高产量。 半导体器件包括具有存储单元和备用存储单元的存储单元阵列，连接到存储单元和备用存储单元的解码器，连接到解码器的数据保持电路以及向数据提供电力的电池 保持电路。 备用存储单元根据数据保持电路的输出进行工作。

公开(公告)号：US20100258802A1

公开(公告)日：2010-10-14

申请号：US12754393

申请日：2010-04-05

Applicant: Hiromichi GODO ,  Takayuki INOUE

Inventor： Hiromichi GODO ,  Takayuki INOUE

IPC: H01L29/786 ,  H01L21/336

CPC classification number: H01L29/7869 ,  H01L27/1225

Abstract: An object is to provide an n-channel transistor and a p-channel transistor having a preferred structure using an oxide semiconductor. A first source or drain electrode which is electrically connected to a first oxide semiconductor layer and is formed using a stacked-layer structure including a first conductive layer containing a first material and a second conductive layer containing a second material, and a second source or drain electrode which is electrically connected to a second oxide semiconductor layer and is formed using a stacked-layer structure including a third conductive layer containing the first material and a fourth conductive layer containing the second material are included. The first oxide semiconductor layer is in contact with the first conductive layer of the first source or drain electrode, and the second oxide semiconductor layer is in contact with the third and the fourth conductive layers of the second source or drain electrode.

Abstract translation: 目的是提供使用氧化物半导体的具有优选结构的n沟道晶体管和p沟道晶体管。 第一源极或漏极，其电连接到第一氧化物半导体层，并且使用包括包含第一材料的第一导电层和包含第二材料的第二导电层的堆叠层结构形成，以及第二源极或漏极 电连接到第二氧化物半导体层并且使用包括包含第一材料的第三导电层和包含第二材料的第四导电层的层叠结构形成的电极。 第一氧化物半导体层与第一源极或漏极的第一导电层接触，并且第二氧化物半导体层与第二源极或漏极的第三导电层和第四导电层接触。

公开(公告)号：US20090218568A1

公开(公告)日：2009-09-03

申请号：US12391398

申请日：2009-02-24

Applicant: Koji DAIRIKI ,  Takayuki IKEDA ,  Hidekazu MIYAIRI ,  Yoshiyuki KUROKAWA ,  Hiromichi GODO ,  Daisuke KAWAE ,  Takayuki INOUE ,  Satoshi KOBAYASHI

Inventor： Koji DAIRIKI ,  Takayuki IKEDA ,  Hidekazu MIYAIRI ,  Yoshiyuki KUROKAWA ,  Hiromichi GODO ,  Daisuke KAWAE ,  Takayuki INOUE ,  Satoshi KOBAYASHI

IPC: H01L29/786 ,  H01L33/00

CPC classification number: H01L29/78618 ,  H01L29/04 ,  H01L29/41733 ,  H01L29/4908 ,  H01L29/66765 ,  H01L29/78696

Abstract: To improve problems with on-state current and off-state current of thin film transistors, a thin film transistor includes a pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added, provided with a space therebetween; a conductive layer which is overlapped, over the gate insulating layer, with the gate electrode and one of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added; and an amorphous semiconductor layer which is provided successively between the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added in such a manner that the amorphous semiconductor layer extends over the gate insulating layer from the conductive layer and is in contact with both of the pair of impurity semiconductor layers to which an impurity element imparting one conductivity type is added.

Abstract translation: 为了改善薄膜晶体管的导通电流和截止电流的问题，薄膜晶体管包括一对杂质半导体层，赋予一种导电类型的杂质元素，在其间具有间隔; 在所述栅极绝缘层上与所述栅电极和添加了赋予一种导电类型的杂质元素的所述一对杂质半导体层中的一个重叠的导电层; 以及非晶半导体层，其被连续地设置在赋予一种导电类型的杂质元素的一对杂质半导体层之间，使得非晶半导体层从导电层延伸到栅极绝缘层上并且接触 同时添加赋予一种导电类型的杂质元素的一对杂质半导体层。

公开(公告)号：US20200177747A1

公开(公告)日：2020-06-04

申请号：US16686312

申请日：2019-11-18

Applicant: Sayaka YASUDA ,  Shun YOSHIMI ,  Yutaka NAKAMURA ,  Takayuki INOUE ,  Motoyuki KATSUMATA ,  Kaori OZEKI

Inventor： Sayaka YASUDA ,  Shun YOSHIMI ,  Yutaka NAKAMURA ,  Takayuki INOUE ,  Motoyuki KATSUMATA ,  Kaori OZEKI

IPC: H04N1/00 ,  G10L15/22 ,  G10L15/26

Abstract: An information processing system includes circuitry configured to acquire audio information used for operating a target apparatus, recognize content of the acquired audio information as a recognition result, determine whether the recognition result includes a specific keyword, notify, using a display, pre-defined specific operation when the recognition result includes the specific keyword, and output the specific operation information to the target apparatus.