公开(公告)号：US08488367B2

公开(公告)日：2013-07-16

申请号：US13052174

申请日：2011-03-21

Applicant: Takafumi Shimotori ,  Yoichi Minemura ,  Hiroshi Kanno ,  Takayuki Tsukamoto ,  Jun Nishimura ,  Masahiro Une

Inventor： Takafumi Shimotori ,  Yoichi Minemura ,  Hiroshi Kanno ,  Takayuki Tsukamoto ,  Jun Nishimura ,  Masahiro Une

IPC: G11C11/00

CPC classification number: G11C13/0004 ,  G11C11/005 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2213/72

Abstract: According to one embodiment, a method for controlling a semiconductor device comprises determining a select bit number for a group of memory cells each includes a variable-resistance element, setting a first voltage corresponding to the select bit number, applying the set first voltage to the memory cell group, and performing verify read on the memory cell group to which the first voltage has been applied and determining whether or not the memory cell group passes the verify read. If the memory cell group is determined not to pass the verify read, the number of bits corresponding to passed memory cells is subtracted from the select bit number, and the first voltage corresponding to the decreased select bit number is set again.

Abstract translation: 根据一个实施例，一种用于控制半导体器件的方法包括确定一组存储器单元的选择位数，每个存储单元包括可变电阻元件，设置与选择位数对应的第一电压，将所设置的第一电压施加到 存储单元组，并对已经施加了第一电压的存储单元组执行验证读取，并确定存储单元组是否通过验证读取。 如果确定存储单元组不通过验证读取，则从选择位数中减去与传递的存储器单元相对应的位数，并且再次设置与减小的选择位数相对应的第一电压。

公开(公告)号：US20120088520A1

公开(公告)日：2012-04-12

申请号：US13331510

申请日：2011-12-20

Applicant: Noriyuki Harada ,  Hiroshi Kanno

Inventor： Noriyuki Harada ,  Hiroshi Kanno

IPC: H04W24/00

CPC classification number: H04M1/72522 ,  G01C21/20 ,  H04W4/023 ,  H04W4/21

Abstract: A mobile communication apparatus may receive a first direction from a reference target to an external apparatus and a first distance from the reference target to a position of the external apparatus. A direction acquiring unit acquires a second direction from the reference target to the position, and a distance acquiring unit acquires a second distance between the reference target and the position. A computing unit computes a direction and a distance from the position to the external apparatus based on the first direction, the first distance, the second direction and the second distance, in order to output a computation result from an output unit.

Abstract translation: 移动通信装置可以从参考目标接收到外部设备的第一方向和从参考目标到外部设备的位置的第一距离。 方向获取单元从参考目标获取第二方向到该位置，并且距离获取单元获取参考目标与位置之间的第二距离。 计算单元基于第一方向，第一距离，第二方向和第二距离来计算从位置到外部设备的方向和距离，以便从输出单元输出计算结果。

公开(公告)号：US20120009160A1

公开(公告)日：2012-01-12

申请号：US13233701

申请日：2011-09-15

Applicant: Mari DEZAWA ,  Hajime Sawada ,  Hiroshi Kanno ,  Masahiko Takano

Inventor： Mari DEZAWA ,  Hajime Sawada ,  Hiroshi Kanno ,  Masahiko Takano

IPC: A61K35/28 ,  A61P25/00

CPC classification number: C12N5/0619 ,  A61K9/0085 ,  A61K35/28 ,  A61K35/30 ,  A61K2035/124 ,  C12N5/0618 ,  C12N5/0658 ,  C12N5/0663 ,  C12N2501/42 ,  C12N2502/1358 ,  C12N2506/1353 ,  C12N2510/00

Abstract: There is provided a method of inducing differentiation of bone marrow stromal cells to neural cells or skeletal muscle cells by introduction of a Notch gene. Specifically, the invention provides a method of inducing differentiation of bone marrow stromal cells to neural cells or skeletal muscle cells in vitro, which method comprises introducing a Notch gene and/or a Notch signaling related gene into the cells, wherein the finally obtained differentiated cells are the result of cell division of the bone marrow stromal cells into which the Notch gene and/or Notch signaling related gene have been introduced. The invention also provides a method of inducing further differentiation of the differentiation-induced neural cells to dopaminergic neurons or acetylcholinergic neurons. The invention yet further provides a treatment method for neurodegenerative and skeletal muscle degenerative diseases which employs neural precursor cells, neural cells or skeletal muscle cells produced by the method of the invention.

Abstract translation: 提供了通过引入Notch基因诱导骨髓基质细胞分化为神经细胞或骨骼肌细胞的方法。 具体地说，本发明提供了一种在体外诱导骨髓基质细胞分化为神经细胞或骨骼肌细胞的方法，该方法包括将Notch基因和/或Notch信号传导相关基因引入细胞，其中最终获得的分化细胞 是引入了Notch基因和/或Notch信号传导相关基因的骨髓基质细胞的细胞分裂的结果。 本发明还提供了诱导分化诱导的神经细胞进一步分化为多巴胺能神经元或乙酰胆碱能神经元的方法。 本发明还进一步提供了一种神经变性和骨骼肌退行性疾病的治疗方法，其采用通过本发明的方法生产的神经前体细胞，神经细胞或骨骼肌细胞。

公开(公告)号：US20110247673A1

公开(公告)日：2011-10-13

申请号：US13060252

申请日：2009-08-14

Applicant: Yukihiro Yoshimine ,  Haruhisa Hashimoto ,  Hiroshi Kanno ,  Shuji Fukumochi

Inventor： Yukihiro Yoshimine ,  Haruhisa Hashimoto ,  Hiroshi Kanno ,  Shuji Fukumochi

IPC: H01L31/05

CPC classification number: H01L31/0508 ,  H01L31/048 ,  H01L31/049 ,  Y02E10/50

Abstract: In a solar cell module 100, a wiring member 11 includes the first bent portion 11A and the second bent portion 11B formed between the solar cells 10. The second bent portion 11B having a larger distance from the neutral surface N has a larger curvature radius than the first bent portion 11A.

Abstract translation: 在太阳能电池模块100中，布线构件11包括形成在太阳能电池单元10之间的第一弯曲部分11A和第二弯曲部分11B。具有比中性面N更大距离的第二弯曲部分11B具有比 第一弯曲部11A。

公开(公告)号：US20110235400A1

公开(公告)日：2011-09-29

申请号：US13052174

申请日：2011-03-21

Applicant: Takafumi Shimotori ,  Yoichi Minemura ,  Hiroshi Kanno ,  Takayuki Tsukamoto ,  Jun Nishimura ,  Masahiro Une

Inventor： Takafumi Shimotori ,  Yoichi Minemura ,  Hiroshi Kanno ,  Takayuki Tsukamoto ,  Jun Nishimura ,  Masahiro Une

IPC: G11C11/00

CPC classification number: G11C13/0004 ,  G11C11/005 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2213/72

Abstract: According to one embodiment, a method for controlling a semiconductor device comprises determining a select bit number for a group of memory cells each includes a variable-resistance element, setting a first voltage corresponding to the select bit number, applying the set first voltage to the memory cell group, and performing verify read on the memory cell group to which the first voltage has been applied and determining whether or not the memory cell group passes the verify read. If the memory cell group is determined not to pass the verify read, the number of bits corresponding to passed memory cells is subtracted from the select bit number, and the first voltage corresponding to the decreased select bit number is set again.

Abstract translation: 根据一个实施例，一种用于控制半导体器件的方法包括确定一组存储器单元的选择位数，每个存储单元包括可变电阻元件，设置与选择位数对应的第一电压，将所设置的第一电压施加到 存储单元组，并对已经施加了第一电压的存储单元组执行验证读取，并确定存储单元组是否通过验证读取。 如果确定存储单元组不通过验证读取，则从选择位数中减去与传递的存储器单元相对应的位数，并且再次设置与减小的选择位数相对应的第一电压。

公开(公告)号：US08021271B2

公开(公告)日：2011-09-20

申请号：US12585954

申请日：2009-09-29

Applicant: Kouichirou Kasama ,  Hiroshi Kanno

Inventor： Kouichirou Kasama ,  Hiroshi Kanno

IPC: A63B71/00

CPC classification number: G01C21/20

Abstract: A device can search for an appropriate walking route with an exercise condition such as of the calorie consumption and the walking speed. When a user enters information at least on the walking time, calorie consumption, walking speed, and distance as the exercise condition, the exercise condition is stored in a data storage unit of the device. When the user enters position information on the walking start point and the walking end point, the position information is also stored in the storage unit of the device. Map information is also previously stored in the data storage unit. A route searching unit of the device searches for the walking route and determines it according to the stored exercise condition, the position information and the map information. The determined walking route is presented to the user through a presenting unit of the device.

Abstract translation: 设备可以搜索具有诸如卡路里消耗和步行速度的运动条件的适当的步行路线。 当用户至少在步行时间，卡路里消耗，步行速度和作为锻炼条件的距离时输入信息时，训练条件被存储在设备的数据存储单元中。 当用户输入步行起点和步行终点的位置信息时，位置信息也存储在装置的存储单元中。 地图信息也预先存储在数据存储单元中。 设备的路径搜索单元搜索步行路线，并根据存储的运动条件，位置信息和地图信息来确定。 所确定的步行路线通过设备的呈现单元呈现给用户。

公开(公告)号：US20110026299A1

公开(公告)日：2011-02-03

申请号：US12713667

申请日：2010-02-26

Applicant: Hiroshi Kanno ,  Reika Ichihara ,  Takayuki Tsukamoto ,  Kenichi Murooka

Inventor： Hiroshi Kanno ,  Reika Ichihara ,  Takayuki Tsukamoto ,  Kenichi Murooka

IPC: G11C11/00 ,  G11C5/14 ,  G11C7/00

CPC classification number: G11C5/025 ,  G11C13/0007 ,  G11C13/003 ,  G11C13/0061 ,  G11C13/0069 ,  G11C13/0097 ,  G11C2013/0073 ,  G11C2213/71 ,  G11C2213/72 ,  G11C2213/74 ,  G11C2213/76

Abstract: A nonvolatile semiconductor memory device comprises: a plurality of first lines; a plurality of second lines; a plurality of memory cells each disposed at each of crossing-points of the first lines and the second lines and each comprising a variable resistor and a bi-directional diode; and a voltage control circuit configured to control a voltage of selected one of the first lines, unselected ones of the first lines, selected one of the second lines, and unselected ones of the second lines, respectively. The variable resistor is configured to change its resistance value depending on a polarity of a voltage applied thereto. The voltage control circuit is configured to apply a voltage pulse to the selected one of the first lines and to connect a capacitor of a certain capacitance to one end of the selected one of the second lines.

Abstract translation: 非易失性半导体存储器件包括：多条第一线; 多条第二线; 多个存储单元，每个存储单元分别设置在第一线和第二线的交叉点的每一个处，并且每个存储单元包括可变电阻器和双向二极管; 以及电压控制电路，被配置为分别控制所选择的第一行，未选择的第一行，所选择的第二行和未选择的第二行中的一个的电压。 可变电阻器被配置为根据施加到其的电压的极性来改变其电阻值。 电压控制电路被配置为向所选择的第一线中的一个施加电压脉冲，并且将一定电容的电容器连接到所选择的一条第二线路的一端。

公开(公告)号：US20100304223A1

公开(公告)日：2010-12-02

申请号：US12159036

申请日：2006-12-01

Applicant: Masashi Otsuki ,  Hiroshi Kanno

Inventor： Masashi Otsuki ,  Hiroshi Kanno

IPC: H01M6/16 ,  H01M6/04 ,  H01G9/038 ,  H01G9/155

CPC classification number: H01G9/038 ,  H01G9/035 ,  H01G9/155 ,  H01G11/62 ,  H01M6/164 ,  H01M10/052 ,  H01M10/0563 ,  H01M10/0569 ,  H01M2300/0017 ,  H01M2300/0022 ,  H01M2300/0025 ,  H01M2300/0034 ,  H01M2300/004 ,  Y02E60/13 ,  Y02T10/7011 ,  Y02T10/7022

Abstract: This invention relates to a safe electrolyte having no risk of igniting-firing, and more particularly to a non-aqueous electrolyte for a battery comprising an ionic liquid composed of a cation portion and an anion portion, and a supporting salt, characterized in that the cation portion of the ionic liquid contains phosphorus and nitrogen, as well as an electrolyte for an electric double layer capacitor comprising an ionic liquid composed of a cation portion and an anion portion, characterized in that the cation portion of the ionic liquid contains phosphorus and nitrogen.

Abstract translation: 本发明涉及不具有点火烧制的安全电解质，更具体地说，涉及包含由阳离子部分和阴离子部分组成的离子液体的电池用非水电解质和支持盐，其特征在于， 离子液体的阳离子部分含有磷和氮，以及包含由阳离子部分和阴离子部分组成的离子液体的双电层电容器的电解质，其特征在于，离子液体的阳离子部分含有磷和氮 。

公开(公告)号：US20100237346A1

公开(公告)日：2010-09-23

申请号：US12556102

申请日：2009-09-09

Applicant: Hiroshi Kanno ,  Kenichi Murooka ,  Mitsuru Sato

Inventor： Hiroshi Kanno ,  Kenichi Murooka ,  Mitsuru Sato

IPC: H01L29/12 ,  H01L21/8246

CPC classification number: G11C13/0007 ,  G11C2213/31 ,  G11C2213/32 ,  G11C2213/72 ,  H01L27/101 ,  H01L27/1021 ,  H01L27/2409 ,  H01L27/2463 ,  H01L45/085 ,  H01L45/1233 ,  H01L45/145 ,  H01L45/1616 ,  H01L45/1625 ,  H01L45/1675

Abstract: A rectifier is formed by forming a first electrode layer, a semiconductor layer and a second electrode layer. A third electrode layer is formed between the first electrode layer and the semiconductor layer, or between the second electrode layer and the semiconductor layer.The semiconductor layer and the third electrode layer are formed as follows. First, a first layer made from amorphous silicon and including a p-type first semiconductor region and an n-type second semiconductor region is deposited. Next, a second layer made from a metal is deposited on an upper or lower layer of the first layer. The third electrode layer including a metal silicide as a material lattice-matched to polysilicon is formed by siliciding the second layer. Next, the first layer is crystallized. Subsequently, the semiconductor layer is formed by activating an impurity included in the first layer and restoring crystal imperfections included in the first layer.

Abstract translation: 整流器通过形成第一电极层，半导体层和第二电极层而形成。 在第一电极层和半导体层之间或第二电极层和半导体层之间形成第三电极层。 半导体层和第三电极层如下形成。 首先，沉积由非晶硅制成并包括p型第一半导体区域和n型第二半导体区域的第一层。 接下来，将由金属制成的第二层沉积在第一层的上层或下层上。 通过硅化第二层来形成包括与多晶硅晶格匹配的材料的金属硅化物的第三电极层。 接下来，第一层结晶。 随后，通过激活包括在第一层中的杂质并恢复包括在第一层中的晶体缺陷来形成半导体层。

公开(公告)号：US07682825B2

公开(公告)日：2010-03-23

申请号：US10503816

申请日：2003-02-06

Applicant: Mari Dezawa ,  Hajime Sawada ,  Hiroshi Kanno ,  Masahiko Takano

Inventor： Mari Dezawa ,  Hajime Sawada ,  Hiroshi Kanno ,  Masahiko Takano

IPC: C12N15/00

CPC classification number: C12N5/0619 ,  A61K9/0085 ,  A61K35/28 ,  A61K35/30 ,  A61K2035/124 ,  C12N5/0618 ,  C12N5/0658 ,  C12N5/0663 ,  C12N2501/42 ,  C12N2502/1358 ,  C12N2506/1353 ,  C12N2510/00

Abstract: There is provided a method of inducing differentiation of bone marrow stromal cells to neural cells or skeletal muscle cells by introduction of a Notch gene. Specifically, the invention provides a method of inducing differentiation of bone marrow stromal cells to neural cells or skeletal muscle cells in vitro, which method comprises introducing a Notch gene and/or a Notch signaling related gene into the cells, wherein the finally obtained differentiated cells are the result of cell division of the bone marrow stromal cells into which the Notch gene and/or Notch signaling related gene have been introduced. The invention also provides a method of inducing further differentiation of the differentiation-induced neural cells to dopaminergic neurons or acetylcholinergic neurons. The invention yet further provides a treatment method for neurodegenerative and skeletal muscle degenerative diseases which employs neural precursor cells, neural cells or skeletal muscle cells produced by the method of the invention.

Abstract translation: 提供了通过引入Notch基因诱导骨髓基质细胞分化为神经细胞或骨骼肌细胞的方法。 具体地说，本发明提供了一种在体外诱导骨髓基质细胞分化为神经细胞或骨骼肌细胞的方法，该方法包括将Notch基因和/或Notch信号传导相关基因引入细胞，其中最终获得的分化细胞 是引入了Notch基因和/或Notch信号传导相关基因的骨髓基质细胞的细胞分裂的结果。 本发明还提供了诱导分化诱导的神经细胞进一步分化为多巴胺能神经元或乙酰胆碱能神经元的方法。 本发明还进一步提供了一种神经变性和骨骼肌退行性疾病的治疗方法，其采用通过本发明的方法生产的神经前体细胞，神经细胞或骨骼肌细胞。