公开(公告)号：US20230100904A1

公开(公告)日：2023-03-30

申请号：US18075433

申请日：2022-12-06

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Wen Su ,  Ming-Hua Chang ,  Shui-Yen Lu

IPC: H01L29/778 ,  H01L29/205 ,  H01L29/06 ,  H01L29/66 ,  H01L29/20

Abstract: A high electron mobility transistor (HEMT) includes a buffer layer on a substrate, ridges extending along a first direction on the buffer layer, gaps extending along the first direction between the ridges, a p-type semiconductor layer extending along a second direction on the ridges and inserted into the gaps, and a source electrode and a drain electrode adjacent to two sides of the p-type semiconductor layer. Preferably, the source electrode and the drain electrode are extending along the second direction and directly on top of the ridges.

公开(公告)号：US09680022B1

公开(公告)日：2017-06-13

申请号：US15207916

申请日：2016-07-12

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tien-Chen Chan ,  Yi-Fan Li ,  Yen-Hsing Chen ,  Chun-Yu Chen ,  Chung-Ting Huang ,  Zih-Hsuan Huang ,  Ming-Hua Chang ,  Yu-Shu Lin ,  Shu-Yen Chan

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/06 ,  H01L21/02 ,  H01L29/66 ,  H01L29/08 ,  H01L29/161

CPC classification number: H01L29/66795 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/1054 ,  H01L29/66636 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device is provided, including a substrate with an isolation layer formed thereon, wherein the substrate has a fin protruding up through the isolation layer to form a top surface and a pair of lateral sidewalls of the fin above the isolation layer; a silicon-germanium (SiGe) layer epitaxially grown on the top surface and the lateral sidewalls of the fin; and a gate stack formed on the isolation layer and across the fin, wherein the fin and the gate stack respectively extend along a first direction and a second direction. The SiGe layer formed on the top surface has a first thickness, the SiGe layer formed on said lateral sidewall has a second thickness, and a ratio of the first thickness to the second thickness is in a range of 1:10 to 1:30.

公开(公告)号：US09397214B1

公开(公告)日：2016-07-19

申请号：US14622943

申请日：2015-02-16

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Tien-Chen Chan ,  Hsin-Chang Wu ,  Chun-Yu Chen ,  Ming-Hua Chang ,  Sheng-Hsu Liu ,  Chieh-Lung Wu ,  Chung-Min Tsai ,  Neng-Hui Yang

IPC: H01L27/092 ,  H01L29/66 ,  H01L21/8238 ,  H01L29/78 ,  H01L29/36 ,  H01L29/161

CPC classification number: H01L29/7848 ,  H01L29/165 ,  H01L29/785

Abstract: A semiconductor device is provided includes a substrate, a gate structure formed on the substrate, an epitaxial source/drain structure respectively formed at two sides of the gate structure, and a boron-rich interface layer. The boron-rich interface layer includes a bottom-and-sidewall portion and a top portion, and the epitaxial source/drain structure is enclosed by the bottom-and-sidewall portion and the top portion.

Abstract translation: 提供了一种半导体器件，包括衬底，形成在衬底上的栅极结构，分别形成在栅极结构的两侧的外延源极/漏极结构和富含硼的界面层。 富硼界面层包括底侧和侧壁部分和顶部，并且外延源极/漏极结构被底部和侧壁部分以及顶部部分包围。

公开(公告)号：US09076652B2

公开(公告)日：2015-07-07

申请号：US13902870

申请日：2013-05-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ming-Hua Chang ,  Chun-Yuan Wu ,  Chin-Cheng Chien ,  Tien-Wei Yu ,  Yu-Shu Lin ,  Szu-Hao Lai

IPC: H01L21/20 ,  H01L21/02

CPC classification number: H01L29/7848 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/3003 ,  H01L21/30604 ,  H01L21/324 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66636

Abstract: A semiconductor process includes the following steps. Two gates are formed on a substrate. A recess is formed in the substrate beside the gates. A surface modification process is performed on a surface of the recess to modify the shape of the recess and change the contents of the surface.

Abstract translation: 半导体工艺包括以下步骤。 在基板上形成两个栅极。 在栅极旁边的基板中形成凹部。 在凹部的表面上进行表面改性处理，以改变凹部的形状并改变表面的内容物。

公开(公告)号：US09034705B2

公开(公告)日：2015-05-19

申请号：US13850887

申请日：2013-03-26

Applicant: United Microelectronics Corp.

Inventor： Tsai-Yu Wen ,  Tsuo-Wen Lu ,  Yu-Ren Wang ,  Chin-Cheng Chien ,  Tien-Wei Yu ,  Hsin-Kuo Hsu ,  Yu-Shu Lin ,  Szu-Hao Lai ,  Ming-Hua Chang

IPC: H01L21/8238 ,  H01L21/8234

CPC classification number: H01L21/823814 ,  H01L21/823412 ,  H01L21/823425 ,  H01L21/823807 ,  Y10S438/938

Abstract: A method of forming a semiconductor device is disclosed. At least one gate structure is provided on a substrate, wherein the gate structure includes a first spacer formed on a sidewall of a gate. A first disposable spacer material layer is deposited on the substrate covering the gate structure. The first disposable spacer material layer is etched to form a first disposable spacer on the first spacer. A second disposable spacer material layer is deposited on the substrate covering the gate structure. The second disposable spacer material layer is etched to form a second disposable spacer on the first disposable spacer. A portion of the substrate is removed, by using the first and second disposable spacers as a mask, so as to form two recesses in the substrate beside the gate structure. A stress-inducing layer is formed in the recesses.

Abstract translation: 公开了一种形成半导体器件的方法。 至少一个栅极结构设置在衬底上，其中栅极结构包括形成在栅极的侧壁上的第一间隔物。 在覆盖栅极结构的衬底上沉积第一一次性间隔物层。 第一一次性间隔物材料层被蚀刻以在第一间隔物上形成第一一次性间隔物。 在覆盖栅极结构的衬底上沉积第二一次性间隔物材料层。 蚀刻第二一次性间隔材料层以在第一一次性间隔件上形成第二一次性间隔件。 通过使用第一和第二一次性间隔件作为掩模来去除衬底的一部分，以在栅极结构旁边的衬底中形成两个凹部。 在凹部中形成应力诱导层。

公开(公告)号：US20140349467A1

公开(公告)日：2014-11-27

申请号：US13902870

申请日：2013-05-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ming-Hua Chang ,  Chun-Yuan Wu ,  Chin-Cheng Chien ,  Tien-Wei Yu ,  Yu-Shu Lin ,  Szu-Hao Lai

IPC: H01L21/02

CPC classification number: H01L29/7848 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/3003 ,  H01L21/30604 ,  H01L21/324 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66636

Abstract: A semiconductor process includes the following steps. Two gates are formed on a substrate. A recess is formed in the substrate beside the gates. A surface modification process is performed on a surface of the recess to modify the shape of the recess and change the contents of the surface.

Abstract translation: 半导体工艺包括以下步骤。 在基板上形成两个栅极。 在栅极旁边的基板中形成凹部。 在凹部的表面上进行表面改性处理，以改变凹部的形状并改变表面的内容物。

公开(公告)号：US08853060B1

公开(公告)日：2014-10-07

申请号：US13902862

申请日：2013-05-27

Applicant: United Microelectronics Corp.

Inventor： Szu-Hao Lai ,  Chun-Yuan Wu ,  Chin-Cheng Chien ,  Tien-Wei Yu ,  Ming-Hua Chang ,  Yu-Shu Lin ,  Tsai-Yu Wen ,  Hsin-Kuo Hsu

IPC: H01L21/20 ,  H01L21/02

CPC classification number: H01L21/02532 ,  H01L21/0237 ,  H01L21/0245 ,  H01L21/02579 ,  H01L21/0262 ,  H01L21/02639 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/66636 ,  H01L29/7848

Abstract: An epitaxial process includes the following step. A recess is formed in a substrate. A seeding layer is formed to cover a surface of the recess. A buffer layer is formed on the seeding layer. An etching process is performed on the buffer layer to homogenize and shape the buffer layer. An epitaxial layer is formed on the homogenized flat bottom shape buffer layer.

Abstract translation: 外延工艺包括以下步骤。 在基板上形成凹部。 形成接合层以覆盖凹部的表面。 在接种层上形成缓冲层。 对缓冲层进行蚀刻处理，使缓冲层均匀化并形成。 在均质化的平底形状缓冲层上形成外延层。

公开(公告)号：US20240339532A1

公开(公告)日：2024-10-10

申请号：US18743061

申请日：2024-06-13

Applicant: United Microelectronics Corp.

Inventor： Po-Wen Su ,  Ming-Hua Chang ,  Shui-Yen Lu

IPC: H01L29/778 ,  H01L29/06 ,  H01L29/20 ,  H01L29/205 ,  H01L29/66

CPC classification number: H01L29/7786 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L29/7787

Abstract: A method for fabricating high electron mobility transistor (HEMT) includes the steps of: forming a buffer layer on a substrate; forming a patterned mask on the buffer layer, using the patterned mask to remove the buffer layer for forming ridges and a damaged layer on the ridges; removing the damaged layer, forming a barrier layer on the ridges; and forming a p-type semiconductor layer on the barrier layer.

公开(公告)号：US20240322030A1

公开(公告)日：2024-09-26

申请号：US18732645

申请日：2024-06-04

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Po-Wen Su ,  Ming-Hua Chang ,  Shui-Yen Lu

IPC: H01L29/778 ,  H01L29/06 ,  H01L29/20 ,  H01L29/205 ,  H01L29/66

CPC classification number: H01L29/7786 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L29/7787

Abstract: A high electron mobility transistor (HEMT) includes a buffer layer on a substrate, ridges extending along a first direction on the buffer layer, gaps extending along the first direction between the ridges, a p-type semiconductor layer extending along a second direction on the ridges and inserted into the gaps, and a source electrode and a drain electrode adjacent to two sides of the p-type semiconductor layer. Preferably, the source electrode and the drain electrode are extending along the second direction and directly on top of the ridges.

公开(公告)号：US20240222133A1

公开(公告)日：2024-07-04

申请号：US18608940

申请日：2024-03-19

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ming-Hua Chang ,  Kun-Yuan Liao ,  Lung-En Kuo ,  Chih-Tung Yeh

IPC: H01L21/308 ,  H01L21/306 ,  H01L29/20 ,  H01L29/205 ,  H01L29/66 ,  H01L29/778

CPC classification number: H01L21/3086 ,  H01L21/30621 ,  H01L21/3081 ,  H01L21/3085 ,  H01L29/2003 ,  H01L29/205 ,  H01L29/66462 ,  H01L29/7786

Abstract: A fabricating method of a high electron mobility transistor includes providing a substrate. Then, a channel layer, an active layer, a P-type group III-V compound material layer, a metal compound material layer, a hard mask material layer and a patterned photoresist are formed to cover the substrate. Later, a dry etching process is performed to etch the hard mask material layer and the metal compound material layer to form a hard mask and a metal compound layer by taking the patterned photoresist as a mask. During the dry etching process, a spacer generated by by-products is formed to surround the patterned photoresist, the hard mask and the metal compound layer. After the dry etching process, the P-type group III-V compound material layer is etched by taking the spacer and the patterned photoresist as a mask.