公开(公告)号：US10381228B2

公开(公告)日：2019-08-13

申请号：US14631807

申请日：2015-02-25

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yu-Ying Lin ,  Ted Ming-Lang Guo ,  Chin-Cheng Chien ,  Chih-Chien Liu ,  Hsin-Kuo Hsu ,  Chin-Fu Lin ,  Chun-Yuan Wu

IPC: H01L21/306 ,  H01L21/3065 ,  H01L29/08 ,  H01L29/66 ,  H01L29/78

Abstract: An epitaxial process applying light illumination includes the following steps. A substrate is provided. A dry etching process and a wet etching process are performed to form a recess in the substrate, wherein an infrared light illuminates while the wet etching process is performed. An epitaxial structure is formed in the recess.

公开(公告)号：US09514993B2

公开(公告)日：2016-12-06

申请号：US14664933

申请日：2015-03-23

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Wei Yu ,  Ted Ming-Lang Guo ,  Hsu Ting ,  Yu-Ren Wang

IPC: H01L21/8238 ,  H01L21/283 ,  H01L21/308

CPC classification number: H01L21/823814 ,  H01L21/02236 ,  H01L21/283 ,  H01L21/3083 ,  H01L21/3085 ,  H01L21/31111 ,  H01L21/823425 ,  H01L21/823878

Abstract: A method for manufacturing semiconductor devices includes following steps. A substrate including a first gate structure and a second gate structure formed thereon is provided. The first gate structure and the second gate structure are complementary to each other. Next, a first mask layer covering the second gate structure is formed and followed by forming first recesses in the substrate at two respective sides of the first transistor. Then, forming the first recesses, a first epitaxial layer is formed in each first recess. After forming the first epitaxial layers, a local protecting cap is formed on the first epitaxial layers and followed by removing the first mask layer.

Abstract translation: 一种制造半导体器件的方法包括以下步骤。 提供了包括形成在其上的第一栅极结构和第二栅极结构的衬底。 第一栅极结构和第二栅极结构彼此互补。 接下来，形成覆盖第二栅极结构的第一掩模层，随后在第一晶体管的两个相应的两侧在衬底中形成第一凹槽。 然后，形成第一凹部，在每个第一凹部中形成第一外延层。 在形成第一外延层之后，在第一外延层上形成局部保护帽，然后除去第一掩模层。

公开(公告)号：US20160314969A1

公开(公告)日：2016-10-27

申请号：US15166291

申请日：2016-05-27

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yu-Ying Lin ,  Kuang-Hsiu Chen ,  Ted Ming-Lang Guo ,  Yu-Ren Wang

IPC: H01L21/02 ,  H01L21/76 ,  H01L21/265 ,  H01L21/3065 ,  H01L21/306 ,  H01L29/423 ,  H01L29/06

CPC classification number: H01L21/02636 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/283 ,  H01L21/30604 ,  H01L21/30608 ,  H01L21/3065 ,  H01L21/76 ,  H01L29/0692 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/42356 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

Abstract: The present invention provides a method for forming a semiconductor structure, comprising: firstly, a substrate is provided, next, a first dry etching process is performed, to form a recess in the substrate. Afterwards, an ion implantation process is performed to a bottom surface of the recess, a wet etching process is then performed, to etch partial sidewalls of the recess, so as to form at least two tips on two sides of the recess respectively, and a second dry etching process is performed, to etch partial bottom surface of the recess, wherein after the second dry etching process is performed, a lower portion of the recess has a U-shaped cross section profile.

Abstract translation: 本发明提供一种形成半导体结构的方法，包括：首先提供衬底，然后进行第一干蚀刻工艺，以在衬底中形成凹陷。 之后，对凹部的底面执行离子注入工艺，然后执行湿蚀刻工艺，以蚀刻凹部的部分侧壁，从而分别在凹槽的两侧形成至少两个尖端，并且 进行第二干蚀刻工艺，以蚀刻凹部的部分底表面，其中在执行第二干蚀刻工艺之后，凹部的下部具有U形横截面轮廓。

公开(公告)号：US09466480B2

公开(公告)日：2016-10-11

申请号：US14532015

申请日：2014-11-04

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Ted Ming-Lang Guo ,  Chin-Cheng Chien ,  Chueh-Yang Liu ,  Neng-Hui Yang

IPC: H01L21/8242 ,  H01L21/02 ,  H01L21/311

CPC classification number: H01L21/02334 ,  H01L21/0206 ,  H01L21/02181 ,  H01L21/02307 ,  H01L21/28211 ,  H01L21/31111 ,  H01L21/31144 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

Abstract: A cleaning process for oxide includes the following step. A substrate having a first area and a second area is provided. A first oxide layer is formed on the substrate of the first area and the second area. An ammonium hydroxide (NH4OH) and hydrogen peroxide (H2O2) containing process is performed on the first oxide layer of the first area and the second area. A photoresist layer covers the first oxide layer of the first area while exposing the first oxide layer of the second area. The first oxide layer of the second area is removed. The photoresist layer is then removed.

Abstract translation: 氧化物的清洗方法包括以下步骤。 提供具有第一区域和第二区域的衬底。 在第一区域和第二区域的基板上形成第一氧化物层。 在第一区域和第二区域的第一氧化物层上进行含有氢氧化铵（NH 4 OH）和过氧化氢（H 2 O 2）的工艺。 光致抗蚀剂层覆盖第一区域的第一氧化物层，同时暴露第二区域的第一氧化物层。 去除第二区域的第一氧化物层。 然后除去光致抗蚀剂层。

公开(公告)号：US20160284601A1

公开(公告)日：2016-09-29

申请号：US14664933

申请日：2015-03-23

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Chun-Wei Yu ,  Ted Ming-Lang Guo ,  Hsu Ting ,  Yu-Ren Wang

IPC: H01L21/8238 ,  H01L21/308 ,  H01L21/283

CPC classification number: H01L21/823814 ,  H01L21/02236 ,  H01L21/283 ,  H01L21/3083 ,  H01L21/3085 ,  H01L21/31111 ,  H01L21/823425 ,  H01L21/823878

Abstract: A method for manufacturing semiconductor devices includes following steps. A substrate including a first gate structure and a second gate structure formed thereon is provided. The first gate structure and the second gate structure are complementary to each other. Next, a first mask layer covering the second gate structure is formed and followed by forming first recesses in the substrate at two respective sides of the first transistor. Then, forming the first recesses, a first epitaxial layer is formed in each first recess. After forming the first epitaxial layers, a local protecting cap is formed on the first epitaxial layers and followed by removing the first mask layer.

Abstract translation: 一种制造半导体器件的方法包括以下步骤。 提供了包括形成在其上的第一栅极结构和第二栅极结构的衬底。 第一栅极结构和第二栅极结构彼此互补。 接下来，形成覆盖第二栅极结构的第一掩模层，随后在第一晶体管的两个相应的两侧在衬底中形成第一凹槽。 然后，形成第一凹部，在每个第一凹部中形成第一外延层。 在形成第一外延层之后，在第一外延层上形成局部保护帽，然后除去第一掩模层。

公开(公告)号：US09419089B1

公开(公告)日：2016-08-16

申请号：US14714361

申请日：2015-05-18

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yu-Ying Lin ,  Kuang-Hsiu Chen ,  Ted Ming-Lang Guo ,  Yu-Ren Wang

IPC: H01L29/06 ,  H01L29/423 ,  H01L21/3065 ,  H01L21/225 ,  H01L21/283

CPC classification number: H01L21/02636 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/26506 ,  H01L21/26513 ,  H01L21/283 ,  H01L21/30604 ,  H01L21/30608 ,  H01L21/3065 ,  H01L21/76 ,  H01L29/0692 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/42356 ,  H01L29/66636 ,  H01L29/7834 ,  H01L29/7848

Abstract: The present invention provides a semiconductor structure, which includes a substrate, at least two gate structures disposed on the substrate, a first recess, disposed in the substrate between two gate structures, the first recess having a U-shaped cross section profile, and a second recess, disposed on the first recess, the second recess having a polygonal shaped cross section profile, and has at least two tips on two sides of the second recess, the first recess and the second recess forming an epitaxial recess.

Abstract translation: 本发明提供了一种半导体结构，其包括基板，设置在基板上的至少两个栅极结构，设置在两个栅极结构之间的基板中的第一凹部，第一凹部具有U形横截面轮廓，以及 第二凹部，设置在第一凹部上，第二凹部具有多边形截面轮廓，并且在第二凹部的两侧具有至少两个尖端，第一凹部和第二凹部形成外延凹部。

公开(公告)号：US20160211144A1

公开(公告)日：2016-07-21

申请号：US14631807

申请日：2015-02-25

Applicant: UNITED MICROELECTRONICS CORP.

Inventor： Yu-Ying Lin ,  Ted Ming-Lang Guo ,  Chin-Cheng Chien ,  Chih-Chien Liu ,  Hsin-Kuo Hsu ,  Chin-Fu Lin ,  Chun-Yuan Wu

IPC: H01L21/306 ,  H01L29/66 ,  H01L29/08 ,  H01L21/3065

CPC classification number: H01L21/30608 ,  H01L21/3065 ,  H01L29/0847 ,  H01L29/66795 ,  H01L29/785

Abstract: An epitaxial process applying light illumination includes the following steps. A substrate is provided. A dry etching process and a wet etching process are performed to form a recess in the substrate, wherein an infrared light illuminates while the wet etching process is performed. An epitaxial structure is formed in the recess.

Abstract translation: 施加光照射的外延工艺包括以下步骤。 提供基板。 执行干蚀刻工艺和湿蚀刻工艺以在衬底中形成凹部，其中在执行湿蚀刻工艺时红外光照亮。 在凹部中形成外延结构。

公开(公告)号：US08841193B2

公开(公告)日：2014-09-23

申请号：US13928366

申请日：2013-06-26

Applicant: United Microelectronics Corp.

Inventor： Ted Ming-Lang Guo ,  Chin-Cheng Chien ,  Shu-Yen Chan ,  Ling-Chun Chou ,  Tsung-Hung Chang ,  Chun-Yuan Wu

IPC: H01L21/336 ,  H01L29/78 ,  H01L29/66

CPC classification number: H01L29/66477 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/7843 ,  H01L29/7847

Abstract: A semiconductor structure including a substrate and a gate structure disposed on the substrate is disclosed. The gate structure includes a gate dielectric layer disposed on the substrate, a gate material layer disposed on the gate dielectric layer and an outer spacer with a rectangular cross section. The top surface of the outer spacer is lower than the top surface of the gate material layer.

Abstract translation: 公开了一种包括衬底和设置在衬底上的栅极结构的半导体结构。 栅极结构包括设置在基板上的栅极介质层，设置在栅极介电层上的栅极材料层和具有矩形横截面的外部间隔物。 外隔离物的顶表面比栅极材料层的顶表面低。