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公开(公告)号:US20220283841A1
公开(公告)日:2022-09-08
申请号:US17376785
申请日:2021-07-15
Applicant: VMware, Inc.
Inventor: Giridhar Jayavelu , Aravind Srinivasan , Amit Singh
IPC: G06F9/455 , G06F9/4401
Abstract: Some embodiments provide various methods for offloading operations in an O-RAN (Open Radio Access Network) onto control plane (CP) or edge applications that execute on host computers with hardware accelerators in software defined datacenters (SDDCs). At the CP or edge application operating on a machine executing on a host computer with a hardware accelerator, the method of some embodiments receives data, from an O-RAN E2 unit, to perform an operation. The method uses a driver of the machine to communicate directly with the hardware accelerator to direct the hardware accelerator to perform a set of computations associated with the operation. This driver allows the communication with the hardware accelerator to bypass an intervening set of drivers executing on the host computer between the machine's driver and the hardware accelerator. Through this driver, the application in some embodiments receives the computation results, which it then provides to one or more O-RAN components (e.g., to the E2 unit that provided the data, another E2 unit or another control plane or edge application).
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公开(公告)号:US11831517B2
公开(公告)日:2023-11-28
申请号:US17384777
申请日:2021-07-25
Applicant: VMware, Inc.
Inventor: Amit Singh , Giridhar Subramani Jayavelu , Aditya Gudipati
IPC: H04L41/122 , H04L41/40 , G06F9/455 , G06F30/331 , G06F9/38 , G06F9/48 , G06F9/54 , G06F9/4401 , H04W40/24 , H04L69/324 , G06F8/60 , H04W24/02 , G06F11/34 , H04L43/10 , H04W8/18 , H04W8/20 , H04W48/14 , H04W12/037 , H04W12/08 , H04W28/06 , H04W72/0453 , G06N20/00 , H04B7/0452 , H04W72/044 , H04W72/20 , H04W72/02 , H04W72/51 , H04W72/52 , H04W28/086 , H04W28/16 , H04W36/10 , H04W84/04
CPC classification number: H04L41/122 , G06F8/60 , G06F9/3877 , G06F9/4411 , G06F9/45533 , G06F9/45545 , G06F9/4881 , G06F9/541 , G06F9/544 , G06F9/546 , G06F11/3409 , G06F30/331 , G06N20/00 , H04B7/0452 , H04L41/40 , H04L43/10 , H04L69/324 , H04W8/18 , H04W8/186 , H04W8/20 , H04W12/037 , H04W12/08 , H04W24/02 , H04W28/06 , H04W28/0865 , H04W40/246 , H04W48/14 , H04W72/02 , H04W72/046 , H04W72/0453 , H04W72/20 , H04W72/51 , H04W72/52 , G06F9/45558 , G06F2009/4557 , G06F2009/45579 , G06F2009/45583 , G06F2009/45595 , H04L2212/00 , H04W36/10 , H04W84/042
Abstract: To provide a low latency near RT RIC, some embodiments separate the RIC's functions into several different components that operate on different machines (e.g., execute on VMs or Pods) operating on the same host computer or different host computers. Some embodiments also provide high speed interfaces between these machines. Some or all of these interfaces operate in non-blocking, lockless manner in order to ensure that critical near RT RIC operations (e.g., datapath processes) are not delayed due to multiple requests causing one or more components to stall. In addition, each of these RIC components also has an internal architecture that is designed to operate in a non-blocking manner so that no one process of a component can block the operation of another process of the component. All of these low latency features allow the near RT RIC to serve as a high speed IO between the E2 nodes and the xApps.
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公开(公告)号:US11704148B2
公开(公告)日:2023-07-18
申请号:US17384782
申请日:2021-07-25
Applicant: VMware, Inc.
Inventor: Amit Singh
IPC: H04W8/18 , H04W8/20 , G06F9/455 , G06F30/331 , G06F9/38 , G06F9/48 , G06F9/54 , G06F9/4401 , H04W40/24 , H04L69/324 , G06F8/60 , H04W24/02 , H04L41/122 , H04L41/40 , G06F11/34 , H04W28/16 , H04W28/086 , H04L43/10 , H04W48/14 , H04W12/037 , H04W12/08 , H04W72/0453 , G06N20/00 , H04B7/0452 , H04W72/044 , H04W72/20 , H04W72/29 , H04W72/51 , H04W72/52 , H04W36/10 , H04W84/04
CPC classification number: G06F9/45558 , G06F8/60 , G06F9/3877 , G06F9/4411 , G06F9/45533 , G06F9/45545 , G06F9/4881 , G06F9/541 , G06F9/544 , G06F9/546 , G06F11/3409 , G06F30/331 , G06N20/00 , H04B7/0452 , H04L41/122 , H04L41/40 , H04L43/10 , H04L69/324 , H04W8/18 , H04W8/186 , H04W8/20 , H04W12/037 , H04W12/08 , H04W24/02 , H04W28/0819 , H04W28/16 , H04W40/246 , H04W48/14 , H04W72/046 , H04W72/0453 , H04W72/20 , H04W72/29 , H04W72/51 , H04W72/52 , G06F2009/4557 , G06F2009/45579 , G06F2009/45583 , G06F2009/45595 , H04L2212/00 , H04W36/10 , H04W84/042
Abstract: To provide a low latency near RT RIC, some embodiments separate the RIC's functions into several different components that operate on different machines (e.g., execute on VMs or Pods) operating on the same host computer or different host computers. Some embodiments also provide high speed interfaces between these machines. Some or all of these interfaces operate in non-blocking, lockless manner in order to ensure that critical near RT RIC operations (e.g., datapath processes) are not delayed due to multiple requests causing one or more components to stall. In addition, each of these RIC components also has an internal architecture that is designed to operate in a non-blocking manner so that no one process of a component can block the operation of another process of the component. All of these low latency features allow the near RT RIC to serve as a high speed IO between the E2 nodes and the xApps.
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公开(公告)号:US11540287B2
公开(公告)日:2022-12-27
申请号:US17384780
申请日:2021-07-25
Applicant: VMware, Inc.
Inventor: Amit Singh , Aditya Gudipati
IPC: H04W72/04 , H04W12/08 , H04W12/037
Abstract: To provide a low latency near RT RIC, some embodiments separate the RIC's functions into several different components that operate on different machines (e.g., execute on VMs or Pods) operating on the same host computer or different host computers. Some embodiments also provide high speed interfaces between these machines. Some or all of these interfaces operate in non-blocking, lockless manner in order to ensure that critical near RT RIC operations (e.g., datapath processes) are not delayed due to multiple requests causing one or more components to stall. In addition, each of these RIC components also has an internal architecture that is designed to operate in a non-blocking manner so that no one process of a component can block the operation of another process of the component. All of these low latency features allow the near RT RIC to serve as a high speed IO between the E2 nodes and the xApps.
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公开(公告)号:US11838176B1
公开(公告)日:2023-12-05
申请号:US18101546
申请日:2023-01-25
Applicant: VMware, Inc.
Inventor: Gauresh Dilip Vanjare , Amit Singh
CPC classification number: H04L41/0803 , H04L41/0886 , H04L41/28 , H04L63/101
Abstract: Some embodiments of the invention provide a method for providing automated admission control services for a RAN system. The method receives a trigger alert that includes an application identifier for an application, a dRIC identifier associated with a dRIC to which the application is to be deployed, and a set of configurations for the application that are in a first format. The method converts the set of configurations from the first format to a second format and sends the set configurations in the second format to an FCAPS management pod deployed to the dRIC. Upon receiving positive acknowledgment indicating successful implementation of the set of configurations from the FCAPS management pod, the method updates a configuration table stored in a database of the RAN with a set of admissions control information for the application. The method sends a notification to an API server for the RAN indicating the set of configurations have been successfully implemented for the application.
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公开(公告)号:US20220342732A1
公开(公告)日:2022-10-27
申请号:US17860090
申请日:2022-07-07
Applicant: VMware, Inc.
Inventor: Giridhar Subramani Jayavelu , Amit Singh
Abstract: To provide a low latency near RT RIC, some embodiments separate the RIC's functions into several different components that operate on different machines (e.g., execute on VMs or Pods) operating on the same host computer or different host computers. Some embodiments also provide high speed interfaces between these machines. Some or all of these interfaces operate in non-blocking, lockless manner in order to ensure that critical near RT RIC operations (e.g., datapath processes) are not delayed due to multiple requests causing one or more components to stall. In addition, each of these RIC components also has an internal architecture that is designed to operate in a non-blocking manner so that no one process of a component can block the operation of another process of the component. All of these low latency features allow the near RT RIC to serve as a high speed IO between the E2 nodes and the xApps.
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公开(公告)号:US20220286915A1
公开(公告)日:2022-09-08
申请号:US17376817
申请日:2021-07-15
Applicant: VMware, Inc.
Inventor: Aditya Gudipati , Amit Singh , Rakesh Misra , Giridhar Subramani Jayavelu
IPC: H04W28/16
Abstract: Some embodiments provide a method of performing control plane operations in a radio access network (RAN). The method deploys several machines on a host computer. On each machine, the method deploys a control plane application to perform a control plane operation. The method also configures on each machine a RAN intelligent controller (RIC) SDK to serve as an interface between the control plane application on the same machine and a set of one or more elements of the RAN. In some embodiments, the RIC SDK on each machine includes a set of network connectivity processes that establish network connections to the set of RAN elements for the control plane application. These RIC SDK processes allow the control plane application on their machine to forego having the set of network connectivity processes. In some embodiments, the set of network connectivity processes of each RIC SDK of each machine establishes and maintains network connections between the machine and the set of RAN elements used by the control plane application of the machine, and handles data packet transport to and from the set of RAN elements for the control plane application.
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公开(公告)号:US20220286840A1
公开(公告)日:2022-09-08
申请号:US17384782
申请日:2021-07-25
Applicant: VMware, Inc.
Inventor: Amit Singh
Abstract: To provide a low latency near RT RIC, some embodiments separate the RIC's functions into several different components that operate on different machines (e.g., execute on VMs or Pods) operating on the same host computer or different host computers. Some embodiments also provide high speed interfaces between these machines. Some or all of these interfaces operate in non-blocking, lockless manner in order to ensure that critical near RT RIC operations (e.g., datapath processes) are not delayed due to multiple requests causing one or more components to stall. In addition, each of these RIC components also has an internal architecture that is designed to operate in a non-blocking manner so that no one process of a component can block the operation of another process of the component. All of these low latency features allow the near RT RIC to serve as a high speed IO between the E2 nodes and the xApps.
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公开(公告)号:US20220283843A1
公开(公告)日:2022-09-08
申请号:US17384781
申请日:2021-07-25
Applicant: VMware, Inc.
Inventor: Amit Singh
Abstract: To provide a low latency near RT RIC, some embodiments separate the RIC's functions into several different components that operate on different machines (e.g., execute on VMs or Pods) operating on the same host computer or different host computers. Some embodiments also provide high speed interfaces between these machines. Some or all of these interfaces operate in non-blocking, lockless manner in order to ensure that critical near RT RIC operations (e.g., datapath processes) are not delayed due to multiple requests causing one or more components to stall. In addition, each of these RIC components also has an internal architecture that is designed to operate in a non-blocking manner so that no one process of a component can block the operation of another process of the component. All of these low latency features allow the near RT RIC to serve as a high speed IO between the E2 nodes and the xApps.
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公开(公告)号:US20220283839A1
公开(公告)日:2022-09-08
申请号:US17376758
申请日:2021-07-15
Applicant: VMware, Inc.
Inventor: Aravind Srinivasan , Giridhar Jayavelu , Amit Singh , Rakesh Misra
IPC: G06F9/455 , G06F9/4401 , G06F9/38 , G06F9/54
Abstract: Some embodiments provide various methods for offloading operations in an O-RAN (Open Radio Access Network) onto control plane (CP) or edge applications that execute on host computers with hardware accelerators in software defined datacenters (SDDCs). At the CP or edge application operating on a machine executing on a host computer with a hardware accelerator, the method of some embodiments receives data, from an O-RAN E2 unit, to perform an operation. The method uses a driver of the machine to communicate directly with the hardware accelerator to direct the hardware accelerator to perform a set of computations associated with the operation. This driver allows the communication with the hardware accelerator to bypass an intervening set of drivers executing on the host computer between the machine's driver and the hardware accelerator. Through this driver, the application in some embodiments receives the computation results, which it then provides to one or more O-RAN components (e.g., to the E2 unit that provided the data, another E2 unit or another control plane or edge application).
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