公开(公告)号：US09983643B2

公开(公告)日：2018-05-29

申请号：US14841915

申请日：2015-09-01

Applicant: Silicon Laboratories Inc.

Inventor： Matthew R. Powell

IPC: G05F1/59 ,  G06F1/26 ,  H02M1/36 ,  H02M3/00 ,  H02M1/00

CPC classification number: G06F1/26 ,  G05F1/59 ,  H02M1/36 ,  H02M3/00 ,  H02M2001/0045

Abstract: An integrated circuit includes: a voltage converter to receive a first supply voltage signal via a first power path and to output a first output voltage signal; and a voltage regulator to receive the first output voltage signal and to output a regulated voltage signal. The voltage regulator may further be configured to receive the first supply voltage signal via a second power path, and to selectively output the regulated voltage signal from one of the first supply voltage signal and the first output voltage signal.

公开(公告)号：US09979295B2

公开(公告)日：2018-05-22

申请号：US15477579

申请日：2017-04-03

Applicant: Qorvo US, Inc.

Inventor： Michael R. Kay ,  Manbir Singh Nag

IPC: G05F1/24 ,  H02M3/158 ,  H02M3/07 ,  H03F3/38 ,  H02M1/42 ,  H02M1/00

CPC classification number: H02M3/1582 ,  H02M3/07 ,  H02M3/1584 ,  H02M2001/0003 ,  H02M2001/0045 ,  H02M2001/4291 ,  H02M2003/1586 ,  H03F3/38

Abstract: A buck-boost DC-DC converter, which includes converter control circuitry, converter switching circuitry, and a first inductive element, is disclosed. The converter control circuitry provides a buck mode timing signal and a boost mode timing signal. The converter switching circuitry provides a switching output signal. During a buck mode of the buck-boost DC-DC converter, when a buck pulse-width of the switching output signal is less than a buck pulse-width threshold, the buck pulse-width is limited based on both the buck mode timing signal and the boost mode timing signal. During a boost mode of the buck-boost DC-DC converter, when a boost pulse-width of the switching output signal is less than a boost pulse-width threshold, the boost pulse-width is limited based on both the buck mode timing signal and the boost mode timing signal. The first inductive element receives and filters the switching output signal to provide a converter output signal.

公开(公告)号：US09966833B2

公开(公告)日：2018-05-08

申请号：US15489479

申请日：2017-04-17

Applicant: RICHTEK TECHNOLOGY CORPORATION

Inventor： Chien-Yang Chen ,  Ta-Yung Yang ,  Yu-Wen Chang

IPC: H02M1/15 ,  H02M7/06 ,  H02M1/32 ,  H05B33/08

CPC classification number: H02M1/15 ,  H02M1/32 ,  H02M3/156 ,  H02M7/06 ,  H02M2001/0045 ,  H05B33/0809 ,  H05B33/0815 ,  H05B33/089

Abstract: The present invention discloses a switching regulator capable of reducing current ripple and a control circuit thereof. The switching regulator includes a buck power stage circuit and a control circuit. The control circuit includes an operation signal generation circuit and a current source circuit for reducing current ripple. The current source circuit is coupled to the operation signal generation circuit and the buck power stage circuit, for operating a ripple reduction switch therein according to an operation signal, to convert the output voltage to a load voltage between a load node and a reference node, and to reduce a current ripple of the output current, so as to generate a load current which is supplied to a load circuit, wherein the load circuit is coupled between the load node and the reference node, and the current source circuit is coupled between the output node and the load node.

公开(公告)号：US09948191B2

公开(公告)日：2018-04-17

申请号：US15494818

申请日：2017-04-24

Applicant: Shenzhen Skyworth-RGB Electronic Co., Ltd.

Inventor： Jianzhong Chen ,  Jitao Yang

IPC: H02M3/335 ,  H02M1/44 ,  H02M1/32 ,  H02M1/36

CPC classification number: H02M3/33507 ,  H02M1/32 ,  H02M1/36 ,  H02M1/4258 ,  H02M1/44 ,  H02M3/33523 ,  H02M2001/0003 ,  H02M2001/0045 ,  Y02B70/126

Abstract: A constant output circuit is disclosed that includes a power supply circuit, a LM-FOT control circuit, a switching circuit and a transformer. Output ends of the power supply circuit are respectively connected with a first input end of the LM-FOT control circuit and an end of a primary winding of the transformer. A controlling end of the LM-FOT control circuit is connected with a controlled end of the switching circuit. A second input end of the LM-FOT control circuit is connected with an output end of the switching circuit. An input end of the switching circuit is connected with the other end of the primary winding of the transformer. An end of a secondary line winding of the transformer is configured for outputting constant voltage signals. Another end of the secondary line winding of the transformer is grounded.

公开(公告)号：US09929696B2

公开(公告)日：2018-03-27

申请号：US14163256

申请日：2014-01-24

Applicant: RF Micro Devices, Inc.

Inventor： Nadim Khlat ,  Michael R. Kay ,  Manbir Singh Nag

IPC: H01Q11/12 ,  H04B1/04 ,  H03F3/189 ,  H03F1/02 ,  H03F3/195 ,  H03F3/24 ,  H02M1/00

CPC classification number: H03F1/0227 ,  H02M2001/0045 ,  H03F1/0266 ,  H03F3/195 ,  H03F3/24 ,  H03F2200/375 ,  H03F2200/432 ,  H03F2200/451 ,  H03F2200/471 ,  H03F2200/555

Abstract: A parallel amplifier and an offset capacitance voltage control loop are disclosed. The parallel amplifier has a parallel amplifier output, which is coupled to an envelope tracking power supply output via an offset capacitive element. The offset capacitive element has an offset capacitive voltage. The offset capacitance voltage control loop regulates the offset capacitive voltage, which is adjustable on a communications slot-to-communications slot basis.

公开(公告)号：US20180076647A1

公开(公告)日：2018-03-15

申请号：US15701178

申请日：2017-09-11

Applicant: Intersil Americas LLC

Inventor： Jia WEI ,  Gary KIDWELL

IPC: H02J7/00 ,  H02M3/158

CPC classification number: H02J7/0068 ,  H02J7/0029 ,  H02J7/0065 ,  H02J7/007 ,  H02J7/022 ,  H02M1/10 ,  H02M3/1582 ,  H02M2001/0045 ,  Y02T90/127

Abstract: The present embodiments relate generally to managing power in a system including a battery, and more particularly to a flexible or hybrid battery charging topology for a system including a battery. In addition to being capable of operating in a conventional narrow voltage DC (NVDC) buck-boost charger mode, it is also capable of operating in a new “turbo power buck-boost” mode, where the input voltage is directly fed to the system load, bypassing the inductor. Compared with the conventional NVDC buck-boost charger topology, the flexible or hybrid topology provided by the present embodiments reduces the inductor size otherwise needed to support new mobile charging protocols, among many other benefits and advantages.

公开(公告)号：US09906169B1

公开(公告)日：2018-02-27

申请号：US15466470

申请日：2017-03-22

Applicant: VANNER, INC.

Inventor： Alexander Isurin ,  Alexander Cook

IPC: H02M7/72 ,  H02M1/44 ,  H02M3/28

CPC classification number: H02M7/72 ,  H02M1/44 ,  H02M3/005 ,  H02M3/28 ,  H02M5/458 ,  H02M7/06 ,  H02M7/4807 ,  H02M7/515 ,  H02M7/537 ,  H02M7/797 ,  H02M2001/0045 ,  H02M2001/0058 ,  H02M2001/007 ,  H02M2001/0074 ,  H02M2003/1557 ,  Y02B70/1491

Abstract: A voltage converter system includes a first DC-AC voltage converter that converts a first DC voltage signal to a first AC voltage signal. A DC link converts the first AC voltage signal to a second DC voltage signal. A second DC-AC voltage converter converts the second DC voltage signal to a second AC voltage signal. In another configuration a DC-AC voltage converter converts a DC voltage signal to a first AC voltage signal. An AC-AC voltage converter converts the first AC voltage signal to a second, lower-frequency AC voltage signal. In yet another configuration a first voltage converter portion converts a DC voltage signal to pulses of DC voltage. A second voltage converter portion converts the pulses of DC voltage to a relatively low-frequency AC voltage signal. The voltage converter system is selectably configurable as a DC-AC voltage converter or an AC-DC voltage converter.

公开(公告)号：US09891646B2

公开(公告)日：2018-02-13

申请号：US14606753

申请日：2015-01-27

Applicant: QUALCOMM Incorporated

Inventor： Zhengming Fu ,  James Thomas Doyle ,  Nazanin Darbanian ,  Shree Krishna Pandey ,  Yi Cao

IPC: G05F1/575 ,  G05F3/08 ,  H02M3/158 ,  H02M1/00 ,  H02M3/156

CPC classification number: G05F3/08 ,  G05F1/575 ,  H02M3/158 ,  H02M3/1582 ,  H02M2001/0045 ,  H02M2003/1566

Abstract: Operational mode changes in a system-on-a-chip (SoC) integrated circuit in a complex device such as a mobile phone cause spikes in current demand which can cause voltage droops that disrupt operation of the SoC. A hybrid parallel power supply capacitively couples a switching-mode power supply and a low-dropout voltage regulator in parallel to provide high efficiency and fast response times. The low-dropout voltage regulator may include a class-AB operational transconductance amplifier driving the coupling capacitor. The switching-mode power supply and the low-dropout voltage regulator can regulate their outputs to slightly difference voltage levels. This can allow the switching-mode power supply to supply most of the SoC's current demands.

公开(公告)号：US20180041204A1

公开(公告)日：2018-02-08

申请号：US15670434

申请日：2017-08-07

Applicant: Skyworks Solutions, Inc.

Inventor： Yu Zhu ,  Oleksiy Klimashov ,  Hailing Wang ,  Dylan Charles Bartle ,  Paul T. DiCarlo

IPC: H03K17/284 ,  H04B1/04 ,  G10H1/057

CPC classification number: H03F1/0222 ,  G10H1/057 ,  H02M2001/0045 ,  H03F1/22 ,  H03F3/193 ,  H03F3/2171 ,  H03F3/245 ,  H03F2200/102 ,  H03F2200/336 ,  H03F2203/7236 ,  H03F2203/7239 ,  H03K17/08122 ,  H03K17/102 ,  H03K17/162 ,  H03K17/284 ,  H03K17/693 ,  H03K2217/0054 ,  H04B1/04 ,  H04B2001/0408 ,  H04B2001/045

Abstract: Aspects of this disclosure relate to a switching circuit with enhanced linearity. The switching circuit can include a switch and an envelope generator. The switch can receive an input signal, provide an output signal, and receive an envelope signal corresponding to an envelope of the input signal. The envelope generator can generate the envelope signal so as to cause intermodulation distortion in the output signal to be reduced to cause linearity of the switch to be improved.

公开(公告)号：US09880573B2

公开(公告)日：2018-01-30

申请号：US14147667

申请日：2014-01-06

Applicant: Dialog Semiconductor GmbH

Inventor： Zakaria Mengad ,  Mykhaylo Teplechuk

IPC: G05F1/575 ,  G05F1/56 ,  H02M3/158 ,  G05F1/59 ,  G05F1/618 ,  H02M1/00

CPC classification number: G05F1/56 ,  G05F1/575 ,  G05F1/59 ,  G05F1/618 ,  H02M3/158 ,  H02M2001/0045

Abstract: A low dropout (LDO) device with improved linear mode comprising an error amplifier, a programmable attenuation factor circuit coupled to said error amplifier, a feedback network whose input is electrically connected to said programmable attenuation factor circuit and whose output is electrically coupled to the negative input of said error amplifier, a high side (HS) pre-drive circuit whose input is a high impedance (HiZ) mode signal, a low side (LS) pre-drive circuit whose input is a low pull-down input mode signal, a high side (HS) output stage element electrically coupled to said high side (HS) pre-drive circuit, a low side (LS) output stage element electrically coupled to said low side (LS) pre-drive circuit, and a high side sense (HSENSE) output stage element whose gate is electrically coupled to said high side (HS) pre-drive circuit, and whose gate and source are electrically connected to the output of said error amplifier.