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    Flash memory apparatus and storage management method for flash memory
    201.
    发明授权
    Flash memory apparatus and storage management method for flash memory 有权

    公开(公告)号：US10157098B2

    公开(公告)日：2018-12-18

    申请号：US15997674

    申请日：2018-06-04

    Applicant: Silicon Motion Inc.

    Inventor： Tsung-Chieh Yang ,  Hong-Jung Hsu ,  Jian-Dong Du

    IPC: G11C16/04 ,  G06F11/10 ,  G11C29/52 ,  G11C16/10 ,  G11C16/26 ,  G11C11/56

    Abstract: A flash memory method includes: classifying data into a plurality of groups of data; respectively executing error code encoding to generate first corresponding parity check code to store the groups of data and first corresponding parity check code into flash memory module as first blocks; reading out the groups of data from first blocks; executing error correction and de-randomize operation upon read out data to generate de-randomized data; executing randomize operation upon de-randomized data according to a set of seeds to generate randomized data; performing error code encoding upon randomized data to generate second corresponding parity check code; and, storing randomized data and second corresponding parity check code into flash memory module as second block; a cell of first block is used for storing data of first bit number which is different from second bit number corresponding to a cell of second block.

    MEMORY ACCESS MODULE FOR PERFORMING MEMORY ACCESS MANAGEMENT
    205.
    发明申请
    MEMORY ACCESS MODULE FOR PERFORMING MEMORY ACCESS MANAGEMENT 审中-公开

    公开(公告)号：US20180012651A1

    公开(公告)日：2018-01-11

    申请号：US15679178

    申请日：2017-08-17

    Applicant: Silicon Motion Inc.

    Inventor： Tsung-Chieh Yang ,  Hsiao-Te Chang ,  Wen-Long Wang

    IPC: G11C11/56 ,  G11C16/08 ,  G06F3/06 ,  G11C16/26

    CPC classification number: G11C11/5642 ,  G06F3/0604 ,  G06F3/0622 ,  G06F3/0629 ,  G06F3/0638 ,  G06F3/0679 ,  G11C11/5628 ,  G11C16/08 ,  G11C16/26

    Abstract: A memory access module for performing memory access management of a storage device includes a plurality of storage cells. Each storage cell has a number of possible bit(s) directly corresponding to possible states of the storage cell. The memory access module further includes: sensing means for performing a plurality of sensing operations, wherein a first sensing operation corresponds to a first sensing voltage, and each subsequent sensing operation corresponds to a sensing voltage determined according to a result of the previous sensing operation; generating means for using the plurality of sensing operations to generate a first digital value and a second digital value of a storage cell; processing means for using the first and the second digital value to obtain soft information of a same bit stored in the storage cell; and decoding means for using the soft information to perform soft decoding.

    Method, memory controller, and memory system for reading data stored in flash memory
    208.
    发明授权
    Method, memory controller, and memory system for reading data stored in flash memory 有权

    公开(公告)号：US09601219B2

    公开(公告)日：2017-03-21

    申请号：US14666316

    申请日：2015-03-24

    Applicant: Silicon Motion Inc.

    Inventor： Tsung-Chieh Yang

    IPC: G06F11/10 ,  G11C29/52 ,  G11C29/02 ,  G11C29/04

    CPC classification number: G06F11/1068 ,  G06F11/1012 ,  G11C11/5642 ,  G11C16/26 ,  G11C29/028 ,  G11C29/52 ,  G11C2029/0411 ,  H03M13/1102

    Abstract: An exemplary method for reading data stored in a flash memory includes: selecting an initial gate voltage combination from a plurality of predetermined gate voltage combination options; controlling a plurality of memory units in the flash memory according to the initial gate voltage combination, and reading a plurality of bit sequences; performing a codeword error correction upon the plurality of bit sequences, and determining if the codeword error correction successful; if the codeword error correction is not successful, determining an electric charge distribution parameter; determining a target gate voltage combination corresponding to the electric charge distribution parameter by using a look-up table; and controlling the plurality of memory units to read a plurality of updated bit sequences according to the target gate voltage combination.

    Method and controller for managing memory device
    209.
    发明授权
    Method and controller for managing memory device 有权
    用于管理存储设备的方法和控制器

    公开(公告)号：US09570183B1

    公开(公告)日：2017-02-14

    申请号：US15163686

    申请日：2016-05-25

    Applicant: Silicon Motion Inc.

    Inventor： Tsung-Chieh Yang

    IPC: G11C16/04 ,  G11C16/20 ,  G11C16/26 ,  G11C16/16 ,  G11C16/10 ,  G11C16/08

    CPC classification number: G11C16/20 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/16 ,  G11C16/26 ,  G11C16/3422 ,  G11C16/3459

    Abstract: A method for managing a memory device includes: sending a last writing command to a specific non-volatile (NV) memory element in the memory device to write a set of data to a specific block of the specific NV memory element, rather than sending either a first writing command or a second writing command to the specific NV memory element, where these writing commands are utilized for writing to the same location at different times, respectively, in order to guarantee data correctness; and after writing the set of data to the specific block, sending a read command to the specific NV memory element to read stored data of the set of data from the specific block, and checking whether the stored data match the set of data to determine whether the specific block is a bad block.

    Abstract translation: 一种用于管理存储器件的方法包括：向存储器件中的特定非易失性（NV）存储器元件发送最后写入命令，以将一组数据写入特定NV存储器元件的特定块，而不是发送 第一写入命令或第二写入命令到特定NV存储器元件，其中这些写入命令分别用于在不同的时间写入相同的位置，以便保证数据的正确性; 并且在将该组数据写入特定块之后，向特定NV存储器元件发送读取命令以从特定块读取该组数据的存储数据，并且检查所存储的数据是否与该组数据匹配以确定是否 具体块是坏块。

    Method for accessing flash memory and associated controller and memory device
    210.
    发明授权
    Method for accessing flash memory and associated controller and memory device 有权
    访问闪存及相关控制器和存储设备的方法

    公开(公告)号：US09489143B2

    公开(公告)日：2016-11-08

    申请号：US14617955

    申请日：2015-02-10

    Applicant: Silicon Motion Inc.

    Inventor： Tsung-Chieh Yang

    IPC: G06F12/00 ,  G06F3/06 ,  G06F12/02

    CPC classification number: G06F3/0619 ,  G06F3/0655 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/0688 ,  G06F12/0246 ,  G06F2206/1014

    Abstract: The present invention provides a method for accessing a flash memory, wherein the flash memory is a Triple-Level Cell flash memory and each word line of the flash memory constitutes a least significant bit (LSB) page, a central significant bit (CSB) page and a most significant bit (MSB) page, each storage unit of each word line of the flash memory is implemented by a floating-gate transistor, and each storage unit supports at least eight write voltage levels, the method includes: generating dummy data according to data of a first page and a second page corresponding to a specific word line of the flash memory, wherein the dummy data is going to be written in a third page corresponding to the specific word line; and writing the data and the dummy data into the flash memory.

    Abstract translation: 本发明提供了一种用于访问闪速存储器的方法，其中闪速存储器是三电平单元闪速存储器，并且闪速存储器的每个字线构成最低有效位（LSB）页，中央有效位（CSB）页 和最高有效位（MSB）页面，闪存的每个字线的每个存储单元由浮栅晶体管实现，并且每个存储单元支持至少八个写电压电平，该方法包括：根据 对应于闪速存储器的特定字线的第一页面和第二页面的数据，其中伪数据将被写入对应于特定字线的第三页面; 并将数据和虚拟数据写入闪速存储器。

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