公开(公告)号：US20100151657A1

公开(公告)日：2010-06-17

申请号：US12334829

申请日：2008-12-15

申请人： Chun-Ling Chiang ,  Jung-Yu Hsieh ,  Ling-Wu Yang

发明人： Chun-Ling Chiang ,  Jung-Yu Hsieh ,  Ling-Wu Yang

IPC分类号： H01L21/322

CPC分类号： H01L21/3225

摘要： A method of improving the intrinsic gettering ability of a wafer is described. A first annealing step is performed to the wafer at a first temperature in an atmosphere containing at least one of oxygen gas and nitrogen gas. A second annealing step is performed to the wafer, at a second temperature higher than the first temperature, in the atmosphere.

摘要翻译： 描述了提高晶片的固有吸气能力的方法。 在包含氧气和氮气中的至少一种的气氛中的第一温度下对晶片进行第一退火步骤。 在大气中在高于第一温度的第二温度下对晶片进行第二退火步骤。

公开(公告)号：US07732352B2

公开(公告)日：2010-06-08

申请号：US11765973

申请日：2007-06-20

申请人： Young Hee Mun ,  Kun Kim ,  Chung Geun Koh ,  Seung Ho Pyi

发明人： Young Hee Mun ,  Kun Kim ,  Chung Geun Koh ,  Seung Ho Pyi

IPC分类号： H01L21/324 ,  H01L21/322

CPC分类号： H01L21/324 ,  H01L21/3225

摘要： By using a two-step RTP (rapid thermal processing) process, the wafer is provided which has an ideal semiconductor device region secured by controlling fine oxygen precipitates and OiSFs (Oxidation Induced Stacking Fault) located on the surface region of the wafer. By performing the disclosed two-step rapid thermal process, the distribution of defects can be accurately controlled and an ideal device active zone can be formed up to a certain distance from the surfaces of the wafer. In addition, it is possible to maximize the internal gettering (IG) efficiency by enabling the oxygen precipitates and the bulk stacking faults to have constant densities in the depth direction in an internal region of the wafer, that is, the bulk region. In order to obtain the constant concentration profile of the oxygen precipitates and the bulk stacking faults in the bulk region, the wafer is subjected to the aforementioned two-step rapid thermal process in a predetermined mixed gas atmosphere.

摘要翻译： 通过使用两步RTP（快速热处理）工艺，提供晶片，其具有通过控制位于晶片表面区域上的精细氧沉淀物和OiSF（氧化诱导堆叠故障）而固定的理想半导体器件区域。 通过执行所公开的两步快速热处理，可以精确地控制缺陷的分布，并且可以形成理想的器件有源区至距离晶片表面一定距离。 此外，通过使晶体的内部区域即体积区域中的氧析出物和体积堆垛层错能够在深度方向上具有恒定的密度，可以使内部吸气（IG）效率最大化。 为了获得体积区域中的氧沉淀物的恒定浓度分布和体积堆垛层错，在预定的混合气体气氛中对晶片进行上述两步快速热处理。

公开(公告)号：US07704858B2

公开(公告)日：2010-04-27

申请号：US11731275

申请日：2007-03-29

申请人： Michael L. McSwiney ,  Matthew V. Metz

发明人： Michael L. McSwiney ,  Matthew V. Metz

IPC分类号： H01L21/322 ,  H01L21/44

CPC分类号： C23C16/45534 ,  C23C16/18 ,  C23C16/45542 ,  H01L29/665 ,  H01L29/78

摘要： A method for forming a nickel silicide layer on a MOS device with a low carbon content comprises providing a substrate within an ALD reactor and performing an ALD process cycle to form a nickel layer on the substrate, wherein the ALD process cycle comprises pulsing a nickel precursor into the reactor, purging the reactor after the nickel precursor, pulsing a mixture of hydrogen and silane into the reactor, and purging the reactor after the hydrogen and silane pulse. The ALD process cycle can be repeated until the nickel layer reaches a desired thickness. The silane used in the ALD process functions as a getterer for the advantageous carbon, resulting in a nickel layer that has a low carbon content. The nickel layer may then be annealed to form a nickel silicide layer with a low carbon content.

摘要翻译： 在具有低碳含量的MOS器件上形成硅化镍层的方法包括在ALD反应器内提供衬底并执行ALD工艺循环以在衬底上形成镍层，其中ALD工艺循环包括将镍前体 进入反应器，在镍前体之后吹扫反应器，将氢和硅烷的混合物脉冲进入反应器，并在氢和硅烷脉冲之后清洗反应器。 可以重复ALD工艺循环，直到镍层达到所需的厚度。 用于ALD工艺中的硅烷作为有利碳的吸收剂起作用，产生具有低碳含量的镍层。 然后镍层可以退火以形成具有低碳含量的硅化镍层。

公开(公告)号：US20100099213A1

公开(公告)日：2010-04-22

申请号：US12579779

申请日：2009-10-15

申请人： PENG YI WU ,  SHIH CHENG HUANG ,  PO MIN TU ,  YING CHAO YEH ,  WEN YU LIN ,  SHIH HSIUNG CHAN

发明人： PENG YI WU ,  SHIH CHENG HUANG ,  PO MIN TU ,  YING CHAO YEH ,  WEN YU LIN ,  SHIH HSIUNG CHAN

IPC分类号： H01L21/322 ,  H01L21/28

CPC分类号： H01L21/02521 ,  H01L21/0237 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/02639 ,  H01L21/02642 ,  H01L21/0265 ,  H01L33/007 ,  H01L33/12

摘要： The present invention provides a method for blocking the dislocation propagation of a semiconductor. A semiconductor layer is formed by epitaxial process on a substrate. A plurality of recesses is formed on the semiconductor layer by etching fragile locations of the semiconductor layer where dislocation occurs. Thereafter, a blocking layer is formed on each of the plurality of recesses. The aforesaid semiconductor layer undergoes epitaxial process again on the aforesaid semiconductor layer, and laterally overgrows to redirect the dislocation defects.

摘要翻译： 本发明提供一种阻止半导体位错传播的方法。 在衬底上通过外延工艺形成半导体层。 通过蚀刻发生位错的半导体层的脆弱位置，在半导体层上形成多个凹部。 此后，在多个凹部中的每一个上形成阻挡层。 上述半导体层在上述半导体层上再次进行外延处理，并横向过度地重新定位位错缺陷。

公开(公告)号：US20100047952A1

公开(公告)日：2010-02-25

申请号：US12341699

申请日：2008-12-22

申请人： Hideto Ohnuma ,  Takashi Hirose

发明人： Hideto Ohnuma ,  Takashi Hirose

IPC分类号： H01L21/322 ,  H01L31/00

CPC分类号： H01L31/0236 ,  H01L31/02363 ,  H01L31/076 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

摘要： A fragile layer is formed in a single crystal silicon substrate, a first impurity silicon layer is formed on the one surface side in the single crystal silicon substrate, and a first electrode is formed thereover. After one surface of a supporting substrate and the first electrode are bonded, the single crystal silicon substrate is separated along the fragile layer to form a single crystal silicon layer over the supporting substrate. Crystal defect repair treatment or crystal defect elimination treatment of the single crystal silicon layer is performed; then, epitaxial growth is conducted on the single crystal silicon layer by activating a source gas containing at least a silane-based gas with plasma generated at atmospheric pressure or near atmospheric pressure. A second impurity silicon layer is formed on a surface side in the single crystal silicon layer which is epitaxial grown.

摘要翻译： 在单晶硅衬底中形成脆性层，在单晶硅衬底的一个表面侧形成第一杂质硅层，并在其上形成第一电极。 在支撑基板的一个表面和第一电极接合之后，沿着脆性层分离单晶硅基板，以在支撑基板上形成单晶硅层。 执行晶体缺陷修复处理或单晶硅层的晶体缺陷消除处理; 然后通过在大气压或接近大气压下产生的等离子体激活至少含有硅烷系气体的源气体，在单晶硅层上进行外延生长。 在外延生长的单晶硅层的表面侧形成第二杂质硅层。

公开(公告)号：US20100046567A1

公开(公告)日：2010-02-25

申请号：US12540274

申请日：2009-08-12

申请人： Zuzanna Liliental-Weber ,  Rogerio Luis Maltez ,  Hadis Morkoc ,  Jinqiao Xie

发明人： Zuzanna Liliental-Weber ,  Rogerio Luis Maltez ,  Hadis Morkoc ,  Jinqiao Xie

IPC分类号： H01S5/00 ,  H01L21/322 ,  H01L29/267 ,  H01L33/00 ,  H01L31/0264

CPC分类号： H01L33/007 ,  H01L21/02381 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02658 ,  H01L21/26506 ,  H01L31/0304 ,  H01S5/021 ,  H01S5/32341 ,  Y02E10/544

摘要： Misfit dislocations are redirected from the buffer/Si interface and propagated to the Si substrate due to the formation of bubbles in the substrate. The buffer layer growth process is generally a thermal process that also accomplishes annealing of the Si substrate so that bubbles of the implanted ion species are formed in the Si at an appropriate distance from the buffer/Si interface so that the bubbles will not migrate to the Si surface during annealing, but are close enough to the interface so that a strain field around the bubbles will be sensed by dislocations at the buffer/Si interface and dislocations are attracted by the strain field caused by the bubbles and move into the Si substrate instead of into the buffer epi-layer. Fabrication of improved integrated devices based on GaN and Si, such as continuous wave (CW) lasers and light emitting diodes, at reduced cost is thereby enabled.

摘要翻译： 由于在衬底中形成气泡，不匹配位错从缓冲器/ Si界面重定向并传播到Si衬底。 缓冲层生长过程通常是也实现Si衬底的退火的热处理，使得在Si中与缓冲/ Si界面适当的距离处形成注入的离子种类的气泡，使得气泡不会迁移到 Si表面，但是足够接近界面，使得气泡周围的应变场将被缓冲/ Si界面处的位错感测，并且位错被由气泡引起的应变场吸引并移动到Si衬底中 进入缓冲区外延层。 从而能够以低成本制造基于GaN和Si的改进的集成器件，例如连续波（CW）激光器和发光二极管。

公开(公告)号：US07666762B2

公开(公告)日：2010-02-23

申请号：US11863442

申请日：2007-09-28

申请人： Dong Ki Jeon ,  Han Choon Lee

发明人： Dong Ki Jeon ,  Han Choon Lee

IPC分类号： H01L21/322 ,  H01L21/44

CPC分类号： H01L21/28052 ,  H01L29/665 ,  H01L29/6659 ,  H01L29/7833

摘要： A method for fabricating a semiconductor device is provided. A nickel layer is deposited on a semiconductor substrate and plasma-processed. Rapid thermal processing is performed on the plasma-processed nickel layer to form a nickel silicide layer. The portion of the nickel layer that has not reacted with silicon is then removed.

摘要翻译： 提供一种制造半导体器件的方法。 将镍层沉积在半导体衬底上并进行等离子体处理。 在等离子体处理的镍层上进行快速热处理以形成硅化镍层。 然后除去未与硅反应的镍层的部分。

公开(公告)号：US20100041175A1

公开(公告)日：2010-02-18

申请号：US12499602

申请日：2009-07-08

申请人： Sebastien Dubois ,  Nicolas Enjalbert ,  Remi Monna

发明人： Sebastien Dubois ,  Nicolas Enjalbert ,  Remi Monna

IPC分类号： H01L21/322 ,  H01L31/18

CPC分类号： C01B33/037 ,  H01L21/3221 ,  H01L31/02363 ,  H01L31/028 ,  H01L31/186 ,  Y02E10/547 ,  Y02P70/521

摘要： The invention relates to a method of purifying a crystalline silicon substrate and to a process for producing a photovoltaic cell. The method of purifying a crystalline silicon substrate according to the invention is of the type that includes a step of extracting impurities by external gettering and which includes, before said step of extracting the impurities by external gettering, at least one step of rapidly annealing the substrate at a temperature of between 750° C. and 1000° C. inclusive for a time of between 1 second and 10 minutes inclusive. The invention is particularly applicable in the photovoltaic cell field.

摘要翻译： 本发明涉及一种纯化晶体硅衬底的方法及其制造方法。 根据本发明的纯化晶体硅衬底的方法是包括通过外部吸气提取杂质的步骤的方法，其包括在通过外部吸气萃取杂质的步骤之前，将至少一个步骤快速退火衬底 在750℃和1000℃之间的温度下，包括1秒至10分钟之间的时间。 本发明特别适用于光伏电池领域。

公开(公告)号：US20100038755A1

公开(公告)日：2010-02-18

申请号：US12521268

申请日：2007-12-27

申请人： Hyung Kook Park ,  Jin-Kyun Hong ,  Kun Kim ,  Chung-Geun Koh

发明人： Hyung Kook Park ,  Jin-Kyun Hong ,  Kun Kim ,  Chung-Geun Koh

IPC分类号： H01L29/36 ,  H01L21/322

CPC分类号： H01L21/3225

摘要： A method for making a silicon wafer includes the steps of generating and stabilizing embryos that become oxygen precipitates by succeeding thermal annealing applied during a semiconductor device manufacturing process. In the silicon wafer, embryos are substantially removed in a denuded zone, and embryos are distributed at a relatively higher concentration in a bulk region. Also, by controlling behaviors of embryos, a silicon wafer having a desired concentration profile of oxygen precipitates by succeeding thermal annealing is manufactured with high reliability and reproducibility.

摘要翻译： 制造硅晶片的方法包括以下步骤：通过在半导体器件制造过程中施加的热退火，产生并稳定成为氧沉淀物的胚胎。 在硅晶片中，在裸露区域中基本上除去胚胎，并且在体积区域以相对较高的浓度分布胚胎。 此外，通过控制胚胎的行为，以高可靠性和再现性制造具有期望的热退火的氧析出物浓度分布的硅晶片。

公开(公告)号：US20100009520A1

公开(公告)日：2010-01-14

申请号：US12492260

申请日：2009-06-26

申请人： Jeong Hoon AN ,  Byeong Sam MOON

发明人： Jeong Hoon AN ,  Byeong Sam MOON

IPC分类号： H01L21/322

CPC分类号： H01L21/3221

摘要： A wafer processing method for improving gettering capabilities of wafers made therefrom is presented. The method includes the steps of preparing, annealing and ion-implanting. The preparing step involves preparing the wafer from a silicon ingot. The annealing step involves forming first gettering sites in both sides of the wafer by annealing the wafer. The ion-implanting step involves forming second gettering sites in a back side of the wafer in which the first gettering sites are already formed.

摘要翻译： 提出了一种用于提高由其制成的晶片的吸气能力的晶片加工方法。 该方法包括准备，退火和离子注入的步骤。 制备步骤包括从硅锭制备晶片。 退火步骤包括通过退火晶片在晶片的两侧形成第一吸杂位点。 离子注入步骤涉及在已经形成第一吸气部位的晶片的背面形成第二吸气部位。