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公开(公告)号:US20230253462A1
公开(公告)日:2023-08-10
申请号:US18107684
申请日:2023-02-09
Applicant: FLOSFIA INC. , MIRISE Technologies Corporation , DENSO CORPORATION
Inventor: Takashi SHINOHE , Hiroyuki ANDO , Yasushi HIGUCHI , Shinpei MATSUDA , Kazuya TANIGUCHI , Hiroki WATANABE , Hideo MATSUKI
CPC classification number: H01L29/24 , H01L21/02488 , H01L21/02513 , H01L21/02483 , H01L21/02414 , H01L21/0242 , H01L21/02565 , H01L21/02598 , H01L21/0262 , H01L29/045 , H01L21/02609 , H01L29/7813 , C01G55/002 , C30B29/68 , C30B29/24 , C01P2002/50 , C01P2006/40 , C01P2006/32 , C01P2002/72
Abstract: Provided is a crystalline oxide film including: a plane tilted from a c-plane as a principal plane; gallium; and a metal in Group 9 of the periodic table, the metal in Group 9 of the periodic table among all metallic elements in the film having an atomic ratio of equal to or less than 23%.
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公开(公告)号:US20230207635A1
公开(公告)日:2023-06-29
申请号:US18062289
申请日:2022-12-06
Inventor: Atsushi WATANABE , Tatsuji NAGAOKA
IPC: H01L29/24 , H01L29/872 , H01L23/34
CPC classification number: H01L29/24 , H01L29/872 , H01L23/34
Abstract: A semiconductor device includes a semiconductor substrate having a rectangular shape with a side extending in a first direction and another side extending in a second direction. A thermal conductivity in the first direction of the semiconductor substrate is different from a thermal conductivity in the second direction of the semiconductor substrate. The semiconductor substrate is configured to satisfy a mathematical relation of L1/L2=(K1/K2)0.5 with an inclusive tolerance range of −5% to +5%, where L1 denotes a length of the semiconductor substrate in the first direction, L2 denotes a length of the semiconductor substrate in the second direction, K1 denotes the thermal conductivity in the first direction of the semiconductor substrate, and K2 denotes the thermal conductivity in the second direction of the semiconductor substrate.
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公开(公告)号:US20230178497A1
公开(公告)日:2023-06-08
申请号:US18055618
申请日:2022-11-15
Inventor: Masashi UECHA , Yuji NAGUMO , Hiroki TSUMA , Teruaki KUMAZAWA
CPC classification number: H01L23/562 , H01L29/1608 , H01L21/78 , H01L29/0623
Abstract: A semiconductor device includes a semiconductor substrate, an end region, and an active region. The end region is located above the semiconductor substrate, has a frame shape, and has been brought into contact with a blade in a scribing process. The active region is surrounded by the end region and is configured to serve as a path of a main current. The end region has a stress relaxation film on an outermost surface of the end region.
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公开(公告)号:US20230160104A1
公开(公告)日:2023-05-25
申请号:US17988379
申请日:2022-11-16
Applicant: DENSO CORPORATION , TOYOTA JIDOSHA KABUSHIKI KAISHA , MIRISE Technologies Corporation , HAMAMATSU PHOTONICS K.K. , National University Corporation Tokai National Higher Education and Research System
Inventor: Junji OHARA , Takashi ISHIDA , Yoshitaka NAGASATO , Daisuke KAWAGUCHI , Chiaki SASAOKA , Shoichi ONDA , Jun KOJIMA
IPC: C30B33/04 , H01L21/268 , H01L21/78 , B23K26/382 , C30B29/40 , C30B25/20
CPC classification number: C30B33/04 , H01L21/268 , H01L21/7806 , B23K26/382 , C30B29/406 , C30B25/20
Abstract: A method for manufacturing a semiconductor device includes: preparing a processed wafer having a gallium nitride (GaN) wafer and an epitaxial layer on the GaN wafer; forming a device constituent part in a portion of the processes wafer adjacent to a front surface provided by the epitaxial layer; forming a modified layer inside of the processed wafer by applying a laser beam from a back surface side opposite to the front surface side: and dividing the processed wafer at the modified layer. The processed wafer prepared includes a reflective layer for reflecting the laser beam at a position separated from a planned formation position, where the modified layer is to be formed, by a predetermined distance toward the front surface side. The reflective layer contains a layer having a refractive index different from that of a GaN single crystal of an epitaxial layer.
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公开(公告)号:US20230154999A1
公开(公告)日:2023-05-18
申请号:US18052424
申请日:2022-11-03
Inventor: Hidemoto TOMITA
CPC classification number: H01L29/66068 , H01L21/0465
Abstract: A method of manufacturing a silicon carbide semiconductor device includes forming a constituent layer and forming a super junction structure. The formation of the super junction structure includes forming a film-forming mask on the constituent layer, forming an opening portion at the film-forming mask, forming a mask-forming trench at the constituent layer and adopting a portion of the constituent layer surrounding the mask-forming trench as a silicon carbide mask through etching by adopting the film-forming mask, forming a second-conductivity-type column region by ion implantation of impurities at a bottom surface of the mask-forming trench by adopting an ion-implantation mask having the film-forming mask and the silicon carbide mask, and removing a portion of the constituent layer where the silicon carbide mask is formed.
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公开(公告)号:US20230059928A1
公开(公告)日:2023-02-23
申请号:US17834061
申请日:2022-06-07
Inventor: TOMOHIRO NEZUKA , YOSHIKAZU FURUTA , SHOTARO WADA
IPC: G01R15/14 , G01R19/252
Abstract: A current sensor for detecting a current based on a terminal voltage and a resistance value of a shunt resistor, includes: a resistance value correction circuit having: correction resistors; a signal application unit; a voltage detection unit that detects terminal voltages of the shunt resistor and a part of the correction resistors in a first period, and terminal voltages of all of the correction resistors in a second period; and a correction unit that corrects the resistance value for current detection based on a calculated resistance value of the shunt resistor. Resistance values and resistance accuracies of the correction resistors are higher as the plurality of correction resistors are disposed farther from the shunt resistor.
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公开(公告)号:US20230059168A1
公开(公告)日:2023-02-23
申请号:US17886986
申请日:2022-08-12
Applicant: DENSO CORPORATION , TOYOTA JIDOSHA KABUSHIKI KAISHA , MIRISE Technologies Corporation , NATIONAL UNIVERSITY CORPORATION KYOTO INSTITUTE OF TECHNOLOGY
Inventor: Tatsuji NAGAOKA , Hiroyuki NISHINAKA , Masahiro YOSHIMOTO
Abstract: A film formation apparatus includes a stage, a heater, a mist supply source, a superheated vapor supply source, and a delivery device. The stage is configured to allow a substrate to be mounted thereon. The heater is configured to heat the substrate. The mist supply source is configured to supply mist of a solution that comprises solvent and a film material dissolved in the solvent. The superheated vapor supply source is configured to supply a superheated vapor of a same material as the solvent. The delivery device is configured to deliver the mist and the superheated vapor toward a surface of the substrate to grow a film containing the film material on the surface of the substrate.
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公开(公告)号:US20230027143A1
公开(公告)日:2023-01-26
申请号:US17860229
申请日:2022-07-08
Applicant: DENSO CORPORATION , TOYOTA JIDOSHA KABUSHIKI KAISHA , MIRISE Technologies Corporation , QD LASER, Inc.
Inventor: YUKI KAMATA , HIROYUKI TARUMI , KOICHI OYAMA , KEIZO TAKEMASA , KENICHI NISHI , YUTAKA OHNISHI
Abstract: An optical semiconductor device includes an active layer having a plurality of quantum dot layers. The plurality of quantum dot layers include: a first quantum dot layer doped with a p-type impurity; and a second quantum dot layer doped with an n-type impurity and having an emission wavelength different from that of the first quantum dot layer.
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公开(公告)号:US20220406614A1
公开(公告)日:2022-12-22
申请号:US17833307
申请日:2022-06-06
Inventor: KENTA WATANABE , TAKASHI OKAWA
IPC: H01L21/324 , H01L21/02 , H01L29/20
Abstract: A semiconductor device includes: a compound semiconductor layer having a first compound semiconductor layer and a second compound semiconductor layer having a higher melting point than the first compound semiconductor layer; and an insulation gate on the second compound semiconductor layer. The compound semiconductor layer further includes: a drift region; a source region; and a body region between the drift region and the source region. The insulation gate faces the body region. The body region bridges over both the first compound semiconductor layer and the second compound semiconductor layer.
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公开(公告)号:US20220399455A1
公开(公告)日:2022-12-15
申请号:US17830690
申请日:2022-06-02
Inventor: HIROKI TSUMA
IPC: H01L29/49 , H01L29/423
Abstract: An aluminum alloy film includes an Al—Si—Mg alloy film containing at least 0.9% by weight to 1.1% by weight of Si and 0.1% by weight to 2.3% by weight of Mg, and the Al—Si—Mg alloy film contains Mg silicide crystals in Al crystals. A semiconductor device includes multiple gate trench structures, an interlayer insulating film covering the trench gate structures, an electrode film covering the interlayer insulating film, an insulating layer and a conductive layer covering the electrode film. The electrode film includes the Al—Si—Mg alloy film.
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