公开(公告)号：US20070035560A1

公开(公告)日：2007-02-15

申请号：US11496544

申请日：2006-08-01

Applicant: Jong-ho Lee ,  Kwang-kee Lee ,  Un-gyo Jung ,  Glenn Adams

Inventor： Jong-ho Lee ,  Kwang-kee Lee ,  Un-gyo Jung ,  Glenn Adams

IPC: G09G5/00

CPC classification number: G09G5/14 ,  G09G2340/0407 ,  G09G2340/0464 ,  G09G2340/10 ,  G09G2340/12 ,  G09G2340/125 ,  H04N5/445 ,  H04N5/44591 ,  H04N5/45 ,  H04N21/4312 ,  H04N21/4314 ,  H04N21/4316 ,  H04N21/443 ,  H04N21/4622

Abstract: An apparatus for providing multiple screens and a method of dynamically configuring multiple screens are provided. The apparatus for providing multiple screens includes a digital signal processing module which receives predetermined information and restores a service based on the predetermined information, a service processing module which displays one or more logical screens associated with the service, and an output module which arranges the logical screens provided by the service processing module at different locations on a display screen. The logical screens have attribute information indicating whether the logical screens are visible on the display screen.

Abstract translation: 提供了一种用于提供多个屏幕的装置和一种动态配置多个屏幕的方法。 用于提供多个屏幕的装置包括数字信号处理模块，其接收预定信息并基于预定信息恢复服务;服务处理模块，其显示与服务相关联的一个或多个逻辑屏幕;以及输出模块，其布置逻辑 由服务处理模块在显示屏幕上的不同位置提供的屏幕。 逻辑屏幕具有指示逻辑屏幕是否在显示屏幕上可见的属性信息。

公开(公告)号：US20070030389A1

公开(公告)日：2007-02-08

申请号：US11496403

申请日：2006-08-01

Applicant: Jong-ho Lee ,  Kwang-kee Lee ,  Un-gyo Jung ,  Glenn Adams

Inventor： Jong-ho Lee ,  Kwang-kee Lee ,  Un-gyo Jung ,  Glenn Adams

IPC: H04N5/445

CPC classification number: G09G5/14 ,  G09G2340/0407 ,  G09G2340/0464 ,  G09G2340/10 ,  G09G2340/12 ,  G09G2340/125 ,  H04N5/445 ,  H04N5/44591 ,  H04N5/45 ,  H04N21/4312 ,  H04N21/4314 ,  H04N21/4316 ,  H04N21/443 ,  H04N21/4622

Abstract: An apparatus for providing multiple screens and a method of dynamically configuring the multiple screens are provided. The apparatus for providing multiple screens uses flags included transferred packets in order to dynamically configure multiple screens that provide a plurality of contents on a physical display device and a method of dynamically configuring multiple screens. The apparatus for providing multiple screens includes a digital signal processing module which determines whether an application included in data information can be executed on a screen on the basis of received data information, and an operational module which operates the application on the screen on the basis of the determination result.

Abstract translation: 提供了一种用于提供多个屏幕的设备和动态配置多个屏幕的方法。 用于提供多个屏幕的装置使用包括传送分组的标志，以动态地配置在物理显示设备上提供多个内容的多个屏幕以及动态配置多个屏幕的方法。 用于提供多个屏幕的设备包括数字信号处理模块，其确定包括在数据信息中的应用是否可以基于接收到的数据信息在屏幕上执行;以及操作模块，其基于在屏幕上操作该应用 确定结果。

公开(公告)号：US07148541B2

公开(公告)日：2006-12-12

申请号：US10780067

申请日：2004-02-17

Applicant: Tai-su Park ,  Eui-Joon Yoon ,  U-In Chung ,  Si-Young Choi ,  Jong-Ho Lee

Inventor： Tai-su Park ,  Eui-Joon Yoon ,  U-In Chung ,  Si-Young Choi ,  Jong-Ho Lee

IPC: H01L27/01

CPC classification number: H01L29/7851 ,  H01L29/66795 ,  H01L29/7854

Abstract: A field effect transistor can include a vertical channel protruding from a substrate including a source/drain region junction between the vertical channel and the substrate, and an insulating layer extending on a side wall of the vertical channel toward the substrate to beyond the source/drain region junction. The transistor can also include a nitride layer extending on the side wall away from the substrate to beyond the insulating layer, a second insulating layer extending on the side wall that is separated from the channel by the nitride layer, and a gate electrode extending on the side wall toward the substrate to beyond the source/drain region junction. Related methods are also disclosed.

Abstract translation: 场效应晶体管可以包括从包括垂直沟道和衬底之间的源极/漏极区域的衬底突出的垂直沟道，以及在垂直沟道的侧壁上朝向衬底延伸到源极/漏极 区域交界处 晶体管还可以包括在离开衬底的侧壁上延伸超过绝缘层的氮化物层，在侧壁上延伸的第二绝缘层，其通过氮化物层与沟道分离，以及栅电极 侧壁朝向衬底以超出源/漏区结。 还公开了相关方法。

公开(公告)号：US07145431B2

公开(公告)日：2006-12-05

申请号：US10724484

申请日：2003-11-28

Applicant: Jun-Ku Han ,  Su-An Choi ,  Chang-Mo Ko ,  An-Na Lee ,  Jong-Hwan Lee ,  Ju-Dam Kim ,  Jong-Ho Lee

Inventor： Jun-Ku Han ,  Su-An Choi ,  Chang-Mo Ko ,  An-Na Lee ,  Jong-Hwan Lee ,  Ju-Dam Kim ,  Jong-Ho Lee

IPC: H01C7/10

CPC classification number: H01C1/1406 ,  H01C7/02

Abstract: A thermistor is disclosed, which comprises a resistance element having upper and lower surfaces and showing a resistance varying characteristics according to the change of temperature; first and second conductive layers formed on the upper surface of the resistance element and engaged to each other with a non-conductive gap interposed therebetween; first and second electrodes formed on the lower surface of the resistance element and electrically separated from each other; a first connector for electrically connecting the first conductive layer to the first electrode; and a second connector for electrically connecting the second conductive layer to the second electrode. Thus, the thermistor has a structurally point-symmetric shape, so it is possible to prevent the Tombstone phenomenon, caused by an asymmetric structure. Since the conductive layers having opposite polarities are engaged to each other with the non-conductive gap therebetween, the flow of current is increased and the resistance of the thermistor is decreased.

Abstract translation: 公开了一种热敏电阻器，其包括具有上表面和下表面的电阻元件，并且根据温度变化显示出电阻变化特性; 第一和第二导电层形成在电阻元件的上表面上并且彼此接合，并具有插入其间的非导电间隙; 第一和第二电极形成在电阻元件的下表面上并彼此电分离; 用于将所述第一导电层电连接到所述第一电极的第一连接器; 以及用于将所述第二导电层电连接到所述第二电极的第二连接器。 因此，热敏电阻具有结构上点对称的形状，因此可以防止由不对称结构引起的墓碑现象。 由于具有相反极性的导电层之间具有非导电间隙而彼此接合，所以电流的流动增加并且热敏电阻的电阻降低。

公开(公告)号：US20060175289A1

公开(公告)日：2006-08-10

申请号：US11338633

申请日：2006-01-25

Applicant: Hyung-suk Jung ,  Jong-ho Lee ,  Jae-eon Park ,  Sung-kee Han ,  Min-joo Kim

Inventor： Hyung-suk Jung ,  Jong-ho Lee ,  Jae-eon Park ,  Sung-kee Han ,  Min-joo Kim

IPC: C03C15/00 ,  H01L21/302 ,  B44C1/22 ,  C23F1/00

CPC classification number: H01L29/517 ,  H01L21/02172 ,  H01L21/265 ,  H01L21/28194 ,  H01L21/31691 ,  H01L21/32134 ,  H01L21/32135

Abstract: A method of fabricating a semiconductor device including a high-k dielectric for as a gate insulating layer is provided. The method includes forming a high-k dielectric layer and a conductive layer on a substrate, dry etching a portion of the conductive layer, performing a process to increase a wet etch rate of a remaining portion of the conductive layer, and forming a conductive layer pattern by wet etching the remaining portion of the conductive layer after performing the plasma process or the ion implantation. The process to increase the wet etch rate of the conductive layer including a plasma process and/or an ion implantation on the remaining portion of the conductive layer.

Abstract translation: 提供一种制造包括用作栅极绝缘层的高k电介质的半导体器件的方法。 该方法包括在衬底上形成高k电介质层和导电层，干蚀刻导电层的一部分，执行增加导电层剩余部分的湿蚀刻速率的工艺，以及形成导电层 在执行等离子体处理或离子注入之后湿式蚀刻导电层的剩余部分的图案。 包括在导电层的剩余部分上包括等离子体工艺和/或离子注入的导电层的湿蚀刻速率的方法。

公开(公告)号：US07041238B2

公开(公告)日：2006-05-09

申请号：US10487956

申请日：2002-04-25

Applicant: Do-Yun Kim ,  Jong-Ho Lee ,  Soo-An Choi ,  Joon-Koo Han ,  Chang-Mo Ko

Inventor： Do-Yun Kim ,  Jong-Ho Lee ,  Soo-An Choi ,  Joon-Koo Han ,  Chang-Mo Ko

IPC: H01B1/22 ,  H01B1/24 ,  H01C7/02

CPC classification number: H01C17/06586 ,  H01C7/027

Abstract: PTC conductive polymer composition includes organic polymer containing polyolefin components essentially consisting of 30˜40 w % high density polyethylene (HDPE), 20˜40 w % low density polyethylene (LDPE) and 10˜30 w % ethylene-acrylic-acid (EAA) or ethylene-vinyl-acetate (EVA), and 20˜30 w % high or low density polyethylene which is denaturated into maleic anhydride compound; 60˜120 w % electrical conductive particles dispersed into the organic polymer, the electrical conductive particles by weight of the organic polymer; and 0.2˜0.5 w % peroxidic cross-linking agent added for cross-linking reaction by weight of the organic polymer. Thus, it becomes possible to control PTC characteristics such as switching temperature and trip time of an electrical device by suitably adjusting an added amount of the polyethylene, which is denaturated into maleic anhydride compound.

Abstract translation: PTC导电聚合物组合物包括基本上由30〜40w％的高密度聚乙烯（HDPE），20〜40w％的低密度聚乙烯（LDPE）和10〜30w％的乙烯 - 丙烯酸（EAA）组成的聚烯烃成分的有机聚合物， 或乙烯 - 乙酸乙烯酯（EVA）和20〜30w％的高密度或低密度聚乙烯，其变性成马来酸酐化合物; 60〜120w％的导电颗粒分散在有机聚合物中，导电颗粒按有机聚合物的重量计; 并加入0.2〜0.5w％的过氧化物交联剂用于通过有机聚合物的重量进行交联反应。 因此，通过适当地调节将变性为马来酸酐化合物的聚乙烯的添加量，可以控制电气装置的PTC特性如开关温度和跳闸时间。

公开(公告)号：US07037863B2

公开(公告)日：2006-05-02

申请号：US10659945

申请日：2003-09-10

Applicant: Seok-Joo Doh ,  Hyung-suk Jung ,  Nae-in Lee ,  Jong-ho Lee ,  Yun-seok Kim

Inventor： Seok-Joo Doh ,  Hyung-suk Jung ,  Nae-in Lee ,  Jong-ho Lee ,  Yun-seok Kim

IPC: H01L21/00

CPC classification number: H01L21/02329 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/022 ,  H01L21/02323 ,  H01L21/02337 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L21/28211 ,  H01L21/3143 ,  H01L21/31616 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31662 ,  H01L28/56 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

Abstract: High dielectric layers formed from layers of hafnium oxide, zirconium oxide, aluminum oxide, yttrium oxide, and/or other metal oxides and silicates disposed on silicon substrates or ozone oxide layers over silicon substrates may be nitrided and post thermally treated by oxidation, annealing, or a combination of oxidation and annealing to form high dielectric layers having superior mobility and interfacial characteristics.

公开(公告)号：US20060081905A1

公开(公告)日：2006-04-20

申请号：US11233335

申请日：2005-09-22

Applicant: Seok-jun Won ,  Dae-jin Kwon ,  Jong-ho Lee

Inventor： Seok-jun Won ,  Dae-jin Kwon ,  Jong-ho Lee

IPC: H01L29/94

CPC classification number: H01L21/022 ,  H01L21/02194 ,  H01L21/0228 ,  H01L21/28194 ,  H01L21/3141 ,  H01L21/3142 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L29/40114 ,  H01L29/517 ,  H01L29/78

Abstract: A dielectric multilayer suitable for improving a performance of a microelectronic device and a method of fabricating the dielectric multilayer are provided. The dielectric multilayer of the microelectronic device comprises a composite layer which is formed of oxides of two or more different elements and in which a laminar structure is not formed, and a single layer which is formed on at least one surface of the composite layer and is formed of an oxide of a single element.

Abstract translation: 提供一种适用于改善微电子器件的性能的电介质多层及其制造方法。 微电子器件的电介质多层包括由两个或更多个不同元素的氧化物形成并且其中没有形成层状结构的复合层和形成在复合层的至少一个表面上的单层，并且是 由单一元素的氧化物形成。

公开(公告)号：US20050255246A1

公开(公告)日：2005-11-17

申请号：US11127748

申请日：2005-05-12

Applicant: Yun-Seok Kim ,  Jong-Pyo Kim ,  Ha-Jin Lim ,  Jae-Eun Park ,  Hyung-Suk Jung ,  Jong-Ho Lee ,  Jong-Ho Yang

Inventor： Yun-Seok Kim ,  Jong-Pyo Kim ,  Ha-Jin Lim ,  Jae-Eun Park ,  Hyung-Suk Jung ,  Jong-Ho Lee ,  Jong-Ho Yang

IPC: C23C16/00 ,  C23C16/40 ,  C23C16/455

CPC classification number: C23C16/401 ,  C23C16/45529 ,  C23C16/45531

Abstract: There are provided methods of fabricating a metal silicate layer on a semiconductor substrate using an atomic layer deposition technique. The methods include performing a metal silicate layer formation cycle at least one time in order to form a metal silicate layer having a desired thickness. The metal silicate layer formation cycle includes an operation of repeatedly performing a metal oxide layer formation cycle K times and an operation of repeatedly performing a silicon oxide layer formation cycle Q times. K and Q are integers ranging from 1 to 10 respectively. The metal oxide layer formation cycle includes the steps of supplying a metal source gas to a reactor containing the substrate, exhausting the metal source gas remaining in a reactor to clean the inside of the reactor, and then supplying an oxide gas into the reactor. The silicon oxide layer formation cycle includes supplying a silicon source gas, exhausting the silicon source gas remaining in the reactor to clean the inside of the reactor, and then supplying an oxide gas into the reactor.

Abstract translation: 提供了使用原子层沉积技术在半导体衬底上制造金属硅酸盐层的方法。 所述方法包括至少一次执行金属硅酸盐层形成循环以形成具有所需厚度的金属硅酸盐层。 金属硅酸盐层形成循环包括重复执行金属氧化物层形成循环K次的操作和重复进行氧化硅层形成循环Q次的操作。 K和Q分别为1〜10的整数。 金属氧化物层形成循环包括将金属源气体供给到含有基板的反应器，排出留在反应器内的金属源气体，清洗反应器内部，然后向反应器供给氧化气体的工序。 氧化硅层形成循环包括提供硅源气体，排出留在反应器中的硅源气体以清洁反应器的内部，然后将氧化物气体供应到反应器中。

公开(公告)号：US06875678B2

公开(公告)日：2005-04-05

申请号：US10650415

申请日：2003-08-29

Applicant: Hyung-suk Jung ,  Nae-in Lee ,  Jong-ho Lee ,  Yun-seok Kim

Inventor： Hyung-suk Jung ,  Nae-in Lee ,  Jong-ho Lee ,  Yun-seok Kim

IPC: H01L21/28 ,  H01L21/314 ,  H01L21/316 ,  H01L21/318 ,  H01L29/51 ,  H01L21/3205 ,  H01L21/4763

CPC classification number: H01L21/02329 ,  H01L21/02178 ,  H01L21/02181 ,  H01L21/02189 ,  H01L21/02192 ,  H01L21/022 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/28185 ,  H01L21/28202 ,  H01L21/3143 ,  H01L21/3144 ,  H01L21/31604 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/3185 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

Abstract: High dielectric layers formed from layers of hafnium oxide, zirconium oxide, aluminum oxide, yttrium oxide, and/or other metal oxides and silicates disposed on silicon substrates may be nitrided and post thermally treated by oxidation, annealing, or a combination of oxidation and annealing to form high dielectric layers having superior mobility and interfacial characteristics.

Abstract translation: 可以将设置在硅基板上的由氧化铪，氧化锆，氧化铝，氧化钇和/或其它金属氧化物和硅酸盐的层形成的高介电层氮化并通过氧化，退火或氧化和退火的组合进行后热处理 以形成具有优异的迁移率和界面特性的高介电层。