Electronic fuse having heat spreading structure
    2.
    发明授权
    Electronic fuse having heat spreading structure 有权
    具有散热结构的电子保险丝

    公开(公告)号:US07888772B2

    公开(公告)日:2011-02-15

    申请号:US12013290

    申请日:2008-01-11

    IPC分类号: H01L29/00

    摘要: A semiconductor device includes a fuse transistor for fuse programming and a fuse block connected to the fuse transistor, wherein the fuse block comprises a fuse line and a heat spreading structure connected to the fuse line. The electrical fuse employs the heat spreading structure connected to the fuse line to prevent a rupture of the electrical fuse such that heat, which is generated in the fuse line during a blowing of the fuse line, is spread throughout the heat spreading structure. Thus, a sensing margin of the electrical fuse can be secured and a deterioration of devices adjacent to the electrical fuse by heat generated in the electrical fuse can be prevented.

    摘要翻译: 半导体器件包括用于熔丝编程的熔丝晶体管和连接到熔丝晶体管的熔丝块,其中熔丝块包括熔丝线和连接到熔丝线的散热结构。 电熔丝采用连接到熔丝线的散热结构,以防止电熔丝断裂,使得在熔断丝熔化期间在熔丝线中产生的热量散布在整个散热结构中。 因此,可以确保电熔丝的感测余量,并且可以防止在电熔丝中产生的热量与电熔丝相邻的器件的劣化。

    Method of fabricating metal-insulator-metal capacitor and metal-insulator-metal capacitor manufactured by the method
    3.
    发明授权
    Method of fabricating metal-insulator-metal capacitor and metal-insulator-metal capacitor manufactured by the method 有权
    通过该方法制造金属 - 绝缘体 - 金属电容器和金属 - 绝缘体 - 金属电容器的方法

    公开(公告)号:US07732296B2

    公开(公告)日:2010-06-08

    申请号:US11339151

    申请日:2006-01-25

    IPC分类号: H01L21/20

    摘要: In a method of fabricating a metal-insulator-metal (MIM) capacitor and a metal-insulator-metal (MIM) capacitor fabricated according to the method, the method comprises: forming an insulating-layer pattern on a semiconductor substrate, the insulating-layer pattern having a plurality of openings that respectively define areas where capacitor cells are to be formed; forming a lower electrode conductive layer on the insulating-layer pattern and on the semiconductor substrate; forming a first sacrificial layer that fills the openings on the lower electrode conductive layer; forming a second sacrificial layer on of the first sacrificial layer; planarizing the second sacrificial layer; exposing an upper surface of the lower electrode conductive layer; removing the exposed lower electrode conductive layer to form a plurality of lower electrodes that are separated from each other, each corresponding to a capacitor cell; and forming dielectric layers and upper electrodes, that are separated from each other, each corresponding to a capacitor cell, on each of the lower electrodes to provide a plurality of MIM capacitor cells constituting one capacitor to which the same electric signal is applied.

    摘要翻译: 在制造根据该方法制造的金属 - 绝缘体 - 金属(MIM)电容器和金属 - 绝缘体 - 金属(MIM))电容器的方法中,所述方法包括:在半导体衬底上形成绝缘层图案, 层图案具有分别限定要形成电容器单元的区域的多个开口; 在绝缘层图案和半导体衬底上形成下电极导电层; 形成填充所述下电极导电层上的开口的第一牺牲层; 在所述第一牺牲层上形成第二牺牲层; 平面化第二牺牲层; 暴露下电极导电层的上表面; 去除暴露的下电极导电层以形成彼此分离的多个下电极,每个相应于电容器单元; 并且在每个下电极上形成各自对应于电容器单元的电介质层和上电极,以提供构成相同电信号的一个电容器的多个MIM电容器单元。

    Method of forming a ZrO2 thin film using plasma enhanced atomic layer deposition and method of fabricating a capacitor of a semiconductor memory device having the thin film
    6.
    发明授权
    Method of forming a ZrO2 thin film using plasma enhanced atomic layer deposition and method of fabricating a capacitor of a semiconductor memory device having the thin film 失效
    使用等离子体增强原子层沉积法形成ZrO 2薄膜的方法以及制造具有薄膜的半导体存储器件的电容器的方法

    公开(公告)号:US07491654B2

    公开(公告)日:2009-02-17

    申请号:US11485523

    申请日:2006-07-13

    摘要: Example embodiments of the present invention relate to a method of forming a dielectric thin film and a method of fabricating a semiconductor memory device having the same. Other example embodiments of the present invention relate to a method of forming a ZrO2 thin film and a method of fabricating a capacitor of a semiconductor memory device using the ZrO2 thin film as a dielectric layer. A method of forming a ZrO2 thin film may include supplying a zirconium precursor on a substrate maintained at a desired temperature, thereby forming a chemisorption layer of the precursor on the substrate. The zirconium precursor may be a tris(N-ethyl-N-methylamino)(tert-butoxy) zirconium precursor. The substrate having the chemisorption layer of the precursor may be exposed to the plasma atmosphere of oxygen-containing gas for a desired time, thereby forming a Zr oxide layer on the substrate, and a method of fabricating a capacitor of a semiconductor memory device having the ZrO2 thin film.

    摘要翻译: 本发明的示例性实施例涉及一种形成电介质薄膜的方法及其制造具有该电介质薄膜的半导体存储器件的方法。 本发明的其他示例性实施例涉及形成ZrO 2薄膜的方法以及使用该ZrO 2薄膜作为电介质层制造半导体存储器件的电容器的方法。 形成ZrO 2薄膜的方法可以包括在保持在所需温度的基板上提供锆前体,由此在基板上形成前体的化学吸附层。 锆前体可以是三(N-乙基-N-甲基氨基)(叔丁氧基)锆前体。 具有前体的化学吸附层的基板可以暴露于含氧气体的等离子体气氛所需的时间,从而在基板上形成Zr氧化物层,以及制造半导体存储器件的电容器的方法,其具有 ZrO2薄膜。

    Capacitor having reaction preventing layer and methods of forming the same
    8.
    发明申请
    Capacitor having reaction preventing layer and methods of forming the same 失效
    具有防反射层的电容器及其形成方法

    公开(公告)号:US20060079065A1

    公开(公告)日:2006-04-13

    申请号:US11130647

    申请日:2005-05-17

    IPC分类号: H01L21/20 H01L21/8242

    摘要: The present invention is directed to a capacitor having a reaction preventing layer and a method forming the same. A lower electrode of silicon is formed on a substrate. An assistance layer of metal oxide or metal nitride is formed on the lower electrode. A nitridation process is performed to enable the silicon of the lower electrode, the assistance layer, and nitrogen supplied by the nitridation process to react with one another, forming a reaction preventing layer comprising metal silicon oxynitride or metal silicon nitride. A high-k dielectric film and an upper electrode are formed on the reaction preventing layer.

    摘要翻译: 本发明涉及一种具有反应防止层的电容器及其形成方法。 在基板上形成硅的下部电极。 在下部电极上形成金属氧化物或金属氮化物的辅助层。 进行氮化处理,使得下部电极的硅,辅助层和由氮化处理提供的氮彼此反应,形成包含金属氮氧化硅或金属氮化硅的反应防止层。 在反应防止层上形成高k电介质膜和上电极。

    Method of manufacturing capacitor by performing multi-stepped wet treatment on surface of electrode
    9.
    发明授权
    Method of manufacturing capacitor by performing multi-stepped wet treatment on surface of electrode 有权
    通过对电极表面进行多级湿处理来制造电容器的方法

    公开(公告)号:US07008837B2

    公开(公告)日:2006-03-07

    申请号:US10776053

    申请日:2004-02-11

    IPC分类号: H01L21/8242

    摘要: In a method of manufacturing a capacitor by performing a multi-stepped wet treatment on the surface of a metal electrode, a lower metal electrode of a capacitor is formed, and a primary wet treatment is performed on the surface of the lower metal electrode to remove unwanted surface oxides that may exist on the surface of the lower metal electrode. A secondary wet treatment is then performed on the surface of the lower metal electrode by using a different etchant than the etchant used in the primary wet treatment, in order to remove unwanted surface organic materials that may exist on the surface of the lower metal electrode. A dielectric layer is then formed on the lower metal electrode using a high-k dielectric material. An upper metal electrode is formed on the dielectric layer.

    摘要翻译: 在通过对金属电极的表面进行多级湿式处理来制造电容器的方法中,形成电容器的下部金属电极,并对下部金属电极的表面进行一次湿式处理以除去 可能存在于下金属电极表面的不希望的表面氧化物。 然后通过使用与初次湿处理中使用的蚀刻剂不同的蚀刻剂在下金属电极的表面上进行二次湿处理,以便去除可能存在于下金属电极表面上的不希望的表面有机材料。 然后使用高k电介质材料在下金属电极上形成电介质层。 在电介质层上形成上金属电极。