公开(公告)号：US20130093032A1

公开(公告)日：2013-04-18

申请号：US13272485

申请日：2011-10-13

Applicant: Bucknell C. Webb

Inventor： Bucknell C. Webb

IPC: H01L29/82 ,  H01L21/02

CPC classification number: H01L23/645 ,  H01L28/10 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor trench inductor and transformer structures are provided, which include thin film conductive layers and magnetic layers formed within trenches etched in semiconductor substrates. Semiconductor trench devices effectively provide vertical oriented inductor and transformer structures whereby conductive coils and magnetic layers are vertically oriented on edge within trenches, thereby providing a space-saving compact design, and which allows the conductive layers within the trench to be enclosed by magnetic material, thereby providing a density of magnetic material that increases the storable energy density.

Abstract translation: 提供半导体沟槽电感器和变压器结构，其包括形成在半导体衬底中蚀刻的沟槽内的薄膜导电层和磁性层。 半导体沟槽器件有效地提供垂直取向的电感器和变压器结构，由此导电线圈和磁性层在沟槽内的边缘垂直取向，从而提供节省空间的紧凑设计，并且允许沟槽内的导电层被磁性材料包围， 从而提供增加可储存能量密度的磁性材料的密度。

公开(公告)号：US08102236B1

公开(公告)日：2012-01-24

申请号：US12968118

申请日：2010-12-14

Applicant: Robert E. Fontana, Jr. ,  William J. Gallagher ,  Philipp Herget ,  Bucknell C. Webb

Inventor： Robert E. Fontana, Jr. ,  William J. Gallagher ,  Philipp Herget ,  Bucknell C. Webb

IPC: H01F5/00

CPC classification number: H01F17/0006 ,  H01F3/14

Abstract: A thin film inductor according to one embodiment includes one or more arms; one or more conductors passing through each arm; a first ferromagnetic yoke wrapping partially around the one or more conductors in a first of the one or more arms, the first ferromagnetic yoke comprising a magnetic top section, a magnetic bottom section, and via regions positioned on opposites sides of the one or more conductors in the first of the one or more arms, wherein the magnetic top section and magnetic bottom section are coupled together through a low reluctance path in the via regions; and one or more non-magnetic gaps between the top section and the bottom section in at least one of the via regions. Additional systems and methods are also provided.

Abstract translation: 根据一个实施例的薄膜电感器包括一个或多个臂; 穿过每个臂的一个或多个导体; 所述第一铁磁磁轭围绕所述一个或多个臂中的第一个中的所述一个或多个导体包围，所述第一铁磁轭包括磁性顶部，磁性底部部分和位于所述一个或多个导体的相​​对侧上的通孔区域 在一个或多个臂中的第一个中，其中磁性顶部部分和磁性底部部分通过通孔区域中的低磁阻路径耦合在一起; 以及在至少一个通孔区域中的顶部和底部之间的一个或多个非磁性间隙。 还提供了附加的系统和方法。

公开(公告)号：US20080265428A1

公开(公告)日：2008-10-30

申请号：US11740325

申请日：2007-04-26

Applicant: Bucknell C. Webb

Inventor： Bucknell C. Webb

IPC: H01L23/488

CPC classification number: H01L23/49827 ,  H01L23/481 ,  H01L24/10 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/0557 ,  H01L2224/13 ,  H01L2224/13012 ,  H01L2224/13025 ,  H01L2924/00014 ,  H05K1/112 ,  H05K3/3436 ,  H05K2201/09854 ,  H05K2201/10734 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

Abstract: A method of modifying via and solder ball shapes for maximizing semiconductor chip or silicon carrier strengths relative to thermal expansion and bending load zero points. The method entails modifying circular annular vias into elliptical annular vias so as to reduce stress concentration factors in the chip or carrier at the vias and solder balls. The reduction in the stress concentration is effected in the semiconductor chip or silicon carrier in regions proximate the vias and in wiring layers at the ends of the vias.

Abstract translation: 一种改变通孔和焊球形状的方法，用于相对于热膨胀和弯曲载荷零点使半导体芯片或硅载体的强度最大化。 该方法需要将圆形环形通孔修改为椭圆形环形通孔，以便减少通孔和焊球处的芯片或载体中的应力集中系数。 应力集中的降低在半导体芯片或硅载体中在通孔附近的区域和通孔末端的布线层中实现。

公开(公告)号：US07408780B2

公开(公告)日：2008-08-05

申请号：US11151843

申请日：2005-06-14

Applicant: John P. Karidis ,  Mark D. Schultz ,  Bucknell C. Webb

Inventor： John P. Karidis ,  Mark D. Schultz ,  Bucknell C. Webb

IPC: H05K7/20 ,  F28F7/00

CPC classification number: H01L23/433 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A structure for cooling an electronic device is disclosed. The structure includes a top layer disposed over the electronic device. The structure further includes a plurality of spring elements disposed between the top layer and the electronic device, wherein at least one of the spring elements comprises a spring portion and a fin portion. At least one of the spring elements provides a heat path from the electronic device and provides mechanical compliance. In another embodiment, the structure further includes a heat-conducting layer disposed over the electronic device, wherein the fin portion of each of at least one of the spring elements is coupled to the heat-conducting layer.

Abstract translation: 公开了一种用于冷却电子设备的结构。 该结构包括设置在电子设备上的顶层。 该结构还包括设置在顶层和电子设备之间的多个弹簧元件，其中弹簧元件中的至少一个包括弹簧部分和翅片部分。 至少一个弹簧元件提供来自电子设备的热路径并且提供机械顺应性。 在另一个实施例中，该结构还包括设置在电子设备上的导热层，其中至少一个弹簧元件中的每一个的翅片部分耦合到导热层。

公开(公告)号：US20080122057A1

公开(公告)日：2008-05-29

申请号：US11932891

申请日：2007-10-31

Applicant: Bucknell C. Webb

Inventor： Bucknell C. Webb

IPC: H01L23/14 ,  H05K3/42

CPC classification number: H01L21/481 ,  H01L23/13 ,  H01L23/147 ,  H01L23/5384 ,  H01L23/562 ,  H01L24/81 ,  H01L2224/13147 ,  H01L2224/16 ,  H01L2224/81801 ,  H01L2924/01019 ,  H01L2924/01068 ,  H01L2924/10253 ,  H01L2924/1433 ,  H01L2924/15159 ,  H01L2924/3511 ,  Y10T29/49165 ,  H01L2924/00

Abstract: An apparatus and method providing flexibility to a silicon chip carrier which, in at least one embodiment, comprises multiple chips and a silicon chip carrier having thinned regions between some adjacent chips, thus, allowing for increased flexibility and reduced package warpage.

Abstract translation: 一种为硅芯片载体提供灵活性的装置和方法，该芯片载体在至少一个实施例中包括多个芯片，以及在一些相邻芯片之间具有薄化区域的硅芯片载体，从而允许增加灵活性并减少封装翘曲。

公开(公告)号：US07019926B2

公开(公告)日：2006-03-28

申请号：US10184343

申请日：2002-06-27

Applicant: Timothy J. Chainer ,  Mark D. Schultz ,  Bucknell C. Webb

Inventor： Timothy J. Chainer ,  Mark D. Schultz ,  Bucknell C. Webb

IPC: G11B5/09

CPC classification number: G11B5/59633 ,  G11B5/59605

Abstract: A system and method for self-servo-writing of multi-slot timing patterns is described. Individual timing marks are replaced with groups of timing mark slots. At each timing mark location, a time measurement is made by detecting a timing mark in one of the slots. Also, extensions to the existing timing marks are written in other slots. The combination of timing measurements at every timing mark and extensions to those timing marks written at every opportunity improves the overall precision of the timing propagation. The improved accuracy of timing mark placement produces a commensurate improvement in the placement of the concomitantly written servo-data. In addition, the alignment accuracy of the written pattern is less sensitive to variations in rotation speed and variations in the shape of written transitions. Moreover, only a single disk revolution is required at each servo radius to write servo data and propagate the timing marks.

Abstract translation: 描述了一种用于多时隙定时模式的自伺服写入的系统和方法。 单个定时标记被定时标记位置组替换。 在每个定时标记位置，通过检测其中一个时隙中的定时标记来进行时间测量。 此外，现有时序标记的扩展也写在其他插槽中。 每个定时标记的定时测量和在每个机会上写入的定时标记的扩展的组合可以提高定时传播的总体精度。 定时标记放置的改进精度在同时写入的伺服数据的位置上产生相应的改进。 此外，写入的图案的对准精度对旋转速度的变化和写入的转变的形状的变化较不敏感。 此外，在每个伺服半径处仅需要一次盘旋转以写入伺服数据并传播定时标记。

公开(公告)号：US5659436A

公开(公告)日：1997-08-19

申请号：US405261

申请日：1995-03-16

Applicant: Edward John Yarmchuk ,  Mark Delorman Schultz ,  Bucknell C. Webb ,  Timothy Joseph Chainer

Inventor： Edward John Yarmchuk ,  Mark Delorman Schultz ,  Bucknell C. Webb ,  Timothy Joseph Chainer

IPC: G11B5/012 ,  G11B5/55 ,  G11B5/596 ,  G11B21/10

CPC classification number: G11B5/5534 ,  G11B21/10 ,  G11B21/106 ,  G11B5/59633 ,  G11B5/59644

Abstract: A mechanism for servowriting on a storage medium of a storage device. The storage device has a transducer and a servo loop for positioning the transducer with respect to the storage medium. At least one transition is written on a track of the storage medium, while servoing on other transitions previously recorded on the storage medium. A reference waveform is derived as a function of a closed loop response of the servo loop and a position error waveform. The position error waveform corresponds to one or more position errors of the transducer relative to the previously recorded transitions. The reference waveform is usable in writing subsequent tracks on the storage medium. Using the reference waveform for writing subsequent tracks provides a substantial rejection of mechanical disturbances by the servo loop.

Abstract translation: 一种用于在存储设备的存储介质上进行伺服驱动的机制。 存储装置具有用于相对于存储介质定位换能器的换能器和伺服回路。 至少一个转换被写在存储介质的轨道上，同时伺服在先前记录在存储介质上的其它转换。 作为伺服环路的闭环响应和位置误差波形的函数导出参考波形。 位置误差波形对应于传感器相对于先前记录的转换的一个或多个位置误差。 参考波形可用于将后续轨道写入存储介质上。 使用参考波形写入后续轨道可以显着抑制伺服回路的机械扰动。

公开(公告)号：US08717136B2

公开(公告)日：2014-05-06

申请号：US13347571

申请日：2012-01-10

Applicant: Robert E. Fontana, Jr. ,  William J. Gallagher ,  Philipp Herget ,  Eugene J. O'Sullivan ,  Lubomyr T. Romankiw ,  Naigang Wang ,  Bucknell C. Webb

Inventor： Robert E. Fontana, Jr. ,  William J. Gallagher ,  Philipp Herget ,  Eugene J. O'Sullivan ,  Lubomyr T. Romankiw ,  Naigang Wang ,  Bucknell C. Webb

IPC: H01F27/30 ,  H01F5/00 ,  H01F27/28 ,  H01F27/24

CPC classification number: H01F41/042 ,  H01F27/2804 ,  H01F41/046 ,  H01F2017/0066 ,  H01F2027/348

Abstract: A thin film inductor having yokes, one or more of which is laminated, and one or more conductors passing between the yokes. The laminated yoke or yokes help reduce eddy currents and/or hysteresis losses.

Abstract translation: 一种薄膜电感器，其具有轭，其中一个或多个层叠，以及一个或多个通过轭之间的导体。 叠片磁轭或磁轭有助于减少涡流和/或磁滞损耗。

公开(公告)号：US08686522B2

公开(公告)日：2014-04-01

申请号：US13272485

申请日：2011-10-13

Applicant: Bucknell C. Webb

Inventor： Bucknell C. Webb

IPC: H01L29/82 ,  H01L21/02

CPC classification number: H01L23/645 ,  H01L28/10 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor trench inductor and transformer structures are provided, which include thin film conductive layers and magnetic layers formed within trenches etched in semiconductor substrates. Semiconductor trench devices effectively provide vertical oriented inductor and transformer structures whereby conductive coils and magnetic layers are vertically oriented on edge within trenches, thereby providing a space-saving compact design, and which allows the conductive layers within the trench to be enclosed by magnetic material, thereby providing a density of magnetic material that increases the storable energy density.

Abstract translation: 提供半导体沟槽电感器和变压器结构，其包括形成在半导体衬底中蚀刻的沟槽内的薄膜导电层和磁性层。 半导体沟槽器件有效地提供垂直取向的电感器和变压器结构，由此导电线圈和磁性层在沟槽内的边缘垂直取向，从而提供节省空间的紧凑设计，并且允许沟槽内的导电层被磁性材料包围， 从而提供增加可储存能量密度的磁性材料的密度。

公开(公告)号：US20130314192A1

公开(公告)日：2013-11-28

申请号：US13477978

申请日：2012-05-22

Applicant: Robert E. Fontana, JR. ,  Philipp Herget ,  Eugene J. O'Sullivan ,  Lubomyr T. Romankiw ,  Naigang Wang ,  Bucknell C. Webb

Inventor： Robert E. Fontana, JR. ,  Philipp Herget ,  Eugene J. O'Sullivan ,  Lubomyr T. Romankiw ,  Naigang Wang ,  Bucknell C. Webb

IPC: H01F27/28

CPC classification number: H01F27/2804 ,  H01F5/00 ,  H01F17/0013 ,  H01F2017/0066 ,  H01F2017/0086 ,  H01F2027/2809 ,  H01L28/10

Abstract: A thin film coupled inductor, a thin film spiral inductor, and a system that includes an electronic device and a power supply or power converter incorporating one or more such inductors. A thin film coupled inductor includes a wafer substrate; a bottom yoke comprising a magnetic material above the wafer substrate; a first insulating layer above the bottom yoke; a first conductor above the bottom yoke and separated therefrom by the first insulating layer; a second insulating layer above the first conductor; a second conductor above the second insulating layer; a third insulating layer above the second conductor; and a non-planar top yoke above the third insulating layer, the top yoke comprising a magnetic material.

Abstract translation: 薄膜耦合电感器，薄膜螺旋电感器以及包括电子器件和并入一个或多个此类电感器的电源或功率转换器的系统。 薄膜耦合电感器包括晶片衬底; 底部轭，其包括晶片衬底上方的磁性材料; 在底部轭上方的第一绝缘层; 第一导体，位于底部磁轭之上并由第一绝缘层分离; 在所述第一导体上方的第二绝缘层; 在第二绝缘层上方的第二导体; 在第二导体上方的第三绝缘层; 以及在第三绝缘层上方的非平面顶部磁轭，顶部磁轭包括磁性材料。