公开(公告)号：US08581647B2

公开(公告)日：2013-11-12

申请号：US13293731

申请日：2011-11-10

申请人： Cheng Zhong ,  Swarna L. Navubothu ,  Nam V. Dang ,  Xiaohua Kong

发明人： Cheng Zhong ,  Swarna L. Navubothu ,  Nam V. Dang ,  Xiaohua Kong

IPC分类号： H03L7/06

CPC分类号： H03L7/0893

摘要： A method includes tracking a tuning voltage at a first circuit coupled to a first drain node of a first supply of a charge pump. The method also includes tracking the tuning voltage at a second circuit coupled to a second drain node of a second supply of the charge pump. The method further includes stabilizing a first voltage of the first drain node and a second voltage of the second drain node responsive to the tuning voltage.

摘要翻译： 一种方法包括在耦合到电荷泵的第一电源的第一漏极节点的第一电路处跟踪调谐电压。 该方法还包括在耦合到电荷泵的第二电源的第二漏极节点的第二电路处跟踪调谐电压。 该方法还包括响应于调谐电压稳定第一漏极节点的第一电压和第二漏极节点的第二电压。

公开(公告)号：US08542039B2

公开(公告)日：2013-09-24

申请号：US13294273

申请日：2011-11-11

申请人： Miao Li ,  Zhi Zhu ,  Xiaohua Kong ,  Nam V. Dang

发明人： Miao Li ,  Zhi Zhu ,  Xiaohua Kong ,  Nam V. Dang

IPC分类号： H03B1/00 ,  H03K3/00

CPC分类号： H03K19/018514 ,  H04L25/0272 ,  H04L25/0286

摘要： In an example, a high-speed pre-driver and voltage level converter with built-in de-emphasis for HDMI transmit applications is provided. An exemplary integrated circuit includes a serializer, a pre-driver coupled to receive a differential input from the serializer, and a driver. The pre-driver includes all-p-type metal-oxide-silicon (PMOS) cross-coupled level converter comprising four PMOS transistors and two de-emphasis PMOS transistors forming a de-emphasis tap coupled to the output of the cross-coupled level converter. The driver is coupled to the pre-driver output and is configured to receive a differential input from the pre-driver.

摘要翻译： 在一个例子中，提供了一个高速预驱动器和电压电平转换器，内置去加重HDMI传输应用。 示例性集成电路包括串行器，耦合以从串行器接收差分输入的预驱动器和驱动器。 预驱动器包括全部p型金属氧化物硅（PMOS）交叉耦合电平转换器，其包括四个PMOS晶体管和两个去加重PMOS晶体管，其形成耦合到交叉耦合电平的输出的去加重抽头 转换器。 驱动器耦合到预驱动器输出，并被配置为从前驱动器接收差分输入。

公开(公告)号：US08527797B2

公开(公告)日：2013-09-03

申请号：US11964072

申请日：2007-12-26

申请人： Xiaohua Kong ,  Lew G. Chua-Eoan ,  Sei Seung Yoon ,  Zhi Zhu

发明人： Xiaohua Kong ,  Lew G. Chua-Eoan ,  Sei Seung Yoon ,  Zhi Zhu

IPC分类号： G06F1/32

CPC分类号： H03K19/0016 ,  G06F9/3871

摘要： Systems and methods of leakage control in an asynchronous pipeline are disclosed. In an embodiment, a signal is received from a preceding stage at an operative stage of an asynchronous circuit device, and a switch associated with the operative stage is activated in response to the control signal being sent to the operative stage to enable power to the operative stage.

摘要翻译： 公开了异步管道中泄漏控制的系统和方法。 在一个实施例中，在异步电路设备的操作阶段从前一级接收信号，并且响应于控制信号被发送到操作级而使与操作级相关联的开关被激活以使能到操作 阶段。

公开(公告)号：US20130191679A1

公开(公告)日：2013-07-25

申请号：US13420800

申请日：2012-03-15

申请人： Jingcheng Zhuang ,  Nam V. Dang ,  Xiaohua Kong ,  Zhi Zhu ,  Tirdad Sowlati ,  Behnam Amelifard

发明人： Jingcheng Zhuang ,  Nam V. Dang ,  Xiaohua Kong ,  Zhi Zhu ,  Tirdad Sowlati ,  Behnam Amelifard

IPC分类号： G06F1/24

CPC分类号： H03L7/0807 ,  H03L7/087 ,  H03L7/091 ,  H03L7/14 ,  H04L7/0004 ,  H04L7/033

摘要： A clock/data recovery circuit includes an edge detector circuit operable to receive a serial data burst and to generate a reset signal in response to a first edge of the serial data burst. The clock/data recovery circuit may also include an oscillator coupled to the edge detector circuit. The oscillator locks onto a target data rate prior to receipt of the serial data burst and locks onto a phase of the serial data burst in response to the reset signal. The clock/data recovery circuit may also include a phase detector circuit that receives the serial data burst. The phase detector circuit is coupled to the oscillator. The phase detector circuit adjusts the oscillator to maintain the lock onto the phase of the serial data burst during the serial data burst.

摘要翻译： 时钟/数据恢复电路包括边沿检测器电路，其可操作以接收串行数据脉冲串并响应于串行数据脉冲串的第一个边沿而产生复位信号。 时钟/数据恢复电路还可以包括耦合到边缘检测器电路的振荡器。 振荡器在接收到串行数据脉冲串之前锁定到目标数据速率上，并响应于复位信号锁定到串行数据脉冲串的相位上。 时钟/数据恢复电路还可以包括接收串行数据突发的相位检测器电路。 相位检测器电路耦合到振荡器。 相位检测器电路调节振荡器以在串行数据突发期间保持锁定到串行数据突发的相位。

公开(公告)号：US20130120040A1

公开(公告)日：2013-05-16

申请号：US13293731

申请日：2011-11-10

申请人： Cheng Zhong ,  Swarna L. Navubothu ,  Nam V. Dang ,  Xiaohua Kong

发明人： Cheng Zhong ,  Swarna L. Navubothu ,  Nam V. Dang ,  Xiaohua Kong

IPC分类号： H03L7/06

CPC分类号： H03L7/0893

摘要： A method includes tracking a tuning voltage at a first circuit coupled to a first drain node of a first supply of a charge pump. The method also includes tracking the tuning voltage at a second circuit coupled to a second drain node of a second supply of the charge pump. The method further includes stabilizing a first voltage of the first drain node and a second voltage of the second drain node responsive to the tuning voltage.

摘要翻译： 一种方法包括在耦合到电荷泵的第一电源的第一漏极节点的第一电路处跟踪调谐电压。 该方法还包括在耦合到电荷泵的第二电源的第二漏极节点的第二电路处跟踪调谐电压。 该方法还包括响应于调谐电压稳定第一漏极节点的第一电压和第二漏极节点的第二电压。

公开(公告)号：US20130120020A1

公开(公告)日：2013-05-16

申请号：US13294482

申请日：2011-11-11

申请人： Miao Li ,  Behnam Amelifard ,  Xiaohua Kong ,  Nam V. Dang

发明人： Miao Li ,  Behnam Amelifard ,  Xiaohua Kong ,  Nam V. Dang

IPC分类号： H03K19/003

CPC分类号： H03K19/018564 ,  H03K19/01855 ,  H04L25/0264

摘要： An adjustable gain line driver receives an input signal and a gain control signal and outputs a signal with a swing, and the swing is measured to generate a swing measurement signal. A target swing signal is generated having a target swing, and the target swing signal is measured to generate a target swing reference signal. The swing measurement signal is compared to the target swing reference control signal and a counter generating the gain control signal is incremented until the measurement signal meets the target swing reference signal. Optionally a reset signal resets the counter, and the gain control signal, at predetermined events.

摘要翻译： 可调增益线驱动器接收输入信号和增益控制信号并输出​​具有摆幅的信号，并且测量摆动以产生摆动测量信号。 产生具有目标摆动的目标摆动信号，并且测量目标摆动信号以产生目标摆动参考信号。 将摆动测量信号与目标摆动参考控制信号进行比较，生成增益控制信号的计数器递增，直到测量信号满足目标摆动参考信号为止。 可选地，复位信号在预定事件时复位计数器和增益控制信号。

公开(公告)号：US20110193589A1

公开(公告)日：2011-08-11

申请号：US12703233

申请日：2010-02-10

申请人： Lew G. Chua-Eoan ,  Boris Andreev ,  Christopher Phan ,  Amirali Shayan ,  Xiaohua Kong ,  Mikhail Popovich ,  Mauricio Calle ,  IK-Joon Chang

发明人： Lew G. Chua-Eoan ,  Boris Andreev ,  Christopher Phan ,  Amirali Shayan ,  Xiaohua Kong ,  Mikhail Popovich ,  Mauricio Calle ,  IK-Joon Chang

IPC分类号： H03K19/00 ,  G01R19/00

CPC分类号： G01R31/31721 ,  G01R29/26

摘要： An on-chip sensor measures dynamic power supply noise, such as voltage droop, on a semiconductor chip. In-situ logic is employed, which is sensitive to noise present on the power supply of functional logic of the chip. Exemplary functional logic includes a microprocessor, adder, and/or other functional logic of the chip. The in-situ logic performs some operation, and the amount of time required for performing that operation (i.e., the operational delay) is sensitive to noise present on the power supply. Thus, by evaluating the operational delay of the in-situ logic, the amount of noise present on the power supply can be measured.

摘要翻译： 片上传感器测量半导体芯片上的动态电源噪声，如电压下降。 采用原位逻辑，对芯片功能逻辑电源上存在的噪声敏感。 示例性功能逻辑包括芯片的微处理器，加法器和/或其他功能逻辑。 原位逻辑执行一些操作，并且执行该操作所需的时间量（即，操作延迟）对电源上存在的噪声敏感。 因此，通过评估原位逻辑的操作延迟，可以测量电源上存在的噪声量。

公开(公告)号：US08638173B2

公开(公告)日：2014-01-28

申请号：US13296389

申请日：2011-11-15

申请人： Glenn A. Murphy ,  Xiaohua Kong ,  Nam V. Dang

发明人： Glenn A. Murphy ,  Xiaohua Kong ,  Nam V. Dang

IPC分类号： H03L7/00

CPC分类号： H03L7/0891

摘要： A method of calibrating a phase-locked loop (PLL) while maintaining lock includes detecting that a control signal to an oscillator in a PLL has exceeded a threshold value while the PLL is locked to an input signal. In response, an operating current of the oscillator is adjusted to return the control signal below the threshold value while maintaining lock of the PLL to the input signal. Adjusting the operating current includes slowly varying an output current of a calibration circuit coupled to the PLL, enabling the PLL to maintain lock to the input signal during adjustment of the operating current.

摘要翻译： 在保持锁定的同时校准锁相环（PLL）的方法包括在PLL锁定到输入信号的同时检测到PLL中的振荡器的控制信号已经超过阈值。 作为响应，调整振荡器的工作电流以将控制信号返回低于阈值，同时保持锁定到输入信号。 调整工作电流包括缓慢地改变耦合到PLL的校准电路的输出电流，使PLL能够在调节工作电流期间保持对输入信号的锁定。

公开(公告)号：US08634510B2

公开(公告)日：2014-01-21

申请号：US13005271

申请日：2011-01-12

申请人： Xiaohua Kong ,  Vannam Dang ,  Tirdad Sowlati

发明人： Xiaohua Kong ,  Vannam Dang ,  Tirdad Sowlati

IPC分类号： H04L7/02

CPC分类号： H04L7/033 ,  H03L7/07 ,  H03L7/0807 ,  H03L7/0814 ,  H03L7/087 ,  H03L7/091 ,  H03L7/0995

摘要： A bang-bang frequency detector with no data pattern dependency is provided. In examples, the detector recovers a clock from received data, such as data having a non-return to zero (NRZ) format. A first bang-bang phase detector (BBPD) provides first phase information about a phase difference between a sample clock and the clock embedded in the received data. A second BBPD provides second phase information about a second phase difference between the clock embedded in the received data and a delayed version of the sample clock. A frequency difference between the sample clock and the clock embedded in the received data is determined based on the first and second phase differences. The frequency difference can be used to adjust the frequency of the sample clock. A lock detector can be coupled to a BBPD output to determine if the sample clock is locked to the clock embedded in the received data.

摘要翻译： 提供了一种没有数据模式依赖性的爆轰频率检测器。 在示例中，检测器从接收的数据恢复时钟，例如具有不归零（NRZ）格式的数据。 第一个爆炸相位检测器（BBPD）提供关于采样时钟和嵌入在接收数据中的时钟之间的相位差的第一阶段信息。 第二BBPD提供关于嵌入在接收数据中的时钟与采样时钟的延迟版本之间的第二相位差的第二阶段信息。 基于第一和第二相位差来确定采样时钟和嵌入在接收数据中的时钟之间的频率差。 频率差可用于调整采样时钟的频率。 锁定检测器可以耦合到BBPD输出，以确定采样时钟是否锁定在嵌入在接收数据中的时钟。

公开(公告)号：US20090172452A1

公开(公告)日：2009-07-02

申请号：US11964072

申请日：2007-12-26

申请人： Xiaohua Kong ,  Lew G. Chua-Eoan ,  Sei Seung Yoon ,  Zhi Zhu

发明人： Xiaohua Kong ,  Lew G. Chua-Eoan ,  Sei Seung Yoon ,  Zhi Zhu

IPC分类号： G06F1/26

CPC分类号： H03K19/0016 ,  G06F9/3871

摘要： Systems and methods of leakage control in an asynchronous pipeline are disclosed. In an embodiment, a signal is received from a preceding stage at an operative stage of an asynchronous circuit device, and a switch associated with the operative stage is activated in response to the control signal being sent to the operative stage to enable power to the operative stage.

摘要翻译： 公开了异步管道中泄漏控制的系统和方法。 在一个实施例中，在异步电路设备的操作阶段从前一级接收信号，并且响应于控制信号被发送到操作级而使与操作级相关联的开关被激活以使能到操作 阶段。