公开(公告)号：US20210310125A1

公开(公告)日：2021-10-07

申请号：US17352011

申请日：2021-06-18

Applicant: ASM IP Holding B.V.

Inventor： Mingyang Ma ,  Junwei Su ,  Alexandros Demos ,  Xing Lin ,  Sam Kim ,  Gregory Michael Bartlett

IPC: C23C16/52 ,  C23C16/455 ,  B01J4/00 ,  C23C16/44 ,  H01J37/32

Abstract: A gas injection system, a reactor system including the gas injection system, and methods of using the gas injection system and reactor system are disclosed. The gas injection system can be used in gas-phase reactor systems to independently monitor and control gas flow rates in a plurality of channels of a gas injection system coupled to a reaction chamber.

公开(公告)号：US11053591B2

公开(公告)日：2021-07-06

申请号：US16055532

申请日：2018-08-06

Applicant: ASM IP Holding B.V.

Inventor： Mingyang Ma ,  Junwei Su ,  Alexandros Demos ,  Xing Lin ,  Sam Kim ,  Gregory Michael Bartlett

IPC: H01J37/32 ,  C23C16/52 ,  C23C16/455 ,  B01J4/00 ,  C23C16/44

Abstract: A gas injection system, a reactor system including the gas injection system, and methods of using the gas injection system and reactor system are disclosed. The gas injection system can be used in gas-phase reactor systems to independently monitor and control gas flow rates in a plurality of channels of a gas injection system coupled to a reaction chamber.

公开(公告)号：US10797133B2

公开(公告)日：2020-10-06

申请号：US16014981

申请日：2018-06-21

Applicant: ASM IP Holding B.V.

Inventor： Chi-Wei Lo ,  Alexandros Demos ,  Raj Kumar

IPC: H01L29/08 ,  H01L29/267 ,  H01L21/02 ,  C23C16/30 ,  H01L29/167 ,  H01L29/24

Abstract: A method for depositing a phosphorus doped silicon arsenide film is disclosed. The method may include, providing a substrate within a reaction chamber, heating the substrate to a deposition temperature, exposing the substrate to a silicon precursor, an arsenic precursor, and a phosphorus dopant precursor, and depositing the phosphorus doped silicon arsenide film over a surface of the substrate. Semiconductor device structures including a phosphorus doped silicon arsenide film deposited by the methods of the disclosure are also provided.

公开(公告)号：US20240203734A1

公开(公告)日：2024-06-20

申请号：US18540329

申请日：2023-12-14

Applicant: ASM IP Holding B.V.

Inventor： Maritza Mujica ,  Ernesto Suarez ,  Amir Kajbafvala ,  Rami Khazaka ,  Arum Murali ,  Frederick Aryeetey ,  Yanfu Lu ,  Caleb Miskin ,  Alexandros Demos ,  Bibek Karki

IPC: H01L21/02 ,  C30B25/10 ,  C30B25/16 ,  C30B29/06 ,  C30B29/52 ,  C30B29/68 ,  H01L29/78

CPC classification number: H01L21/0262 ,  C30B25/10 ,  C30B25/16 ,  C30B29/06 ,  C30B29/52 ,  C30B29/68 ,  H01L21/02532 ,  H01L21/02579 ,  H01L29/7848 ,  H01L29/167

Abstract: Methods for forming multilayer structures are disclosed. The methods may include, seating a substrate within a chamber body, and regulating a temperature profile across an upper surface of the substrate during each individual deposition phase of multiphase deposition process. Semiconductor device structures including multilayer structures are also disclosed.

公开(公告)号：US20230420309A1

公开(公告)日：2023-12-28

申请号：US18212827

申请日：2023-06-22

Applicant: ASM IP Holding B.V.

Inventor： Omar Elleuch ,  Robinson James ,  Peter Westrom ,  Caleb Miskin ,  Alexandros Demos

IPC: H01L21/66 ,  H01L21/02 ,  H01L21/3065

CPC classification number: H01L22/20 ,  H01L21/02532 ,  H01L21/3065

Abstract: A method of forming silicon within a gap on a surface of a substrate. The method includes use of two or more pyrometers to measure temperatures at two or more positions on a substrate and/or a substrate support and a plurality of heaters that can be divided into zones of heaters, wherein the heaters or zones of heaters can be independently controlled based on the measured temperatures and desired temperature profiles.

公开(公告)号：US20230386889A1

公开(公告)日：2023-11-30

申请号：US18448638

申请日：2023-08-11

Applicant: ASM IP Holding, B.V.

Inventor： Saket Rathi ,  Shiva K.T. Rajavelu Muralidhar ,  Siyao Luan ,  Alexandros Demos ,  Xing Lin

IPC: H01L21/687 ,  H01L21/268 ,  H01L21/67 ,  H01L21/324

CPC classification number: H01L21/6875 ,  H01L21/2686 ,  H01L21/67253 ,  H01L21/67115 ,  H01L21/324 ,  H01L21/68735 ,  H01L21/67248

Abstract: A susceptor for semiconductor substrate processing is disclosed herein. In some embodiments, the susceptor may comprise an inner susceptor portion and an outer susceptor portion. The susceptor portions may self-align via complementary features, such as tabs on the outer susceptor and recesses on the inner susceptor portion. The inner susceptor portion may contain several contact pads with which to support a wafer during semiconductor processing. In some embodiments, the contact pads are hemispherical to reduce contact area with the wafer, thereby reducing risk of backside damage. The inner susceptor portion may contain a cavity with which to receive a thermocouple. In some embodiments, the diameter of the cavity is greater than the diameter of the thermocouple such that the thermocouple does not contact the walls of the cavity during processing, thereby providing highly accurate temperature measurements.

公开(公告)号：US11764101B2

公开(公告)日：2023-09-19

申请号：US17075504

申请日：2020-10-20

Applicant: ASM IP HOLDING B.V.

Inventor： Saket Rathi ,  Shiva K. T. Rajavelu Muralidhar ,  Siyao Luan ,  Alexandros Demos ,  Xing Lin

IPC: H01L21/324 ,  H01L21/687 ,  H01L21/67 ,  H01L21/268 ,  H01L21/683

CPC classification number: H01L21/6875 ,  H01L21/2686 ,  H01L21/324 ,  H01L21/67115 ,  H01L21/67253 ,  H01L21/68735 ,  H01L21/67248

Abstract: A susceptor for semiconductor substrate processing is disclosed herein. In some embodiments, the susceptor may comprise an inner susceptor portion and an outer susceptor portion. The susceptor portions may self-align via complementary features, such as tabs on the outer susceptor and recesses on the inner susceptor portion. The inner susceptor portion may contain several contact pads with which to support a wafer during semiconductor processing. In some embodiments, the contact pads are hemispherical to reduce contact area with the wafer, thereby reducing risk of backside damage. The inner susceptor portion may contain a cavity with which to receive a thermocouple. In some embodiments, the diameter of the cavity is greater than the diameter of the thermocouple such that the thermocouple does not contact the walls of the cavity during processing, thereby providing highly accurate temperature measurements.

公开(公告)号：US20230125884A1

公开(公告)日：2023-04-27

申请号：US18048145

申请日：2022-10-20

Applicant: ASM IP Holding, B.V.

Inventor： Gregory Deye ,  Arun Murali ,  Frederick Aryeetey ,  Caleb Miskin ,  Alexandros Demos

IPC: H01L21/02 ,  H01L21/285 ,  H01L21/67 ,  H01L21/687

Abstract: A material layer deposition method includes supporting a substrate in a preclean module and exposing the substrate to a preclean etchant while supported within the preclean module. The substrate is transferred to a deposition module and exposed to an adsorbate while supported within the deposition module. A material layer is the deposited onto the substrate while supported within the deposition module subsequent to exposing the substrate to the adsorbate. Semiconductor processing systems and computer program products are also described.

公开(公告)号：US20230005744A1

公开(公告)日：2023-01-05

申请号：US17850370

申请日：2022-06-27

Applicant: ASM IP Holding B.V.

Inventor： Caleb Miskin ,  Omar Elleuch ,  Peter Westrom ,  Rami Khazaka ,  Qi Xie ,  Alexandros Demos

IPC: H01L21/02 ,  C23C16/455

Abstract: A method of forming a structure includes supporting a substrate within a reaction chamber of a semiconductor processing system, the substrate having a recess with a bottom surface and a sidewall surface extending upwards from the bottom surface of the recess. A film is deposited within the recess and onto the bottom surface and the sidewall surface of the recess, the film having a bottom segment overlaying the bottom surface of the recess and a sidewall segment deposited onto the sidewall surface of the recess. The sidewall segment of the film is removed while at least a portion bottom segment of the film is retained within the recess, the sidewall segment of the film removed from the sidewall surface more rapidly than removing the bottom segment of the film from the bottom surface of the recess. Semiconductor processing systems and structures formed using the method are also described.

公开(公告)号：US20220301905A1

公开(公告)日：2022-09-22

申请号：US17697145

申请日：2022-03-17

Applicant: ASM IP Holding B.V.

Inventor： Han Ye ,  Kai Zhou ,  Peipei Gao ,  Wentao Wang ,  Kishor Patil ,  Fan Gao ,  Krishnaswamy Mahadevan ,  Xing Lin ,  Alexandros Demos

IPC: H01L21/67 ,  H01L21/66 ,  C23C16/46 ,  C23C16/52

Abstract: A method of operating a reactor system to provide multi-zone substrate temperature control. The method includes, with a first pyrometer, sensing a temperature of a first zone of a substrate supported in the reactor system, and, with a second pyrometer, sensing a temperature of a second zone of the substrate. The method further includes, with a controller, comparing the temperatures of the first and second zones to setpoint temperatures for the first and second zones and, in response, generating control signals to control heating of the substrate. The method also includes controlling, based on the control signals, operations of a heater assembly operating to heat the substrate.