公开(公告)号：US5426752A

公开(公告)日：1995-06-20

申请号：US232400

申请日：1994-04-25

申请人： Kikuo Takahasi ,  Toyohiko Kagimasa ,  Yoshiki Matsuda ,  Toshiaki Mori

发明人： Kikuo Takahasi ,  Toyohiko Kagimasa ,  Yoshiki Matsuda ,  Toshiaki Mori

IPC分类号： G06F12/08 ,  G06F12/10 ,  G06F12/12 ,  G06F12/14

CPC分类号： G06F12/1009 ,  G06F12/145 ,  G06F2212/652

摘要： A method for allocating real pages larger than a conventional size to a plurality of virtual pages of the conventional size in a system including a real storage containing a plurality of real pages and a storage key for holding storage keys used for storage protection purposes of the real pages. The method includes the steps of (A) allocating one of plural split regions having the conventional size obtained by subdividing one of a plurality of real pages having a larger size equal to a value n being a positive integer larger than 1) times larger than the conventional size, to one virtual page having the conventional size (B) repeating step (A) so that split regions having the conventional size within the one real page and within other real pages having the larger size are allocated to virtual pages having the conventional size. Either a real page of a larger size or a group of consecutively located split regions of the convention size are allocated to a virtual page of a size larger than the conventional size.

摘要翻译： 一种用于在包括包含多个真实页面的真实存储器的存储密钥和用于保存真实存储保护目的的存储密钥的系统的系统中，将大于常规尺寸的真实页面分配给常规尺寸的多个虚拟页面的方法 页面。 该方法包括以下步骤：（A）分配具有常规尺寸的多个分割区域中的一个分割区域，其通过将具有大于等于大于等于大于等于1的大于1的正整数的多个实际页面中的一个的多个实际页面之一 具有常规尺寸（B）重复步骤（A）的一个虚拟页面，使得具有一个实际页面内的常规尺寸的分割区域和具有较大尺寸的其它实际页面的分割区域被分配给具有常规尺寸的虚拟页面 。 将大小的实际页面或一般的大小的连续定位的分割区域的组分配给大于常规尺寸的虚拟页面。

公开(公告)号：US5087598A

公开(公告)日：1992-02-11

申请号：US394969

申请日：1989-08-17

申请人： Kenzi Suzuki ,  Toshiaki Mori

发明人： Kenzi Suzuki ,  Toshiaki Mori

IPC分类号： C01B33/26 ,  B01J20/12 ,  B01J21/16 ,  B01J29/04

CPC分类号： B01J29/049

摘要： A pillared clay possessing a desired amount of pillers is produced by heating clay thereby changing the cation-exchange capacity owned by the clay and then adding a cation oligomer as a pillar precursor to the clay thereby causing the oligomer to exchange ion with the cation of the clay.

摘要翻译： 通过加热粘土来制造具有所需量的裱纸的柱状粘土，由此改变由粘土所拥有的阳离子交换能力，然后将阳离子低聚物作为柱前体加入到粘土中，从而使低聚物与阳离子交换离子 粘土。

公开(公告)号：US20090020850A1

公开(公告)日：2009-01-22

申请号：US12174921

申请日：2008-07-17

申请人： Hiroshige Orita ,  Kazunari Kimura ,  Toshiaki Mori

发明人： Hiroshige Orita ,  Kazunari Kimura ,  Toshiaki Mori

IPC分类号： H01L23/64 ,  G06F17/50

CPC分类号： H01L23/5223 ,  H01L27/11807 ,  H01L2924/0002 ,  H01L2924/00

摘要： According to an aspect of the present invention, there is provided a semiconductor design apparatus including: a determination section that determines a connection position of a capacitor to suppress a noise on a layout data in which a layout of circuit cells are completed; a calculation section that calculates a capacitance value required to suppress the noise; a generation section that generates the capacitor satisfying the capacitance value; and a wiring section that wires the capacitor to a power wiring and a ground wiring at the connection position.

摘要翻译： 根据本发明的一个方面，提供了一种半导体设计装置，包括：确定部，确定电容器的连接位置，以抑制电路单元布局完成的布局数据上的噪声; 计算部，其计算抑制噪声所需的电容值; 产生满足电容值的电容器的发生部分; 以及将电容器连接到连接位置处的电力布线和接地布线的布线部。

公开(公告)号：US07091589B2

公开(公告)日：2006-08-15

申请号：US10497536

申请日：2003-12-10

申请人： Toshiaki Mori ,  Kazunori Nakamura ,  Satoru Kuramochi ,  Miyuki Akazawa ,  Koichi Nakayama

发明人： Toshiaki Mori ,  Kazunori Nakamura ,  Satoru Kuramochi ,  Miyuki Akazawa ,  Koichi Nakayama

IPC分类号： H01L23/02

CPC分类号： H01L23/49827 ,  H01L23/49822 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K1/0366 ,  H05K1/162 ,  H05K3/0041 ,  H05K3/0044 ,  H05K3/388 ,  H05K3/4061 ,  H05K3/4069 ,  H05K3/4076 ,  H05K3/426 ,  H05K3/4605 ,  H05K2201/0195 ,  H05K2201/068 ,  H05K2201/09563 ,  H05K2201/09581 ,  H05K2201/09763 ,  H05K2201/09827 ,  H05K2203/025 ,  H05K2203/1338 ,  H05K2203/1581 ,  Y10T29/43 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49153 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00

摘要： In a multilayer wiring board comprising a core board, and a wiring layer and an electrically insulating layer that are stacked on one surface of said core board, a thermal expansion coefficient of said core board in XY directions falls within a range of 2 to 20 ppm, a core member for said core board is a core member selected from silicon, ceramics, glass, a glass-epoxy composite, and metal, said core board is provided with a plurality of through holes that are made conductive between the front and the back by a conductive material, and a capacitor is provided on one surface of said core board, wherein said capacitor comprises an upper electrode being the conductive material in said through hole, and a lower electrode disposed so as to confront said upper electrode via a dielectric layer.

摘要翻译： 在层叠在所述芯板的一个表面上的芯板，布线层和电绝缘层的多层布线基板中，所述芯板的XY方向的热膨胀系数在2〜20ppm的范围内 所述芯板的核心部件是选自硅，陶瓷，玻璃，玻璃 - 环氧复合材料和金属的核心部件，所述芯板设置有多个在正面和背面之间导电的通孔 通过导电材料，并且在所述芯板的一个表面上设置电容器，其中所述电容器包括在所述通孔中作为导电材料的上电极和设置成经由电介质层面对所述上电极的下电极 。

公开(公告)号：US06846990B2

公开(公告)日：2005-01-25

申请号：US10378846

申请日：2003-03-05

申请人： Naomi Kisu ,  Toshiaki Mori ,  Akihiro Ishikawa

发明人： Naomi Kisu ,  Toshiaki Mori ,  Akihiro Ishikawa

IPC分类号： B60R16/02 ,  H02G3/04 ,  H02G3/30 ,  H02G3/38 ,  H02G1/00

CPC分类号： B60R16/0215 ,  H02G3/0487

摘要： An installation vertical groove (13) is formed in a circuit member-installing surface (12) of a resin-molded panel (11). Then, a flat circuit member (14) is inserted into the installation vertical groove, so that the flat circuit member is installed in such a manner that this flat circuit member stands in a direction perpendicular to the circuit member-installing surface. The installation vertical groove has opposed surfaces which are spaced from each other by a distance, corresponding to a thickness of the flat circuit member and are disposed perpendicularly to the circuit member-installing surface, and this installation vertical groove is formed to be disposed below the circuit member-installing surface.

摘要翻译： 在树脂模制板（11）的电路部件安装表面（12）中形成安装垂直槽（13）。 然后，将平坦电路构件（14）插入到安装垂直沟槽中，使得平坦电路构件以这样的方式安装，使得该平坦电路构件垂直于电路构件安装表面的方向。 安装垂直槽具有相对于平坦电路构件的厚度彼此隔开一定距离并且与电路构件安装表面垂直设置的相对表面，并且该安装垂直槽形成为布置在 电路元件安装面。

公开(公告)号：US20050012217A1

公开(公告)日：2005-01-20

申请号：US10497536

申请日：2003-12-10

申请人： Toshiaki Mori ,  Kazunori Nakamura ,  Satoru Kuramochi ,  Miyuki Akazawa ,  Koichi Nakayama

发明人： Toshiaki Mori ,  Kazunori Nakamura ,  Satoru Kuramochi ,  Miyuki Akazawa ,  Koichi Nakayama

IPC分类号： H01L23/498 ,  H05K1/03 ,  H05K1/16 ,  H05K3/00 ,  H05K3/38 ,  H05K3/40 ,  H05K3/42 ,  H05K3/46 ,  H01L23/48

CPC分类号： H01L23/49827 ,  H01L23/49822 ,  H01L2924/0002 ,  H01L2924/09701 ,  H01L2924/3011 ,  H05K1/0306 ,  H05K1/0366 ,  H05K1/162 ,  H05K3/0041 ,  H05K3/0044 ,  H05K3/388 ,  H05K3/4061 ,  H05K3/4069 ,  H05K3/4076 ,  H05K3/426 ,  H05K3/4605 ,  H05K2201/0195 ,  H05K2201/068 ,  H05K2201/09563 ,  H05K2201/09581 ,  H05K2201/09763 ,  H05K2201/09827 ,  H05K2203/025 ,  H05K2203/1338 ,  H05K2203/1581 ,  Y10T29/43 ,  Y10T29/49117 ,  Y10T29/49124 ,  Y10T29/49126 ,  Y10T29/49153 ,  Y10T29/49155 ,  Y10T29/49165 ,  H01L2924/00

摘要： In a multilayer wiring board comprising a core board, and a wiring layer and an electrically insulating layer that are stacked on one surface of said core board, a thermal expansion coefficient of said core board in XY directions falls within a range of 2 to 20 ppm, a core member for said core board is a core member selected from silicon, ceramics, glass, a glass-epoxy composite, and metal, said core board is provided with a plurality of through holes that are made conductive between the front and the back by a conductive material, and a capacitor is provided on one surface of said core board, wherein said capacitor comprises an upper electrode being the conductive material in said through hole, and a lower electrode disposed so as to confront said upper electrode via a dielectric layer.

摘要翻译： 在层叠在所述芯板的一个表面上的芯板，布线层和电绝缘层的多层布线基板中，所述芯板的XY方向的热膨胀系数在2〜20ppm的范围内 所述芯板的核心部件是选自硅，陶瓷，玻璃，玻璃 - 环氧复合材料和金属的核心部件，所述芯板设置有多个在正面和背面之间导电的通孔 通过导电材料，并且在所述芯板的一个表面上设置电容器，其中所述电容器包括在所述通孔中作为导电材料的上电极和设置成经由电介质层面对所述上电极的下电极 。

公开(公告)号：US06353444B1

公开(公告)日：2002-03-05

申请号：US09261757

申请日：1999-03-02

申请人： Noboru Katta ,  Toshiaki Mori ,  Hirotsugu Kawata ,  Toshihiko Kurosaki ,  Yoshiaki Kushiki

发明人： Noboru Katta ,  Toshiaki Mori ,  Hirotsugu Kawata ,  Toshihiko Kurosaki ,  Yoshiaki Kushiki

IPC分类号： G06F300

CPC分类号： H04N21/4147 ,  H04N5/44543 ,  H04N5/775 ,  H04N5/782 ,  H04N21/4131 ,  H04N21/42204 ,  H04N21/4334 ,  H04N21/4755 ,  H04N21/485

摘要： An user interface apparatus that receives a user operation of an electrical device and notifies the electrical device of the instruction to execute an action according to the user operation predicts at least one action, the execution of which is supposed to be desired by the user, provides a user interface for having the user designate one action out of the at least one action, and receives a designation by the user. When receiving the user designation, the user interface apparatus notifies the electrical device of the instruction to execute the action that has been designated by the user.

摘要翻译： 接收电气设备的用户操作并且根据用户操作通知电气设备执行动作的指令的用户接口设备预测用户应该希望执行的至少一个动作， 用户界面，用于使所述用户指定所述至少一个动作中的一个动作，并且接收所述用户的指定。 当接收到用户指定时，用户界面装置通知电气设备执行由用户指定的动作的指令。

公开(公告)号：US5718082A

公开(公告)日：1998-02-17

申请号：US701119

申请日：1996-08-21

申请人： Toshiaki Mori

发明人： Toshiaki Mori

IPC分类号： E06B1/04 ,  E05B15/00 ,  E05B15/02 ,  E05B17/00 ,  E06B1/00

CPC分类号： E05B15/0205 ,  E05B17/0012 ,  E05B15/0006

摘要： A first vertical frame of a frame structure is supported on one side portion of a door by hinges. A latch tacker is attached to a strike that is provided on a second vertical frame of the casing. The latch tacker has a shape such that a latch bolt of a lock body on the door can be held at least from both above and below. A latch bolt receiving aperture is formed in the latch tacker. The latch tacker is fitted into the strike, and the latch bolt is inserted into the latch bolt receiving aperture, whereupon the second vertical frame is supported on the other side portion of the door by the latch tacker.

摘要翻译： 框架结构的第一垂直框架通过铰链支撑在门的一个侧部上。 闩锁装置附接到设置在壳体的第二垂直框架上的撞击。 闩锁装置具有这样的形状，使得门上的锁体的闩锁螺栓可以至少从上下保持。 锁闩装置中形成有闩锁螺栓接收孔。 闩锁装置装配到撞击中，并且将闩锁插入到闩锁接收孔中，于是第二垂直框架由闩锁钉装置支撑在门的另一侧部分上。

公开(公告)号：US5444393A

公开(公告)日：1995-08-22

申请号：US992762

申请日：1992-12-18

申请人： Takashi Yoshimori ,  Toshiaki Mori

发明人： Takashi Yoshimori ,  Toshiaki Mori

IPC分类号： H01L21/82 ,  H01L21/822 ,  H01L27/04 ,  H03K19/177 ,  H03K19/173

CPC分类号： H03K19/1776 ,  H03K19/17704 ,  H03K19/17728 ,  H03K19/17736

摘要： A device includes an electrically programmable semiconductor integrated circuit or circuits, such as a Field Programmable Gate Array. Each circuit comprises a plurality of fundamental sections connected to a plurality of signal lines, wherein each fundamental section is permitted to carry out both operation in a logical operation mode for performing a logical operation using signals delivered from the signal lines and operation in a wiring formation mode for carrying out setting of connecting states between the respective signal lines, whereby the semiconductor integrated circuit is operable in any operation mode arbitrarily selected. The fundamental section may be of a structure capable of performing a sequential logical operation as the logical operation mode. In this case, at least one of the memories of the memory section corresponds to a latch memory.

摘要翻译： 一种器件包括电可编程半导体集成电路或诸如现场可编程门阵列的电路。 每个电路包括连接到多个信号线的多个基本部分，其中允许每个基本部分在逻辑运行模式下执行两个操作，以使用从信号线传递的信号和在布线形成中的操作来执行逻辑运算 模式，用于执行各个信号线之间的连接状态的设置，由此半导体集成电路可以任意选择的任何操作模式操作。 基本部分可以是能够执行顺序逻辑运算作为逻辑运算模式的结构。 在这种情况下，存储器部分的至少一个存储器对应于锁存存储器。

公开(公告)号：US5214012A

公开(公告)日：1993-05-25

申请号：US828755

申请日：1992-01-31

申请人： Kenzi Suzuki ,  Masakazu Horio ,  Hiroyuki Masuda ,  Toshiaki Mori

发明人： Kenzi Suzuki ,  Masakazu Horio ,  Hiroyuki Masuda ,  Toshiaki Mori

IPC分类号： C01B33/26 ,  B01J20/12 ,  B01J21/16 ,  B01J29/04 ,  C01B33/38 ,  C01B33/40 ,  C01B37/00

CPC分类号： B01J29/049 ,  B01J20/12 ,  B01J21/16

摘要： An interlayer cross-linked smectite is produced by a method which includes the steps of preparing a smectite suspension containing a dissolved water-soluble macromolecular compound, adding a cationic hydroxide oligomer to the suspension thereby subjecting the exchangeable cation in the smectite to ion exchange, allowing the resultant smectite suspension to stand at a fixed temperature for a fixed time thereby allowing the cationic hydroxide oligomer of the smectite to age, separating a solid smectite from the resultant suspension, and heating the separated solid smectite. The interlayer interval of the produced smectite can be controlled by adjusting the amount of the cationic hydroxide oligomer.

摘要翻译： 通过包括以下步骤制备层间交联蒙脱石的方法，所述方法包括制备含有溶解的水溶性高分子化合物的蒙皂石悬浮液，向悬浮液中加入阳离子氢氧化物低聚物，由此使蒙皂石中的可交换阳离子进行离子交换，从而允许 所得蒙脱石悬浮液在固定温度下固定固定时间，从而使蒙脱石的阳离子氢氧化物低聚物老化，从所得悬浮液中分离固体蒙脱石，并加热分离的固体蒙脱石。 可以通过调节阳离子氢氧化物低聚物的量来控制产生的蒙皂石的层间距。