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公开(公告)号：US11688724B2
公开(公告)日：2023-06-27
申请号：US16765530
申请日：2019-05-31
Applicant: BOE Technology Group Co., Ltd.
Inventor： Zhiwei Liang , Wenqian Luo , Yingwei Liu , Ke Wang , Qi Yao , Huijuan Wang , Haixu Li , Zhanfeng Cao , Guangcai Yuan , Xue Dong , Guoqiang Wang , Zhijun Lv
CPC classification number: H01L25/167 , H01L24/13 , H01L27/124 , H01L2224/13016 , H01L2224/1319 , H01L2224/13083 , H01L2224/13124 , H01L2224/13147
Abstract: Provided is a display backplate including an array substrate and a plurality of pairs of connection structures on the array substrate, wherein the array substrate includes a plurality of thin-film transistors and a common electrode signal line, wherein at least one of the plurality of thin-film transistors is connected to one of a pair of connection structures and the common electrode signal line is connected to the other of the pair of connection structures; and an area of a first section of the connection structure is negatively correlated with a distance between the first section and a surface of the array substrate, and the first section is parallel to the surface of the array substrate.
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公开(公告)号：US11335712B2
公开(公告)日：2022-05-17
申请号：US16755652
申请日：2019-05-13
Applicant: BOE Technology Group Co., Ltd.
Inventor： Zhiwei Liang , Muxin Di , Ke Wang , Yingwei Liu , Xiaoyan Zhu , Zhanfeng Cao , Guangcai Yuan
Abstract: An array substrate is provided. The array substrate includes a base substrate; a first bonding pad layer including a plurality of first bonding pads on a first side of the base substrate; a second bonding pad layer including a plurality of second bonding pads on a second side of the base substrate, wherein the second side is opposite to the first side; and a plurality of signal lines on a side of the second bonding pad layer away from the base substrate. A respective one of the plurality of second bonding pads extends through the base substrate to electrically connect to a respective one of the plurality of first bonding pads. The respective one of the plurality of first bonding pads includes a protruding portion protruding away from the first side of the base substrate along a direction from the second side to the first side.
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公开(公告)号：US20210407976A1
公开(公告)日：2021-12-30
申请号：US16765530
申请日：2019-05-31
Applicant: BOE Technology Group Co., Ltd.
Inventor： Zhiwei Liang , Wenqian Luo , Yingwei Liu , Ke Wang , Qi Yao , Huijuan Wang , Haixu Li , Zhanfeng Cao , Guangcai Yuan , Xue Dong , Guoqiang Wang , Zhijun Lv
Abstract: Provided is a display backplate includes including an array substrate and a plurality of pairs of connection structures on the array substrate, wherein the array substrate includes a plurality of thin-film transistors and a common electrode signal line, wherein at least one of the plurality of thin-film transistors is connected to one of a pair of connection structures and the common electrode signal line is connected to the other of the pair of connection structures; and an area of a first section of the connection structure is negatively correlated with a distance between the first section and a surface of the array substrate, and the first section is parallel to the surface of the array substrate.
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24.发明申请公开(公告)号：US20200273786A1
公开(公告)日：2020-08-27
申请号：US16530605
申请日：2019-08-02
Applicant: BOE Technology Group Co., Ltd.
Inventor： Muxin Di , Zhiwei Liang , Yingwei Liu , Ke Wang , Zhanfeng Cao , Renquan Gu , Qi Yao , Jaiil Ryu
IPC: H01L23/498 , H01L21/48
Abstract: Embodiments of the present disclosure provide an array substrate, a display device, a method for manufacturing an array substrate, a method for manufacturing a display device, and a spliced display device. The array substrate includes: a base substrate in which a through hole is provided; a filling portion disposed in the through hole, including a recessed structure and made from a flexible material; an electrically conductive pattern disposed on the filling portion and at least partially located in the recessed structure; and a film layer disposed on a side of the electrically conductive pattern facing away from the base substrate.
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公开(公告)号：US20200091263A1
公开(公告)日：2020-03-19
申请号：US16556342
申请日：2019-08-30
Applicant: BOE Technology Group Co., Ltd.
Inventor： Ke Wang , Xinhong Lu , Hehe Hu , Wei Yang , Ce Ning
IPC: H01L27/32 , H01L27/12 , H01L29/417 , H01L29/423 , H01L29/40
Abstract: The present discloses an array substrate and a manufacturing method thereof, and a display device. The array substrate includes a first transistor and a second transistor. The first transistor includes a first active layer, a first gate, a first source and a first drain. The second transistor includes a second active layer, a second gate, a second source and a second drain. An orthographic projection of the second source on the base substrate and an orthographic projection of the second drain on the base substrate at least partially overlap. One of the second source and the second drain is in the same layer as and made from the same material as the first gate. The first source and the first drain are in the same layer as and made from the same material as the other of the second source and the second drain.
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Patent Agency Ranking
公开(公告)号：US10510857B2
公开(公告)日：2019-12-17
申请号：US15865793
申请日：2018-01-09
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Xinhong Lu , Ke Wang , Wei Yang
IPC: H01L29/49 , H01L29/417 , H01L21/02 , H01L21/311 , H01L29/423 , H01L29/786
Abstract: A method for manufacturing a thin film transistor includes: forming a source electrode and a first insulation pattern, where an orthographic projection of the first insulation pattern at a substrate is within an orthographic projection of the source electrode at the substrate; forming an active layer, a second insulation pattern and a gate electrode on the substrate, an exposed portion of the source electrode not covered by the first insulation pattern and the first insulation pattern; exposing a first portion of the action layer on the first insulation pattern by removing parts of the gate electrode and the second insulation pattern; and performing a plasma treatment to the exposed first portion, thereby forming a drain electrode.
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公开(公告)号：US10211342B2
公开(公告)日：2019-02-19
申请号：US15564055
申请日：2017-05-10
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Ke Wang
IPC: H01L29/786 , H01L27/12 , H01L27/32 , H01L29/49
Abstract: A thin film transistor and a fabrication method thereof, an array substrate, and a display panel are provided. The fabrication method of the thin film transistor includes: forming an active layer on a base substrate, the active layer including a channel region; forming an amorphous carbon layer on a region of the active layer other than the channel region; and forming a source electrode and a drain electrode on the amorphous carbon layer, the source electrode and the drain electrode being respectively electrically connected with the active layer through the amorphous carbon layer.
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公开(公告)号：US10141444B2
公开(公告)日：2018-11-27
申请号：US15156858
申请日：2016-05-17
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Abstract: An oxide thin-film transistor, an array substrate and methods for manufacturing the same, and a display device are provided. The method for manufacturing the oxide thin-film transistor includes: forming a pattern of an oxide semi-conductor layer above a base substrate; and illuminating, by a light source, two opposite boundary regions of the pattern of the oxide semi-conductor layer, where the illuminated two opposite boundary regions of the pattern of the oxide semi-conductor layer form ohmic contact layers and a region of the pattern of the oxide semi-conductor layer that is not illuminated forms a semi-conductor active layer; forming a source electrode and a drain electrode which are connected to the semi-conductor active layer via the ohmic contact layers respectively.
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29.发明授权公开(公告)号：US12132160B2
公开(公告)日：2024-10-29
申请号：US17615075
申请日：2020-11-04
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Yingwei Liu , Zhanfeng Cao , Zhiwei Liang , Ke Wang , Muxin Di , Shuang Liang , Yankai Gao
IPC: H01L33/62 , G09F9/302 , H01L25/075 , H01L33/00 , H01L33/38
CPC classification number: H01L33/62 , G09F9/3026 , H01L25/0753 , H01L33/005 , H01L33/387 , H01L2933/0016 , H01L2933/0066
Abstract: A method of manufacturing a driving backplane for display includes: forming a first conductive pattern layer including first conductive lines on a base; and forming a second conductive pattern layer including electrode groups and second conductive lines on a side of the first conductive pattern layer away from the base. The first conductive lines and the second conductive lines cross and are insulated from each other; an electrode group includes a first electrode and a second electrode electrically connected to a corresponding second conductive line. Orthogonal projections, on the base, of the first electrode and a corresponding first conductive line have an overlapping region, and a portion of the first electrode, whose orthogonal projection on the base is located in the overlapping region, is in contact with a portion of the first conductive line, whose orthogonal projection on the base is located in the overlapping region.
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公开(公告)号：US12130527B2
公开(公告)日：2024-10-29
申请号：US18465273
申请日：2023-09-12
Applicant: BOE Technology Group Co., Ltd.
Inventor： Liang Chen , Minghua Xuan , Dongni Liu , Haoliang Zheng , Li Xiao , Zhenyu Zhang , Hao Chen , Ke Wang
IPC: G02F1/1362 , H10K59/131
CPC classification number: G02F1/136286 , H10K59/131
Abstract: The present disclosure discloses a display panel and a display device. The display panel includes: a base substrate, including a plurality of substrate via holes located in a display area of the display panel; and a plurality of driving signal lines and a plurality of bonding terminals, respectively located on different sides of the base substrate. At least one of the plurality of driving signal lines is electrically connected to at least one of the plurality of bonding terminals through the substrate via hole(s).
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