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公开(公告)号:US20110168970A1
公开(公告)日:2011-07-14
申请号:US12920950
申请日:2009-03-05
申请人: Zoran Salcic , Fei Chen , Wei Gao , Wong C. Cheong , Franck Chollet
发明人: Zoran Salcic , Fei Chen , Wei Gao , Wong C. Cheong , Franck Chollet
CPC分类号: H05B33/18 , H05B33/145 , H05B33/20
摘要: A light emitting structure comprising a hot electron source and a layer of ptoelectronic material disposed thereon and optionally p-type material disposed on the optoelectronic material. For example, a light emitting structure that comprises, in order, a polycrystalline silicon layer, a silicon dioxide layer, a zinc oxide layer and an indium tin oxide (ITO) layer. When a sufficient voltage is applied across the layers, light is generated.
摘要翻译: 一种发光结构,包括热电子源和设置在其上的电子材料层,以及可选地配置在光电子材料上的p型材料。 例如,依次包括多晶硅层,二氧化硅层,氧化锌层和氧化铟锡(ITO)层的发光结构。 当跨层施加足够的电压时,产生光。
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22.
公开(公告)号:US20100281357A1
公开(公告)日:2010-11-04
申请号:US12769759
申请日:2010-04-29
申请人: Rong Yao Fu , Wei Gao , Yin Qin Yu , Xue Song Zhang , Shi Wan Zhao
发明人: Rong Yao Fu , Wei Gao , Yin Qin Yu , Xue Song Zhang , Shi Wan Zhao
CPC分类号: G06F9/542 , G06F9/452 , G06F2209/545
摘要: A system and method for processing a Widget at a Web browser. The system includes: a code analyzer for analyzing codes of a Widget to generate an event-instruction mapping table; an event dispatcher which, in response to monitoring of an event of the Widget, queries the event-instruction mapping table to determine whether a corresponding instruction needs to be executed; and a code parser which executes or invokes other means to execute the corresponding instruction, in response to that the event dispatcher determines the corresponding instruction needs to be executed. It is possible to correctly render a Widget at a client without the need to perform more work by a corresponding server.
摘要翻译: 用于在Web浏览器处理Widget的系统和方法。 该系统包括:用于分析小部件的代码以生成事件指令映射表的代码分析器; 事件调度器,响应于对所述小部件的事件的监视,查询所述事件指令映射表以确定是否需要执行相应的指令; 以及响应于事件调度器确定需要执行相应指令的执行或调用其他装置执行相应指令的代码解析器。 可以在客户机上正确呈现Widget,而不需要由相应的服务器执行更多的工作。
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公开(公告)号:US20080299381A1
公开(公告)日:2008-12-04
申请号:US11809959
申请日:2007-06-04
申请人: Fengyan Zhang , Bruce D. Ulrich , Wei Gao , Sheng Teng Hsu
发明人: Fengyan Zhang , Bruce D. Ulrich , Wei Gao , Sheng Teng Hsu
CPC分类号: A61N1/0543 , B82Y15/00 , B82Y30/00 , Y10T29/49128 , Y10T29/4913 , Y10T29/49165 , Y10T29/49167 , Y10T29/49169 , Y10T428/24998
摘要: An iridium oxide (IrOx) nanowire neural sensor array and associated fabrication method are provided. The method provides a substrate with a conductive layer overlying the substrate, and a dielectric layer overlying the conductive layer. The substrate can be a material such as Si, SiO2, quartz, glass, or polyimide, and the conductive layer is a material such as ITO, SnO2, ZnO, TiO2, doped ITO, doped SnO2, doped ZnO, doped TiO2, TiN, TaN, Au, Pt, or Ir. The dielectric layer is selectively wet etched, forming contact holes with sloped walls in the dielectric layer and exposing regions of the conductive layer. IrOx nanowire neural interfaces are grown from the exposed regions of the conductive layer. The IrOx nanowire neural interfaces each have a cross-section in a range of 0.5 to 10 micrometers, and may be shaped as a circle, rectangle, or oval.
摘要翻译: 提供氧化铱(IrOx)纳米线神经传感器阵列及相关制造方法。 该方法提供了具有覆盖在衬底上的导电层的衬底和覆盖导电层的电介质层。 基板可以是诸如Si,SiO 2,石英,玻璃或聚酰亚胺的材料,并且导电层是诸如ITO,SnO 2,ZnO,TiO 2,掺杂的ITO,掺杂的SnO 2,掺杂的ZnO,掺杂的TiO 2,TiN, TaN,Au,Pt或Ir。 电介质层被选择性地湿蚀刻,与电介质层中的倾斜壁形成接触孔并且暴露导电层的区域。 IrOx纳米线神经接口从导电层的暴露区域生长。 IrOx纳米线神经接口各自具有在0.5至10微米的范围内的横截面,并且可以被成形为圆形,矩形或椭圆形。
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公开(公告)号:USD541470S1
公开(公告)日:2007-04-24
申请号:US29262487
申请日:2006-07-03
申请人: Xiao Yang Wu , Wei Gao
设计人: Xiao Yang Wu , Wei Gao
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公开(公告)号:US07208768B2
公开(公告)日:2007-04-24
申请号:US10836669
申请日:2004-04-30
申请人: Yoshi Ono , Wei Gao , John F. Conley, Jr. , Osamu Nishio , Keizo Sakiyama
发明人: Yoshi Ono , Wei Gao , John F. Conley, Jr. , Osamu Nishio , Keizo Sakiyama
IPC分类号: H01L27/15
CPC分类号: H01L33/28 , H01L33/18 , H01L33/34 , Y10S977/95
摘要: A method is provided for forming an electroluminescent device. The method comprises: providing a type IV semiconductor material substrate; forming a p+/n+ junction in the substrate, typically a plurality of interleaved p+/n+ junctions are formed; and, forming an electroluminescent layer overlying the p+/n+ junction(s) in the substrate. The type IV semiconductor material substrate can be Si, C, Ge, SiGe, or SiC. For example, the substrate can be Si on insulator (SOI), bulk Si, Si on glass, or Si on plastic. The electroluminescent layer can be a material such as nanocrystalline Si, nanocrystalline Ge, fluorescent polymers, or type II–VI materials such as ZnO, ZnS, ZnSe, CdSe, and CdS. In some aspect, the method further comprises forming an insulator film interposed between the substrate and the electroluminescent layer. In another aspect, the method comprises forming a conductive electrode overlying the electroluminescent layer.
摘要翻译: 提供了形成电致发光器件的方法。 该方法包括:提供IV型半导体材料基板; 在衬底中形成p + / n +结,通常形成多个交错的p + / n +结; 并且形成覆盖衬底中的p + / n +结的电致发光层。 IV型半导体材料基板可以是Si,C,Ge,SiGe或SiC。 例如,衬底可以是绝缘体上的硅(SOI),玻璃上的体积Si,Si或塑料上的Si。 电致发光层可以是诸如纳米晶体Si,纳米晶体Ge,荧光聚合物或诸如ZnO,ZnS,ZnSe,CdSe和CdS的II-VI族材料的材料。 在一些方面,所述方法还包括形成介于基片和电致发光层之间的绝缘膜。 另一方面,该方法包括形成覆盖电致发光层的导电电极。
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公开(公告)号:US20070035267A1
公开(公告)日:2007-02-15
申请号:US11522400
申请日:2006-09-18
申请人: Wei Gao , Satoshi Kiyono , Yoshiyuki Tomita , Makoto Tano
发明人: Wei Gao , Satoshi Kiyono , Yoshiyuki Tomita , Makoto Tano
IPC分类号: B64C17/06
CPC分类号: G03F7/70775 , G03F7/70716
摘要: This invention relates to a stage device which is moved with high accuracy in an X-Y direction and a rotating direction using a planar motor. The invention is aimed at reducing the size of the stage device and at performing accurately measurement of a position of the stage to the base. The stage device comprises a scale unit having a scale part on the entire plane of the base, and three two-dimensional angle sensors disposed on a bottom surface of a movable stage part. The scale unit and the two-dimensional angle sensors form a surface encode. A position of the movable stage part is measured by the surface encoder.
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公开(公告)号:US07129552B2
公开(公告)日:2006-10-31
申请号:US10677006
申请日:2003-09-30
CPC分类号: H01L29/66583 , H01L21/28088 , H01L21/28194 , H01L29/4966 , H01L29/517 , H01L29/78
摘要: MOSFET gate structures are provided comprising a niobium monoxide gate, overlying a gate dielectric. The niobium monoxide gate may have a low work function suitable for use as an NMOS gate.
摘要翻译: 提供包括覆盖栅极电介质的铌氧化物栅极的MOSFET栅极结构。 铌氧化物栅可能具有适合用作NMOS栅极的低功函数。
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公开(公告)号:US20060180816A1
公开(公告)日:2006-08-17
申请号:US11058505
申请日:2005-02-14
申请人: Tingkai Li , Wei Gao , Yoshi Ono , Sheng Hsu
发明人: Tingkai Li , Wei Gao , Yoshi Ono , Sheng Hsu
IPC分类号: H01L29/26
CPC分类号: H05B33/145
摘要: A method is provided for forming a Si electroluminescence (EL) device for emitting light at short wavelengths. The method comprises: providing a substrate; forming a first insulator layer overlying the substrate; forming a silicon-rich silicon oxide (SRSO) layer overlying the first insulator layer, embedded with nanocrystalline Si having a size in the range of 0.5 to 5 nm; forming a second insulator layer overlying the SRSO layer; and, forming a top electrode. Typically, the SRSO has a Si richness in the range of 5 to 40%. In one aspect, the SRSO layer is formed using a DC sputtering process. In another aspect, the SRSO formation step includes a rapid thermal annealing (RTA) process subsequent to depositing the SRSO. Likewise, thermal oxidation or plasma oxidation can be performed subsequent to the SRSO layer deposition. The size of Si nanocrystals is decreased in response to above-mentioned deposition, annealing, and oxidation processes.
摘要翻译: 提供一种用于形成用于发射短波长的光的Si电致发光(EL)装置的方法。 该方法包括:提供衬底; 形成覆盖所述衬底的第一绝缘体层; 形成覆盖在第一绝缘体层上的富硅氧化物(SRSO)层,其中嵌入尺寸在0.5至5nm范围内的纳米晶体Si; 形成覆盖所述SRSO层的第二绝缘体层; 并形成顶部电极。 通常,SRSO的Si浓度范围为5〜40%。 在一个方面,使用DC溅射工艺形成SRSO层。 另一方面,SRSO形成步骤包括在沉积SRSO之后的快速热退火(RTA)工艺。 同样地,可以在SRSO层沉积之后进行热氧化或等离子体氧化。 响应于上述沉积,退火和氧化过程,Si纳米晶体的尺寸减小。
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29.
公开(公告)号:US20060160335A1
公开(公告)日:2006-07-20
申请号:US11039463
申请日:2005-01-19
申请人: Tingkai Li , Wei Gao , Yoshi Ono , Sheng Hsu
发明人: Tingkai Li , Wei Gao , Yoshi Ono , Sheng Hsu
IPC分类号: H01L21/20
CPC分类号: C23C14/16 , C03C17/34 , C23C14/10 , C23C28/322 , C23C28/323 , C23C28/345 , C23C28/3455 , C23C28/42 , H01L21/02164 , H01L21/02266 , H01L21/0237 , H01L21/02532 , H01L21/02573 , H01L21/0259 , H01L21/02631 , H01L21/02667 , H01L21/31608 , H01L33/26
摘要: Provided are an electroluminescence (EL) device and corresponding method for forming a rare earth element-doped silicon (Si)/Si dioxide (SiO2) lattice structure. The method comprises: providing a substrate; DC sputtering a layer of amorphous Si overlying the substrate; DC sputtering a rare earth element; in response, doping the Si layer with the rare earth element; DC sputtering a layer of SiO2 overlying the rare earth-doped Si; forming a lattice structure; annealing; and, in response to the annealing, forming nanocrystals in the rare-earth doped Si having a grain size in the range of 1 to 5 nanometers (nm). In one aspect, the rare earth element and Si are co-DC sputtered. Typically, the steps of DC sputtering Si, DC sputtering the rare earth element, and DC sputtering the SiO2 are repeated 5 to 60 cycles, so that the lattice structure includes the plurality (5-60) of alternating SiO2 and rare earth element-doped Si layers.
摘要翻译: 提供了一种用于形成稀土元素掺杂硅(Si)/二氧化硅(SiO 2)晶格结构的电致发光(EL)器件和相应的方法。 该方法包括:提供衬底; DC溅射覆盖衬底的非晶硅层; 直流溅射稀土元素; 作为响应,用稀土元素掺杂Si层; DC溅射一层SiO 2,覆盖稀土掺杂的Si; 形成晶格结构; 退火; 并且响应于退火,在具有1至5纳米(nm)范围内的晶粒尺寸的稀土掺杂Si中形成纳米晶体。 一方面,稀土元素和Si共溅射。 通常,DC溅射Si,DC溅射稀土元素和DC溅射SiO 2的步骤重复5至60个循环,使得晶格结构包括多个(5-60)交替的SiO 2和稀土元素掺杂 Si层。
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公开(公告)号:US20060046204A1
公开(公告)日:2006-03-02
申请号:US10931596
申请日:2004-08-31
申请人: Yoshi Ono , Wei-Wei Zhuang , Wei Gao , Bruce Ulrich
发明人: Yoshi Ono , Wei-Wei Zhuang , Wei Gao , Bruce Ulrich
IPC分类号: G02B3/00
CPC分类号: G02B3/0012
摘要: A method of forming a microlens structure using a patternable lens material is provided. An organic-inorganic hybrid polymer comprising titanium dioxide is exposed to light using a defocused mask image and then developed to produce a lens-shaped region.
摘要翻译: 提供了使用可图案的透镜材料形成微透镜结构的方法。 使用散焦的掩模图像将包含二氧化钛的有机 - 无机杂化聚合物暴露于光,然后显影以产生透镜形区域。
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