公开(公告)号：US20050023675A1

公开(公告)日：2005-02-03

申请号：US10870440

申请日：2004-06-18

申请人： Mitsuo Umemoto ,  Kazumasa Tanida

发明人： Mitsuo Umemoto ,  Kazumasa Tanida

IPC分类号： H01L25/18 ,  H01L21/52 ,  H01L21/60 ,  H01L23/48 ,  H01L25/065 ,  H01L25/07 ,  H01L23/34

CPC分类号： H01L25/0657 ,  H01L23/481 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2924/01004 ,  H01L2924/01078

摘要： The invention realizes excellent electrical and mechanical connection between electrodes in a packaging structure where a plurality of semiconductor chips having electrodes are connected with each other through the low-melting metallic members. Bump electrodes are formed on a front surface of a first semiconductor chip. Penetrating holes are formed in a second semiconductor chip, and a penetrating electrode having a gap in a center is formed in each of the penetrating holes. Low-melting metallic members are interposed between connecting surfaces of the bump electrodes and the penetrating electrodes, and a part of each of the low-melting metallic members flows in each of the gaps of the penetrating electrodes when dissolved. This prevents short-circuiting between the bump electrodes which is caused by oversupplying the low-melting metallic members between the adjacent bump electrodes.

摘要翻译： 本发明实现了具有电极的多个半导体芯片通过低熔点金属部件彼此连接的封装结构中的电极之间的优异的电气和机械连接。 凸起电极形成在第一半导体芯片的前表面上。 穿透孔形成在第二半导体芯片中，并且在每个穿透孔中形成有在中心具有间隙的穿透电极。 低熔点金属构件插入在凸块电极和穿透电极的连接面之间，并且每个低熔点金属构件的一部分在溶解时在贯通电极的每个间隙中流动。 这防止了在相邻的凸起电极之间的低熔点金属构件供应过大引起的突起电极之间的短路。

公开(公告)号：US09004337B2

公开(公告)日：2015-04-14

申请号：US13479968

申请日：2012-05-24

申请人： Satoshi Hongo ,  Kenji Takahashi ,  Kazumasa Tanida

发明人： Satoshi Hongo ,  Kenji Takahashi ,  Kazumasa Tanida

IPC分类号： B31B1/68 ,  H01L21/20 ,  H01L21/67 ,  H01L21/762

CPC分类号： H01L21/2007 ,  H01L21/67092 ,  H01L21/76251 ,  Y10T29/413

摘要： According to one embodiment, a system for manufacturing a semiconductor device includes a spontaneous joining unit and a deformative joining unit. The spontaneous joining unit overlaps a first substrate and a second substrate and spontaneously joins mutual center portions of respective joint faces of the first substrate and the second substrate. The deformative joining unit deforms at least one peripheral portion of the respective joint faces of the first substrate and second substrate joined by the spontaneous joining unit toward the other peripheral portion and joins the mutual peripheral portions of the respective joint faces.

摘要翻译： 根据一个实施例，一种用于制造半导体器件的系统包括自发接合单元和变形接合单元。 自发接合单元与第一基板和第二基板重叠，并且自发地接合第一基板和第二基板的各个接合面的相互中心部分。 变形接合单元使由第一基板和第二基板的各个接合面的至少一个周边部分朝向另一个周边部分变形，并且连接各个接合面的相互的周边部分。

公开(公告)号：US08980671B2

公开(公告)日：2015-03-17

申请号：US13368930

申请日：2012-02-08

申请人： Satoshi Hongo ,  Kazumasa Tanida ,  Akihiro Hori ,  Kenji Takahashi ,  Hideo Numata

发明人： Satoshi Hongo ,  Kazumasa Tanida ,  Akihiro Hori ,  Kenji Takahashi ,  Hideo Numata

IPC分类号： H01L21/00 ,  H01L21/30 ,  H01L21/46 ,  H01L27/146 ,  H01L21/84 ,  H01L27/12

CPC分类号： H01L27/1464 ,  H01L21/84 ,  H01L27/1203 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14634 ,  H01L27/1469

摘要： A manufacturing method of a semiconductor device according to embodiments includes forming a photodiode layer, which is an active region including a photodiode, on a main surface of a first substrate, forming a wiring layer, which includes a wire and a dielectric layer covering the wire, on the photodiode layer, and forming a dielectric film on the wiring layer. The manufacturing method of the semiconductor device according to the embodiments further includes bonding a second substrate to the dielectric film of the first substrate so that a crystal orientation of the photodiode layer matches a crystal orientation of the second substrate.

摘要翻译： 根据实施例的半导体器件的制造方法包括在第一衬底的主表面上形成作为包括光电二极管的有源区的光电二极管层，形成布线层，其包括线和覆盖线的介电层 在光电二极管层上，并在布线层上形成电介质膜。 根据实施例的半导体器件的制造方法还包括将第二衬底接合到第一衬底的电介质膜，使得光电二极管层的晶体取向与第二衬底的晶体取向相匹配。

公开(公告)号：US08822307B2

公开(公告)日：2014-09-02

申请号：US13422966

申请日：2012-03-16

申请人： Naoko Yamaguchi ,  Kazumasa Tanida ,  Hideo Numata ,  Satoshi Hongo ,  Kenji Takahashi

发明人： Naoko Yamaguchi ,  Kazumasa Tanida ,  Hideo Numata ,  Satoshi Hongo ,  Kenji Takahashi

IPC分类号： H01L21/762 ,  B32B37/10 ,  B32B38/18 ,  H01L21/67

CPC分类号： H01L21/76251 ,  H01L21/67092 ,  Y10T156/1744

摘要： According to one embodiment, a semiconductor manufacturing apparatus is provided. The semiconductor manufacturing apparatus includes a stage, a substrate supporter, first and second pushers, and a controller. The stage is configured to support outer periphery portions of the first semiconductor substrate from below. The substrate supporter is configured to hold the back of the second semiconductor substrate. The first and second pushers are configured to bring the first and second semiconductor substrates in contact. The controller is configured to form the bonding initiation point between the first and second semiconductor substrates.

摘要翻译： 根据一个实施例，提供一种半导体制造装置。 半导体制造装置包括台，基板支撑件，第一和第二推动器以及控制器。 该台被配置为从下方支撑第一半导体衬底的外围部分。 衬底支撑件构造成保持第二半导体衬底的背面。 第一和第二推动器构造成使第一和第二半导体衬底接触。 控制器被配置为在第一和第二半导体衬底之间形成接合起始点。

公开(公告)号：US08748316B2

公开(公告)日：2014-06-10

申请号：US13169548

申请日：2011-06-27

申请人： Takashi Shirono ,  Mie Matsuo ,  Hideo Numata ,  Kazumasa Tanida ,  Tsuyoshi Matsumura

发明人： Takashi Shirono ,  Mie Matsuo ,  Hideo Numata ,  Kazumasa Tanida ,  Tsuyoshi Matsumura

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L27/14683 ,  H01L27/14625 ,  H01L27/14632 ,  H01L27/1464

摘要： According to an embodiment, a method of manufacturing a semiconductor device includes polishing a peripheral portion of the semiconductor substrate, and forming a protective film to be an insulating film, on a surface of the semiconductor substrate including a surface exposed by the polishing.

摘要翻译： 根据实施例，制造半导体器件的方法包括在半导体衬底的包括通过抛光暴露的表面的表面上抛光半导体衬底的周边部分并形成作为绝缘膜的保护膜。

公开(公告)号：US08426977B2

公开(公告)日：2013-04-23

申请号：US12539037

申请日：2009-08-11

申请人： Kazumasa Tanida ,  Hideko Mukaida ,  Susumu Harada ,  Chiaki Takubo

发明人： Kazumasa Tanida ,  Hideko Mukaida ,  Susumu Harada ,  Chiaki Takubo

IPC分类号： H01L23/48

CPC分类号： H01L27/14618 ,  H01L23/481 ,  H01L24/13 ,  H01L27/14683 ,  H01L2224/05001 ,  H01L2224/05009 ,  H01L2224/05147 ,  H01L2224/05548 ,  H01L2224/0557 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/00 ,  H01L2224/05599

摘要： A semiconductor apparatus includes, a semiconductor substrate having first and second main surfaces and a through hole connecting the first and second main surfaces; a first insulation layer arranged on the first main surface, and having an opening corresponding to the through hole; a first conductive layer arranged on the first insulation layer, and covering the through hole; a second insulation layer arranged on an inner wall of the through hole and the second surface; a second conductive layer arranged in the through hole and on the second insulation layer, the second conductive layer contacting the first conductive layer; and a filling member arranged on the second conductive layer in the through hole, and having a gap between the second conductive layer on the first main surface side.

摘要翻译： 半导体装置包括具有第一和第二主表面的半导体衬底和连接第一和第二主表面的通孔; 布置在所述第一主表面上并具有与所述通孔对应的开口的第一绝缘层; 布置在所述第一绝缘层上并覆盖所述通孔的第一导电层; 布置在所述通孔的内壁和所述第二表面上的第二绝缘层; 布置在所述通孔中和所述第二绝缘层上的第二导电层，所述第二导电层与所述第一导电层接触; 以及填充构件，其布置在所述通孔中的所述第二导电层上，并且在所述第一主表面侧上的所述第二导电层之间具有间隙。

公开(公告)号：US20130062737A1

公开(公告)日：2013-03-14

申请号：US13428424

申请日：2012-03-23

申请人： Satoshi HONGO ,  Kazumasa Tanida ,  Kenji Takahashi

发明人： Satoshi HONGO ,  Kazumasa Tanida ,  Kenji Takahashi

IPC分类号： H01L29/06 ,  H01L21/78

CPC分类号： H01L27/14636 ,  H01L27/1464 ,  H01L27/14687

摘要： According to one embodiment, a semiconductor device comprises a device substrate, and a supporting substrate. The supporting substrate is joined onto the device substrate. The device substrate has a first groove in an outer circumferential portion on a joint surface side to the supporting substrate.

摘要翻译： 根据一个实施例，半导体器件包括器件衬底和支撑衬底。 支撑衬底连接到器件衬底上。 装置基板在与支撑基板的接合面侧的外周部具有第一槽。

公开(公告)号：US20120329241A1

公开(公告)日：2012-12-27

申请号：US13422966

申请日：2012-03-16

申请人： Naoko Yamaguchi ,  Kazumasa Tanida ,  Hideo Numata ,  Satoshi Hongo ,  Kenji Takahashi

发明人： Naoko Yamaguchi ,  Kazumasa Tanida ,  Hideo Numata ,  Satoshi Hongo ,  Kenji Takahashi

IPC分类号： B32B37/10 ,  B32B38/18 ,  H01L21/762

CPC分类号： H01L21/76251 ,  H01L21/67092 ,  Y10T156/1744

摘要： According to one embodiment, a semiconductor manufacturing apparatus is provided. The semiconductor manufacturing apparatus includes a stage, a substrate supporter, first and second pushers, and a controller. The stage is configured to support outer periphery portions of the first semiconductor substrate from below. The substrate supporter is configured to hold the back of the second semiconductor substrate. The first and second pushers are configured to bring the first and second semiconductor substrates in contact. The controller is configured to form the bonding initiation point between the first and second semiconductor substrates.

摘要翻译： 根据一个实施例，提供一种半导体制造装置。 半导体制造装置包括台，基板支撑件，第一和第二推动器以及控制器。 该台被配置为从下方支撑第一半导体衬底的外围部分。 衬底支撑件构造成保持第二半导体衬底的背面。 第一和第二推动器构造成使第一和第二半导体衬底接触。 控制器被配置为在第一和第二半导体衬底之间形成接合起始点。

公开(公告)号：US08309430B2

公开(公告)日：2012-11-13

申请号：US13035182

申请日：2011-02-25

申请人： Kazumasa Tanida ,  Naoko Yamaguchi ,  Satoshi Hongo ,  Chiaki Takubo ,  Hideo Numata

发明人： Kazumasa Tanida ,  Naoko Yamaguchi ,  Satoshi Hongo ,  Chiaki Takubo ,  Hideo Numata

IPC分类号： H01L21/30 ,  B32B37/00 ,  B32B41/00

CPC分类号： B23P19/00 ,  Y10T29/5313 ,  Y10T156/10 ,  Y10T156/1744

摘要： According to one embodiment, a first substrate and a second substrate are pressed from an opposite surface of a joint surface of the second substrate such that a joint surface of the first substrate and the joint surface of the second substrate are in contact with each other. The second substrate is restrained by a member to provide a gap between the joint surfaces. It is determined, based on a temporal change of a joint interface calculated based on an image imaged from the opposite surface side of the joint surface, whether joining is normally performed.

摘要翻译： 根据一个实施例，第一基板和第二基板从第二基板的接合表面的相对表面被按压，使得第一基板的接合表面和第二基板的接合表面彼此接触。 第二基板被构件约束以在接合表面之间提供间隙。 基于基于从接合面的相对面侧成像的图像计算的接合界面的时间变化，确定是否正常进行接合。

公开(公告)号：US07808064B2

公开(公告)日：2010-10-05

申请号：US12508293

申请日：2009-07-23

申请人： Atsuko Kawasaki ,  Mie Matsuo ,  Ikuko Inoue ,  Masayuki Ayabe ,  Masahiro Sekiguchi ,  Kazumasa Tanida

发明人： Atsuko Kawasaki ,  Mie Matsuo ,  Ikuko Inoue ,  Masayuki Ayabe ,  Masahiro Sekiguchi ,  Kazumasa Tanida

IPC分类号： H01L31/02

CPC分类号： H01L27/14618 ,  H01L21/76898 ,  H01L23/481 ,  H01L27/14636 ,  H01L2224/02372 ,  H01L2224/0392 ,  H01L2224/0401 ,  H01L2224/05548 ,  H01L2224/13022 ,  H01L2224/13024 ,  H04N5/2257

摘要： An imaging element is formed on the first main surface of a semiconductor substrate. An external terminal is formed on the second main surface of the semiconductor substrate. A through-hole electrode is formed in a through hole formed in the semiconductor substrate. A first electrode pad is formed on the through-hole electrode in the first main surface. An interlayer insulating film is formed on the first electrode pad and on the first main surface. A second electrode pad is formed on the interlayer insulating film. A passivation film is formed on the second electrode pad and the interlayer insulating film, and has an opening which exposes a portion of the second electrode pad. A contact plug is formed between the first and second electrode pads in a region which does not overlap the opening when viewed in a direction perpendicular to the surface of the semiconductor substrate.

摘要翻译： 成像元件形成在半导体衬底的第一主表面上。 外部端子形成在半导体衬底的第二主表面上。 在形成在半导体衬底中的通孔中形成通孔电极。 第一电极焊盘形成在第一主表面中的通孔电极上。 在第一电极焊盘和第一主表面上形成层间绝缘膜。 在层间绝缘膜上形成第二电极焊盘。 在第二电极焊盘和层间绝缘膜上形成钝化膜，并且具有露出第二电极焊盘的一部分的开口。 当在垂直于半导体衬底的表面的方向观察时，在不与开口重叠的区域中，在第一和第二电极焊盘之间形成接触插塞。