公开(公告)号：US07235428B2

公开(公告)日：2007-06-26

申请号：US10704608

申请日：2003-11-12

申请人： Kazumasa Tanida ,  Yoshihiko Nemoto ,  Mitsuo Umemoto

发明人： Kazumasa Tanida ,  Yoshihiko Nemoto ,  Mitsuo Umemoto

IPC分类号： H01L21/44

CPC分类号： H01L24/13 ,  H01L24/11 ,  H01L2224/05001 ,  H01L2224/05022 ,  H01L2224/05023 ,  H01L2224/05027 ,  H01L2224/05184 ,  H01L2224/05568 ,  H01L2224/10126 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/11901 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2924/00013 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01022 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01052 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2224/131 ,  H01L2224/13099 ,  H01L2224/29099 ,  H01L2224/05611 ,  H01L2224/05124 ,  H01L2224/05144 ,  H01L2224/05147 ,  H01L2224/05166

摘要： A semiconductor device production method including: the step of forming a stopper mask layer of a first metal on a semiconductor substrate, the stopper mask layer having an opening at a predetermined position thereof; the metal supplying step of supplying a second metal into the opening of the stopper mask layer to form a projection electrode of the second metal; and removing the stopper mask layer after the metal supplying step.

摘要翻译： 一种半导体器件制造方法，包括：在半导体衬底上形成第一金属的阻挡掩模层的步骤，所述阻挡掩模层在其预定位置具有开口; 所述金属供给步骤将第二金属供给到所述阻挡掩模层的开口中，以形成所述第二金属的突起电极; 以及在金属供给步骤之后移除止动掩模层。

公开(公告)号：US20060131741A1

公开(公告)日：2006-06-22

申请号：US11353192

申请日：2006-02-14

申请人： Mitsuo Umemoto ,  Kazumasa Tanida

发明人： Mitsuo Umemoto ,  Kazumasa Tanida

IPC分类号： H01L23/34

CPC分类号： H01L25/0657 ,  H01L23/481 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2924/01004 ,  H01L2924/01078

摘要： The invention realizes excellent electrical and mechanical connection between electrodes in a packaging structure where a plurality of semiconductor chips having electrodes are connected with each other through the low-melting metallic members. Bump electrodes are formed on a front surface of a first semiconductor chip. Penetrating holes are formed in a second semiconductor chip, and a penetrating electrode having a gap in a center is formed in each of the penetrating holes. Low-melting metallic members are interposed between connecting surfaces of the bump electrodes and the penetrating electrodes, and a part of each of the low-melting metallic members flows in each of the gaps of the penetrating electrodes when dissolved. This prevents short-circuiting between the bump electrodes which is caused by oversupplying the low-melting metallic members between the adjacent bump electrodes.

摘要翻译： 本发明实现了具有电极的多个半导体芯片通过低熔点金属部件彼此连接的封装结构中的电极之间的优异的电气和机械连接。 凸起电极形成在第一半导体芯片的前表面上。 穿透孔形成在第二半导体芯片中，并且在每个穿透孔中形成有在中心具有间隙的穿透电极。 低熔点金属构件插入在凸块电极和穿透电极的连接面之间，并且每个低熔点金属构件的一部分在溶解时在贯通电极的每个间隙中流动。 这防止了在相邻的凸起电极之间的低熔点金属构件供应过大引起的突起电极之间的短路。

公开(公告)号：US20050186771A1

公开(公告)日：2005-08-25

申请号：US10954649

申请日：2004-10-01

申请人： Kazumasa Tanida ,  Yoshihiko Nemoto ,  Mitsuo Umemoto

发明人： Kazumasa Tanida ,  Yoshihiko Nemoto ,  Mitsuo Umemoto

IPC分类号： H01L21/60 ,  H01L21/44 ,  H01L23/48 ,  H01L23/485 ,  H01L29/41

CPC分类号： H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05017 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/1147 ,  H01L2224/11902 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2224/05552

摘要： A manufacturing method for a semiconductor device, including the steps of: forming a passivation film that covers a surface of a semiconductor substrate on which electrodes have been formed, in which an opening is formed so as to expose a predetermined electrode from among the electrodes; forming a diffusion prevention plug of a first metal in the vicinity of the opening in the passivation film; supplying a second metal material to the surface of the semiconductor substrate on which the diffusion prevention plug has been formed, so as to form a seed layer of the second metal; forming a resist film that covers the seed layer and in which an opening is formed so as to expose a predetermined region of the seed layer on the diffusion prevention plug; supplying a third metal material into the opening in the resist film so as to form a protrusion electrode of the third metal; removing the resist film after the step of forming a protrusion electrode; and removing the seed layer after the step of forming a protrusion electrode.

摘要翻译： 一种半导体器件的制造方法，包括以下步骤：形成覆盖形成有电极的半导体衬底的表面的钝化膜，其中形成有开口以从电极中露出预定电极; 在钝化膜中的开口附近形成第一金属的防扩散插塞; 将第二金属材料供给到已经形成有扩散防止塞的半导体基板的表面上，以形成第二金属的籽晶层; 形成覆盖种子层并形成有开口的抗蚀剂膜，以暴露防扩散插塞上的籽晶层的预定区域; 将第三金属材料供应到所述抗蚀剂膜的开口中，以形成所述第三金属的突出电极; 在形成突起电极的步骤之后去除抗蚀剂膜; 以及在形成突起电极的步骤之后去除种子层。

公开(公告)号：US07306972B2

公开(公告)日：2007-12-11

申请号：US11353192

申请日：2006-02-14

申请人： Mitsuo Umemoto ,  Kazumasa Tanida

发明人： Mitsuo Umemoto ,  Kazumasa Tanida

IPC分类号： H01L21/00

CPC分类号： H01L25/0657 ,  H01L23/481 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2924/01004 ,  H01L2924/01078

摘要： The invention realizes excellent electrical and mechanical connection between electrodes in a packaging structure where a plurality of semiconductor chips having electrodes are connected with each other through the low-melting metallic members. Bump electrodes are formed on a front surface of a first semiconductor chip. Penetrating holes are formed in a second semiconductor chip, and a penetrating electrode having a gap in a center is formed in each of the penetrating holes. Low-melting metallic members are interposed between connecting surfaces of the bump electrodes and the penetrating electrodes, and a part of each of the low-melting metallic members flows in each of the gaps of the penetrating electrodes when dissolved. This prevents short-circuiting between the bump electrodes which is caused by oversupplying the low-melting metallic members between the adjacent bump electrodes.

摘要翻译： 本发明实现了具有电极的多个半导体芯片通过低熔点金属部件彼此连接的封装结构中的电极之间的优异的电气和机械连接。 凸起电极形成在第一半导体芯片的前表面上。 穿透孔形成在第二半导体芯片中，并且在每个穿透孔中形成有在中心具有间隙的穿透电极。 低熔点金属构件插入在凸块电极和穿透电极的连接面之间，并且每个低熔点金属构件的一部分在溶解时在贯通电极的每个间隙中流动。 这防止了在相邻的凸起电极之间的低熔点金属构件供应过大引起的突起电极之间的短路。

公开(公告)号：US20050230804A1

公开(公告)日：2005-10-20

申请号：US11085265

申请日：2005-03-22

申请人： Kazumasa Tanida ,  Mitsuo Umemoto ,  Yukiharu Akiyama

发明人： Kazumasa Tanida ,  Mitsuo Umemoto ,  Yukiharu Akiyama

IPC分类号： H01L25/18 ,  H01L21/70 ,  H01L23/48 ,  H01L25/065 ,  H01L25/07 ,  H01L27/00

CPC分类号： H01L25/0657 ,  H01L23/481 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05026 ,  H01L2224/05147 ,  H01L2224/1134 ,  H01L2224/13021 ,  H01L2224/13025 ,  H01L2224/13144 ,  H01L2224/16145 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A manufacturing method for a semiconductor device includes: the step of preparing a semiconductor chip which is provided with a functional element formed on a front surface side of a semiconductor substrate, a feedthrough electrode which is placed within a through hole that penetrates the semiconductor substrate, a front surface side connection member which protrudes from the front surface, and a rear surface side connection member which has a joining surface within a recess that is formed in a rear surface; the step of preparing a solid state device where a solid state device side connection member for connection to the front surface side connection member is formed on one surface; and the joining step of making the front surface of the semiconductor chip face the first surface of the solid state device by holding the rear surface of the semiconductor chip, and of joining the front surface side connection member to the solid state device side connection member.

摘要翻译： 半导体装置的制造方法包括：准备半导体芯片的步骤，该半导体芯片设置有形成在半导体基板的正面侧的功能元件，放置在贯通半导体基板的通孔内的馈通电极， 从前表面突出的前表面侧连接构件和在形成在后表面的凹部内具有接合表面的后表面侧连接构件; 制备固态器件的步骤，其中在一个表面上形成用于连接到前表面侧连接部件的固态器件侧连接部件; 并且通过保持半导体芯片的后表面并将前表面侧连接构件接合到固态器件侧连接构件，使半导体芯片的前表面面向固态器件的第一表面的接合步骤。

公开(公告)号：US20070155155A1

公开(公告)日：2007-07-05

申请号：US11717010

申请日：2007-03-13

申请人： Kazumasa Tanida ,  Yoshihiko Nemoto ,  Mitsuo Umemoto

发明人： Kazumasa Tanida ,  Yoshihiko Nemoto ,  Mitsuo Umemoto

IPC分类号： H01L21/4763 ,  H01L21/44

CPC分类号： H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05017 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/1147 ,  H01L2224/11902 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2224/05552

摘要： A manufacturing method for a semiconductor device, including the steps of: forming a passivation film that covers a surface of a semiconductor substrate on which electrodes have been formed, in which an opening is formed so as to expose a predetermined electrode from among the electrodes; forming a diffusion prevention plug of a first metal in the vicinity of the opening in the passivation film; supplying a second metal material to the surface of the semiconductor substrate on which the diffusion prevention plug has been formed, so as to form a seed layer of the second metal; forming a resist film that covers the seed layer and in which an opening is formed so as to expose a predetermined region of the seed layer on the diffusion prevention plug; supplying a third metal material into the opening in the resist film so as to form a protrusion electrode of the third metal; removing the resist film after the step of forming a protrusion electrode; and removing the seed layer after the step of forming a protrusion electrode.

公开(公告)号：US07061107B2

公开(公告)日：2006-06-13

申请号：US10870440

申请日：2004-06-18

申请人： Mitsuo Umemoto ,  Kazumasa Tanida

发明人： Mitsuo Umemoto ,  Kazumasa Tanida

IPC分类号： H01L23/34

CPC分类号： H01L25/0657 ,  H01L23/481 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06582 ,  H01L2924/01004 ,  H01L2924/01078

摘要： The invention realizes excellent electrical and mechanical connection between electrodes in a packaging structure where a plurality of semiconductor chips having electrodes are connected with each other through the low-melting metallic members. Bump electrodes are formed on a front surface of a first semiconductor chip. Penetrating holes are formed in a second semiconductor chip, and a penetrating electrode having a gap in a center is formed in each of the penetrating holes. Low-melting metallic members are interposed between connecting surfaces of the bump electrodes and the penetrating electrodes, and a part of each of the low-melting metallic members flows in each of the gaps of the penetrating electrodes when dissolved. This prevents short-circuiting between the bump electrodes which is caused by oversupplying the low-melting metallic members between the adjacent bump electrodes.

公开(公告)号：US08552545B2

公开(公告)日：2013-10-08

申请号：US11085265

申请日：2005-03-22

申请人： Kazumasa Tanida ,  Mitsuo Umemoto ,  Yukiharu Akiyama

发明人： Kazumasa Tanida ,  Mitsuo Umemoto ,  Yukiharu Akiyama

IPC分类号： H01L23/02 ,  H01L23/48 ,  H01L23/52

CPC分类号： H01L25/0657 ,  H01L23/481 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/0401 ,  H01L2224/05008 ,  H01L2224/05009 ,  H01L2224/05026 ,  H01L2224/05147 ,  H01L2224/1134 ,  H01L2224/13021 ,  H01L2224/13025 ,  H01L2224/13144 ,  H01L2224/16145 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73207 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06582 ,  H01L2924/00014 ,  H01L2924/01029 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/04941 ,  H01L2924/12041 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： A manufacturing method for a semiconductor device includes: the step of preparing a semiconductor chip which is provided with a functional element formed on a front surface side of a semiconductor substrate, a feedthrough electrode which is placed within a through hole that penetrates the semiconductor substrate, a front surface side connection member which protrudes from the front surface, and a rear surface side connection member which has a joining surface within a recess that is formed in a rear surface; the step of preparing a solid-state device where a solid-state device side connection member for connection to the front surface side connection member is formed on one surface; and the joining step of making the front surface of the semiconductor chip face the first surface of the solid-state device by holding the rear surface of the semiconductor chip, and of joining the front surface side connection member to the solid-state device side connection member.

摘要翻译： 半导体装置的制造方法包括：准备半导体芯片的步骤，该半导体芯片设置有形成在半导体基板的正面侧的功能元件，放置在贯通半导体基板的通孔内的馈通电极， 从前表面突出的前表面侧连接构件和在形成在后表面的凹部内具有接合表面的后表面侧连接构件; 制备固体装置的步骤，其中在一个表面上形成用于连接到前表面侧连接构件的固态装置侧连接构件; 并且通过保持半导体芯片的后表面并使前表面侧连接构件连接到固态器件侧连接而使半导体芯片的前表面面向固态器件的第一表面的接合步骤 会员。

公开(公告)号：US07638421B2

公开(公告)日：2009-12-29

申请号：US11717010

申请日：2007-03-13

申请人： Kazumasa Tanida ,  Yoshihiko Nemoto ,  Mitsuo Umemoto

发明人： Kazumasa Tanida ,  Yoshihiko Nemoto ,  Mitsuo Umemoto

IPC分类号： H01L21/44

CPC分类号： H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05017 ,  H01L2224/05022 ,  H01L2224/05027 ,  H01L2224/05572 ,  H01L2224/05624 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/1147 ,  H01L2224/11902 ,  H01L2224/13006 ,  H01L2224/13007 ,  H01L2224/13099 ,  H01L2224/13144 ,  H01L2924/0001 ,  H01L2924/00013 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01007 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/3025 ,  H01L2924/00014 ,  H01L2224/05099 ,  H01L2224/13599 ,  H01L2224/05599 ,  H01L2224/29099 ,  H01L2224/29599 ,  H01L2224/05552

摘要： A manufacturing method for a semiconductor device, including the steps of: forming a passivation film that covers a surface of a semiconductor substrate on which electrodes have been formed, in which an opening is formed so as to expose a predetermined electrode from among the electrodes; forming a diffusion prevention plug of a first metal in the vicinity of the opening in the passivation film; supplying a second metal material to the surface of the semiconductor substrate on which the diffusion prevention plug has been formed, so as to form a seed layer of the second metal; forming a resist film that covers the seed layer and in which an opening is formed so as to expose a predetermined region of the seed layer on the diffusion prevention plug; supplying a third metal material into the opening in the resist film so as to form a protrusion electrode of the third metal; removing the resist film after the step of forming a protrusion electrode; and removing the seed layer after the step of forming a protrusion electrode.

摘要翻译： 一种半导体器件的制造方法，包括以下步骤：形成覆盖形成有电极的半导体衬底的表面的钝化膜，其中形成有开口以从电极中露出预定电极; 在钝化膜中的开口附近形成第一金属的防扩散插塞; 将第二金属材料供给到已经形成有扩散防止塞的半导体基板的表面上，以形成第二金属的籽晶层; 形成覆盖种子层并形成有开口的抗蚀剂膜，以暴露防扩散插塞上的籽晶层的预定区域; 将第三金属材料供应到所述抗蚀剂膜的开口中，以形成所述第三金属的突出电极; 在形成突起电极的步骤之后去除抗蚀剂膜; 以及在形成突起电极的步骤之后去除种子层。

公开(公告)号：US07416963B2

公开(公告)日：2008-08-26

申请号：US11182055

申请日：2005-07-15

申请人： Mitsuo Umemoto ,  Yoshio Okayama ,  Kazumasa Tanida ,  Hiroshi Terao ,  Yoshihiko Nemoto

发明人： Mitsuo Umemoto ,  Yoshio Okayama ,  Kazumasa Tanida ,  Hiroshi Terao ,  Yoshihiko Nemoto

IPC分类号： H01L21/00 ,  H01L21/44 ,  H01L29/40 ,  H01L23/52 ,  H01L23/48

CPC分类号： H01L21/76898 ,  H01L2224/0231 ,  H01L2224/02372 ,  H01L2224/05548

摘要： This invention offers a manufacturing method to reduce a manufacturing cost of a semiconductor device having a through-hole electrode by simplifying a manufacturing process and to enhance yield of the semiconductor device. A first insulation film is formed on a top surface of a semiconductor substrate. A part of the first insulation film is etched to form an opening in which a part of the semiconductor substrate is exposed. Then a pad electrode is formed in the opening and on the first insulation film. A second insulation film is formed on a back surface of the semiconductor substrate. Then a via hole having an aperture larger than the opening is formed. And a third insulation film is formed in the via hole and on the second insulation film. The third insulation film on a bottom of the via hole is etched to expose the pad electrode. After that, a through-hole electrode and a wiring layer are formed in the via hole. Finally, the semiconductor substrate is cut and separated into a plurality of semiconductor dice.

摘要翻译： 本发明提供了通过简化制造工艺并提高半导体器件的产量来降低具有通孔电极的半导体器件的制造成本的制造方法。 第一绝缘膜形成在半导体衬底的顶表面上。 蚀刻第一绝缘膜的一部分以形成半导体衬底的一部分露出的开口。 然后在开口和第一绝缘膜上形成焊盘电极。 第二绝缘膜形成在半导体衬底的背面上。 然后形成具有比开口大的孔的通孔。 并且在通孔和第二绝缘膜上形成第三绝缘膜。 对通孔的底部的第三绝缘膜进行蚀刻以露出焊盘电极。 之后，在通孔中形成通孔电极和布线层。 最后，将半导体衬底切割并分离成多个半导体管芯。