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公开(公告)号：US09734907B2
公开(公告)日：2017-08-15
申请号：US15437141
申请日：2017-02-20
Applicant: Micron Technology, Inc.
Inventor： DerChang Kau , Gianpaolo Spadini
CPC classification number: G11C13/0069 , G11C13/0004 , G11C13/0023 , G11C13/0026 , G11C13/0028 , G11C13/004 , G11C13/0097 , G11C16/08 , G11C16/24 , H01L23/528 , H01L27/2427 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/144 , H01L2924/0002 , H01L2924/00
Abstract: Some embodiments include apparatuses and methods having a memory cell, first and second conductive lines configured to access the memory cell, and a switch configured to apply a signal to one of the first and second conductive lines. In at least one of such embodiments. the switch can include a phase change material. Other embodiments including additional apparatuses and methods are described.
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公开(公告)号：US20170133433A1
公开(公告)日：2017-05-11
申请号：US15414144
申请日：2017-01-24
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Jong Won Lee , Gianpaolo Spadini , Derchang Kau
Abstract: Subject matter disclosed herein relates to a memory device, and more particularly to a self-aligned cross-point phase change memory-switch array and methods of fabricating same.
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公开(公告)号：US09645102B2
公开(公告)日：2017-05-09
申请号：US14596406
申请日：2015-01-14
Applicant: Micron Technology, Inc.
Inventor： Fabio Pellizzer , Innocenzo Tortorelli , Christina Papagianni , Gianpaolo Spadini , Jong Won Lee
CPC classification number: G01N27/04 , H01L22/34 , H01L43/10 , H01L45/04 , H01L45/06 , H01L45/14 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148
Abstract: Material test structures having cantilever portions and methods of forming the same are described herein. As an example, a method of forming a material test structure includes forming a number of electrode portions in a first dielectric material, forming a second dielectric material on the first dielectric material, wherein the second dielectric material includes a first cantilever portion and a second cantilever portion, and forming a test material on the number of electrode portions, the first dielectric material, and the second dielectric material.
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24.发明授权公开(公告)号：US09576659B2
公开(公告)日：2017-02-21
申请号：US15180909
申请日：2016-06-13
Applicant: Micron Technology, Inc.
Inventor： DerChang Kau , Gianpaolo Spadini
CPC classification number: G11C13/0069 , G11C13/0004 , G11C13/0023 , G11C13/0026 , G11C13/0028 , G11C13/004 , G11C13/0097 , G11C16/08 , G11C16/24 , H01L23/528 , H01L27/2427 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/141 , H01L45/144 , H01L2924/0002 , H01L2924/00
Abstract: Some embodiments include apparatuses and methods having a memory cell, first and second conductive lines configured to access the memory cell, and a switch configured to apply a signal to one of the first and second conductive lines. In at least one of such embodiments, the switch can include a phase change material. Other embodiments including additional apparatuses and methods are described.
Abstract translation: 一些实施例包括具有存储器单元，被配置为访问存储单元的第一和第二导线以及被配置为向第一和第二导线中的一个施加信号的开关的装置和方法。 在这样的实施例中的至少一个中，开关可以包括相变材料。 描述包括附加装置和方法的其他实施例。
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公开(公告)号：US09543003B2
公开(公告)日：2017-01-10
申请号：US14808385
申请日：2015-07-24
Applicant: Micron Technology, Inc.
Inventor： Jong Won Lee , Gianpaolo Spadini
CPC classification number: G11C13/0023 , G11C5/025 , G11C8/12 , G11C11/1653 , G11C11/1659 , G11C13/0002 , G11C13/0004 , G11C13/003 , G11C13/0069 , G11C2213/71
Abstract: Memory arrays and methods of forming the same are provided. An example memory array can include at least one plane having a plurality of memory cells arranged in a matrix and a plurality of plane selection devices. Groups of the plurality of memory cells are communicatively coupled to a respective one of a plurality of plane selection devices. A decode logic having elements is formed in a substrate material and communicatively coupled to the plurality of plane selection devices. The plurality of memory cells and the plurality of plane selection devices are not formed in the substrate material.
Abstract translation: 提供了存储器阵列及其形成方法。 示例性存储器阵列可以包括具有以矩阵形式布置的多个存储单元和多个平面选择装置的至少一个平面。 多个存储器单元的组通信地耦合到多个平面选择装置中的相应一个。 具有元件的解码逻辑形成在衬底材料中并且通信地耦合到多个平面选择装置。 多个存储单元和多个平面选择装置不形成在基板材料中。
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Patent Agency Ranking
公开(公告)号：US20160260776A1
公开(公告)日：2016-09-08
申请号：US15058810
申请日：2016-03-02
Applicant: Micron Technology, Inc.
Inventor： Jong-Won Lee , Gianpaolo Spadini , Stephen W. Russell , Derchang Kau
CPC classification number: H01L27/2463 , G11C13/0004 , G11C13/0023 , G11C13/004 , G11C13/0069 , G11C13/0097 , H01L27/24 , H01L27/2427 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/1253 , H01L45/141 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/1675 , H01L45/1683
Abstract: Methods of forming memory cells comprising phase change and/or chalcogenide materials are disclosed. In one aspect, the method includes providing a lower line stack extending in a first direction, the lower line stack comprising a sacrificial line over a lower conductive line. The method further includes forming a chalcogenide line extending in the first direction by selectively removing the sacrificial material of the sacrificial line and replacing the sacrificial line with a chalcogenide material.
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公开(公告)号：US20150160146A1
公开(公告)日：2015-06-11
申请号：US14596406
申请日：2015-01-14
Applicant: Micron Technology, Inc.
Inventor： Fabio Pellizzer , Innocenzo Tortorelli , Christina Papagianni , Gianpaolo Spadini , Jong Won Lee
IPC: G01N27/04
CPC classification number: G01N27/04 , H01L22/34 , H01L43/10 , H01L45/04 , H01L45/06 , H01L45/14 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/146 , H01L45/147 , H01L45/148
Abstract: Material test structures having cantilever portions and methods of forming the same are described herein. As an example, a method of forming a material test structure includes forming a number of electrode portions in a first dielectric material, forming a second dielectric material on the first dielectric material, wherein the second dielectric material includes a first cantilever portion and a second cantilever portion, and forming a test material on the number of electrode portions, the first dielectric material, and the second dielectric material.
Abstract translation: 本文描述了具有悬臂部分的材料测试结构及其形成方法。 作为示例，形成材料测试结构的方法包括在第一介电材料中形成多个电极部分，在第一电介质材料上形成第二电介质材料，其中第二电介质材料包括第一悬臂部分和第二悬臂 并且在电极部分，第一介电材料和第二介电材料的数量上形成测试材料。
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公开(公告)号：US20150001458A1
公开(公告)日：2015-01-01
申请号：US14320275
申请日：2014-06-30
Applicant: Micron Technology, Inc.
Inventor： Jong Won Lee , Gianpaolo Spadini , Derchang Kau
CPC classification number: H01L27/2463 , H01L27/2427 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/144 , H01L45/1608 , H01L45/1675
Abstract: Subject matter disclosed herein relates to a memory device, and more particularly to a self-aligned cross-point phase change memory-switch array and methods of fabricating same.
Abstract translation: 本文公开的主题涉及存储器件，更具体地涉及自对准交叉点相变存储器开关阵列及其制造方法。
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公开(公告)号：US20200279889A1
公开(公告)日：2020-09-03
申请号：US16877166
申请日：2020-05-18
Applicant: Micron Technology, Inc.
Inventor： Jong Lee , Gianpaolo Spadini , Derchang Kau
Abstract: Subject matter disclosed herein relates to a memory device, and more particularly to a self-aligned cross-point phase change memory-switch array and methods of fabricating same.
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公开(公告)号：US10475853B2
公开(公告)日：2019-11-12
申请号：US16045514
申请日：2018-07-25
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Jong-Won Lee , Gianpaolo Spadini , Stephen W. Russell , Derchang Kau
Abstract: Methods of forming memory cells comprising phase change and/or chalcogenide materials are disclosed. In one aspect, the method includes providing a lower line stack extending in a first direction, the lower line stack comprising a sacrificial line over a lower conductive line. The method further includes forming a chalcogenide line extending in the first direction by selectively removing the sacrificial material of the sacrificial line and replacing the sacrificial line with a chalcogenide material.
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