公开(公告)号：US10031879B2

公开(公告)日：2018-07-24

申请号：US15489434

申请日：2017-04-17

Applicant: Micron Technology, Inc.

Inventor： Sean Eilert ,  Mark Leinwander

IPC: G06F12/08 ,  G06F13/42 ,  H01L45/00 ,  G06F3/06

Abstract: In various embodiments, a hierarchical memory device having multiple interfaces with different memory formats includes a Phase Change Memory (PCM). An input port and an output port connect the hierarchical memory device in a daisy-chain hierarchy and/or a hierarchical tree structure with other memories. Standard non-hierarchical memory devices can also attach to the output port of the hierarchical memory device. Other embodiments are discussed.

公开(公告)号：US09612750B2

公开(公告)日：2017-04-04

申请号：US14675172

申请日：2015-03-31

Applicant: Micron Technology, Inc.

Inventor： Sean Eilert ,  Mark Leinwander ,  Jared Hulbert

IPC: G06F12/00 ,  G06F3/06 ,  G06F12/02 ,  G06F13/12 ,  G06F13/16 ,  G06F13/38 ,  G06F17/30 ,  G06F9/50 ,  G11C7/00 ,  G11C16/00 ,  G06F12/0831 ,  G11C7/10

CPC classification number: G06F3/061 ,  G06F3/06 ,  G06F3/0653 ,  G06F3/0665 ,  G06F3/0688 ,  G06F3/0689 ,  G06F9/50 ,  G06F12/00 ,  G06F12/02 ,  G06F12/0831 ,  G06F13/12 ,  G06F13/16 ,  G06F13/1694 ,  G06F13/38 ,  G06F17/30 ,  G06F2003/0692 ,  G06F2212/622 ,  G11C7/00 ,  G11C7/1072 ,  G11C16/00

Abstract: An autonomous sub-system receives a database downloaded from a host controller. A controller monitors bus traffic and/or allocated resources in the subsystem and re-allocates resources based on the monitored results to dynamically improve system performance.

公开(公告)号：US20150370750A1

公开(公告)日：2015-12-24

申请号：US14840733

申请日：2015-08-31

Applicant: Micron Technology, Inc.

Inventor： Sean Eilert ,  Mark Leinwander

IPC: G06F13/42 ,  G06F3/06

CPC classification number: G06F13/4247 ,  G06F3/06 ,  G06F3/0611 ,  G06F3/0629 ,  G06F3/0688 ,  G06F12/0246 ,  G06F12/08 ,  G11C13/0004 ,  H01L45/06 ,  Y02D10/13

Abstract: A hierarchical memory device having multiple interfaces with different memory formats includes a Phase Change Memory (PCM). An input port and an output port connect the hierarchical memory device in a daisy-chain hierarchy or a hierarchical tree structure with other memories. Standard non-hierarchical memory devices can also attach to the output port of the hierarchical memory device.

Abstract translation: 具有不同存储器格式的多个接口的分层存储器件包括相变存储器（PCM）。 输入端口和输出端口将分层存储器件以菊花链层级或分层树结构与其他存储器连接。 标准的非分层存储设备也可以附加到分层存储器设备的输出端口。

公开(公告)号：US09183070B2

公开(公告)日：2015-11-10

申请号：US13949560

申请日：2013-07-24

Applicant: Micron Technology, Inc.

Inventor： Todd Marquart ,  Sampath Ratnam ,  Sean Eilert

IPC: G06F11/07

CPC classification number: G06F11/0727 ,  G06F11/1048 ,  G06F2212/7204 ,  G06F2212/7206 ,  G06F2212/7211

Abstract: In an embodiment, a block of memory cells is rested in response to the block of memory cells being deemed to fail. For some embodiments, a rested block may be selected for use in response to passing an operation. In other embodiments, a rested block may be rested again or may be permanently retired from further use in response to failing the operation.

Abstract translation: 在一个实施例中，响应于被认为失败的存储器单元的块，休息存储器单元块。 对于一些实施例，可以选择休息块以用于响应于通过操作。 在其他实施例中，可以再次休息一个休息块，或者可以响应于该操作失败而从进一步使用中永久退休。

公开(公告)号：US09165688B2

公开(公告)日：2015-10-20

申请号：US14454040

申请日：2014-08-07

Applicant: Micron Technology Inc.

Inventor： Chris Bueb ,  Sean Eilert

IPC: H03M13/00 ,  G11C29/00 ,  G06F11/10 ,  G11C29/42 ,  G11C29/52 ,  G11C29/04

CPC classification number: G11C29/765 ,  G06F11/10 ,  G06F11/1044 ,  G06F11/1048 ,  G06F11/1072 ,  G11C29/42 ,  G11C29/52 ,  G11C29/808 ,  G11C29/82 ,  G11C2029/0409 ,  G11C2029/0411

Abstract: Subject matter disclosed herein relates to determining that a portion of a memory is at least partially non-functional, replacing the portion of at least partially non-functional memory; and adjusting an error detection and/or correction process responsive to determining that the portion of the memory is at least partially non-functional and/or replacing the portion of at least partially non-functional memory.

Abstract translation: 本文公开的主题涉及确定存储器的一部分至少部分地不起作用，代替至少部分非功能性存储器的部分; 以及响应于确定所述存储器的所述部分至少部分地不起作用和/或替换所述至少部分非功能性存储器的所述部分来调整错误检测和/或校正过程。

公开(公告)号：US20150153963A1

公开(公告)日：2015-06-04

申请号：US14094273

申请日：2013-12-02

Applicant: Micron Technology, Inc.

Inventor： Kenneth M Curewitz ,  Sean Eilert ,  Ameen D. Akel ,  Hongyu Wang

IPC: G06F3/06 ,  H04L29/06

CPC classification number: H04L69/22 ,  G06F3/061 ,  G06F3/0659 ,  G06F3/0679 ,  G06F3/0688 ,  G06F9/3885 ,  G06F2003/0697

Abstract: A method, an apparatus, and a system have been disclosed. An embodiment of the method includes an autonomous memory device receiving a set of instructions, the memory device executing the set of instructions, combining the set of instructions with any data recovered from the memory device in response to the set of instructions into a packet, and transmitting the packet from the memory device.

Abstract translation: 已经公开了一种方法，装置和系统。 该方法的一个实施例包括接收一组指令的自主存储器设备，该存储器设备执行该组指令，将该组指令与从该存储器设备中恢复的任何数据相结合，以响应该组指令进入一个数据包，以及 从存储装置发送分组。

公开(公告)号：US09047191B2

公开(公告)日：2015-06-02

申请号：US14151442

申请日：2014-01-09

Applicant: Micron Technology, Inc.

Inventor： Christopher Bueb ,  Sean Eilert

IPC: H03M13/00 ,  G06F11/07 ,  G06F11/10 ,  H03M13/13 ,  H03M13/37

CPC classification number: G06F11/1076 ,  G06F11/0793 ,  G06F11/1012 ,  H03M13/13 ,  H03M13/159 ,  H03M13/3746 ,  H03M13/6325

Abstract: A method includes calculating a first syndrome of a codeword read from a memory location under a first set of conditions and calculating a second syndrome of the codeword read from the memory location under a second set of conditions. The method also includes analyzing the first and second syndromes and applying one of the first and second syndromes to the codeword to find the codeword having a minimum number of errors.

Abstract translation: 一种方法包括：计算在第一组条件下从存储器位置读取的码字的第一校正子，并计算在第二组条件下从存储器位置读取的码字的第二校正子。 该方法还包括分析第一和第二校正子并将第一和第二校正子中的一个应用于码字以找到具有最小错误数的码字。

公开(公告)号：US20150052114A1

公开(公告)日：2015-02-19

申请号：US13965739

申请日：2013-08-13

Applicant: Micron Technology, Inc.

Inventor： Kenneth M. Curewitz ,  Sean Eilert ,  Hongyu Wang ,  Ameen D. Akel

IPC: G06F17/30

CPC classification number: G06F17/30519

Abstract: Methods and systems operate to receive a plurality of search requests for searching a database in a memory system. The search requests can be stored in a FIFO queue and searches can be subsequently generated for each search request. The resulting plurality of searches can be executed substantially in parallel on the database. A respective indication is transmitted to a requesting host when either each respective search is complete or each respective search has generated search results.

Abstract translation: 方法和系统操作以接收用于搜索存储器系统中的数据库的多个搜索请求。 搜索请求可以存储在FIFO队列中，随后可以为每个搜索请求生成搜索。 所得到的多个搜索可以在数据库上基本并行地执行。 当每个相应的搜索完成或每个相应的搜索已经生成搜索结果时，相应的指示被发送到请求主机。

公开(公告)号：US20140129872A1

公开(公告)日：2014-05-08

申请号：US14151442

申请日：2014-01-09

Applicant: Micron Technology, Inc.

Inventor： Christopher Bueb ,  Sean Eilert

IPC: G06F11/07

CPC classification number: G06F11/1076 ,  G06F11/0793 ,  G06F11/1012 ,  H03M13/13 ,  H03M13/159 ,  H03M13/3746 ,  H03M13/6325

Abstract: A method includes calculating a first syndrome of a codeword read from a memory location under a first set of conditions and calculating a second syndrome of the codeword read from the memory location under a second set of conditions. The method also includes analyzing the first and second syndromes and applying one of the first and second syndromes to the codeword to find the codeword having a minimum number of errors.

Abstract translation: 一种方法包括：计算在第一组条件下从存储器位置读取的码字的第一校正子，并计算在第二组条件下从存储器位置读取的码字的第二校正子。 该方法还包括分析第一和第二校正子并将第一和第二校正子中的一个应用于码字以找到具有最小错误数的码字。