-
公开(公告)号：US20240215232A1
公开(公告)日：2024-06-27
申请号：US18428836
申请日：2024-01-31
Applicant: Micron Technology, Inc.
Inventor： Shuangqiang Luo , John D. Hopkins , Lifang Xu , Nancy M. Lomeli , Indra V. Chary , Kar Wui Thong , Shicong Wang
CPC classification number: H10B41/27 , G11C5/025 , G11C5/06 , H01L21/768 , H10B41/50 , H10B43/27 , H10B43/50
Abstract: A microelectronic device comprises a stack structure comprising a vertically alternating sequence of conductive material and insulative material arranged in tiers. The stack structure has blocks separated from one another by first dielectric slot structures. Each of the blocks comprises two crest regions, a stadium structure interposed between the two crest regions in a first horizontal direction and comprising opposing staircase structures each having steps comprising edges of the tiers of the stack structure, and two bridge regions neighboring opposing sides of the stadium structure in a second horizontal direction orthogonal to the first horizontal direction and having upper surfaces substantially coplanar with upper surfaces of the two crest regions. At least one second dielectric slot structure is within horizontal boundaries of the stadium structure in the first horizontal direction and partially vertically extends through and segmenting each of the two bridge regions. Memory devices, electronic systems, and methods of forming microelectronic devices are also described.
-
22.发明公开公开(公告)号：US20240196606A1
公开(公告)日：2024-06-13
申请号：US18513430
申请日：2023-11-17
Applicant: Micron Technology, Inc.
Inventor： Lifang Xu , Harsh Narendrakumar Jain , Indra V. Chary , Richard J. Hill
CPC classification number: H10B41/35 , G11C5/025 , G11C16/0483 , H10B41/10 , H10B41/20 , H10B43/10 , H10B43/20 , H10B43/35
Abstract: A microelectronic device includes a stack structure comprising blocks, additional dielectric slot structures, and a further dielectric slot structure. The stack structure includes alternating tiers of conductive and insulative structures. A block comprises a stadium structure and crest regions. The stadium structure includes staircase structures having steps comprising edges of the tiers. The additional dielectric slot structures individually extend in the first direction across a first of the crest regions and at least partially into the stadium structure. The additional dielectric slot structures are separated from one another in a second direction orthogonal to the first direction and individually vertically extend through the tiers. The further dielectric slot structure extends in the second direction across a second of the crest regions. The further dielectric slot structure intersects at least one of the additional dielectric slot structures and vertically extend through the tiers.
-
公开(公告)号：US12010848B2
公开(公告)日：2024-06-11
申请号：US17818324
申请日：2022-08-08
Applicant: Micron Technology, Inc.
Inventor： Anilkumar Chandolu , Indra V. Chary
Abstract: Microelectronic devices include a stack structure with a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. Conductive contact structures extend through the stack structure. An insulative material is between the conductive contact structures and the tiers of the stack structure. In a lower tier portion of the stack structure, a conductive structure, of the conductive structures, has a portion extending a first width between a pair of the conductive contact structures. In a portion of the stack structure above the lower tier portion, an additional conductive structure, of the conductive structures, has an additional portion extending a second width between the pair of the conductive contact structures. The second width is greater than the first width. Related methods and electronic systems are also disclosed.
-
24.发明授权公开(公告)号：US11800706B2
公开(公告)日：2023-10-24
申请号：US17395751
申请日：2021-08-06
Applicant: Micron Technology, Inc.
Inventor： Shuangqiang Luo , Indra V. Chary , Justin B. Dorhout , Rita J. Klein
CPC classification number: H10B41/41 , G11C5/063 , H10B41/27 , H10B41/35 , H10B43/27 , H10B43/35 , H10B43/40
Abstract: Some embodiments include an integrated assembly having a conductive expanse over conductive nodes. The conductive nodes include a first composition. A bottom surface of the conductive expanse includes a second composition which is different composition than the first composition. A stack is over the conductive expanse. The stack includes alternating first and second levels. Pillar structures extend vertically through the stack. Each of the pillar structures includes a post of conductive material laterally surrounded by an insulative liner. At least one of the posts extends through the conductive expanse to directly contact one of the conductive nodes. Some embodiments include methods of forming integrated assemblies.
-
公开(公告)号：US11756826B2
公开(公告)日：2023-09-12
申请号：US17473679
申请日：2021-09-13
Applicant: Micron Technology, Inc.
Inventor： Matthew J. King , Anilkumar Chandolu , Indra V. Chary , Darwin A. Clampitt , Gordon Haller , Thomas George , Brett D. Lowe , David A. Daycock
IPC: H01L21/768 , H01L21/762 , H10B43/40 , H10B43/20 , H10B43/35 , H10B43/50
CPC classification number: H01L21/76802 , H01L21/762 , H01L21/76808 , H01L21/76816 , H01L21/76877 , H10B43/20 , H10B43/35 , H10B43/40 , H10B43/50
Abstract: A termination opening can be formed through the stack alternating dielectrics concurrently with forming contact openings through the stack. A termination structure can be formed in the termination opening. An additional opening can be formed through the termination structure and through the stack between groups of semiconductor structures that pass through the stack. In another example, an opening can be formed through the stack so that a first segment of the opening is between groups of semiconductor structures in a first region of the stack and a second segment of the opening is in a second region of the stack that does not include the groups of semiconductor structures. A material can be formed in the second segment so that the first segment terminates at the material. In some instances, the material can be implanted in the dielectrics in the second region through the second segment.
-
Patent Agency Ranking
公开(公告)号：US20230052468A1
公开(公告)日：2023-02-16
申请号：US17399283
申请日：2021-08-11
Applicant: Micron Technology, Inc.
Inventor： M. Jared Barclay , John D. Hopkins , Richard J. Hill , Indra V. Chary , Kar Wui Thong
IPC: H01L23/535 , H01L27/11556 , H01L27/11582 , H01L21/768
Abstract: A memory array comprising strings of memory cells comprises laterally-spaced memory blocks individually comprising a vertical stack comprising alternating insulative tiers and conductive tiers above a conductor tier. Strings of memory cells comprise channel-material strings that extend through the insulative tiers and the conductive tiers. The channel-material strings directly electrically couple with conductor material of the conductor tier by conducting material that is in a lowest of the conductive tiers and that is directly against multiple of the channel-material strings. The channel-material strings in the laterally-spaced memory blocks comprise part of a memory plane. A wall in the lowest conductive tier is aside the conducting material. The wall is in a region that is edge-of-plane relative to the memory plane. The edge-of-plane region comprises a TAV region. The wall is horizontally-elongated relative to an edge of the TAV region that is in the edge-of-plane region. Other memory arrays and methods are disclosed.
-
公开(公告)号：US20220406719A1
公开(公告)日：2022-12-22
申请号：US17304219
申请日：2021-06-16
Applicant: Micron Technology, Inc.
Inventor： Shuangqiang Luo , Indra V. Chary
IPC: H01L23/535 , H01L23/528 , H01L23/00 , H01L27/11556 , H01L27/11582 , H01L21/768
Abstract: A microelectronic device comprises a stack structure comprising a vertically alternating sequence of conductive structures and insulative structures arranged in tiers, a stair step structure within the stack structure and having steps comprising lateral edges of the tiers, pillar structures extending through the stack structure and the stair step structure and in contact with a source tier vertically underlying the stack structure, and conductive contact structures in contact with the steps of the staircase structure, the conductive contact structures individually comprising a first portion and a second portion vertically overlying the first portion, the second portion vertically above the pillar structures and having a greater lateral dimension than the first portion. Related microelectronic devices, memory devices, and electronic systems are also described.
-
公开(公告)号：US20220392917A1
公开(公告)日：2022-12-08
申请号：US17818324
申请日：2022-08-08
Applicant: Micron Technology, Inc.
Inventor： Anilkumar Chandolu , Indra V. Chary
IPC: H01L27/11582 , H01L27/11556 , H01L27/11519 , H01L27/1157 , H01L27/11565 , H01L27/11524
Abstract: Microelectronic devices include a stack structure with a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. Conductive contact structures extend through the stack structure. An insulative material is between the conductive contact structures and the tiers of the stack structure. In a lower tier portion of the stack structure, a conductive structure, of the conductive structures, has a portion extending a first width between a pair of the conductive contact structures. In a portion of the stack structure above the lower tier portion, an additional conductive structure, of the conductive structures, has an additional portion extending a second width between the pair of the conductive contact structures. The second width is greater than the first width. Related methods and electronic systems are also disclosed.
-
公开(公告)号：US20220384342A1
公开(公告)日：2022-12-01
申请号：US17819019
申请日：2022-08-11
Applicant: Micron Technology, Inc.
Inventor： Shuangqiang Luo , Indra V. Chary
IPC: H01L23/528 , H01L27/11582 , H01L27/11556 , H01L21/768 , H01L21/311 , H01L23/522
Abstract: A microelectronic device comprises pillar structures comprising semiconductive material, contact structures in physical contact with upper portions of the pillar structures, and conductive structures over and in physical contact with the contact structures. Each of the conductive structures comprises an upper portion having a first width, and a lower portion vertically interposed between the upper portion and the contact structures. The lower portion has a tapered profile defining additional widths varying from a second width less than the first width at an uppermost boundary of the lower portion to a third width less than the second width at a lowermost boundary of the lower portion. Memory devices, electronic systems, and methods of forming microelectronic devices are also described.
-
公开(公告)号：US20220359398A1
公开(公告)日：2022-11-10
申请号：US17314485
申请日：2021-05-07
Applicant: Micron Technology, Inc.
Inventor： Lingyu Kong , Lifang Xu , Indra V. Chary , Shuangqiang Luo , Sok Han Wong
IPC: H01L23/535 , H01L23/528 , H01L23/00 , H01L27/11556 , H01L27/11582 , H01L21/768
Abstract: A microelectronic device comprises a stack structure comprising insulative structures vertically interleaved with conductive structures, first support pillar structures vertically extending through the stack structure in a first staircase region including steps defined at edges of tiers of the insulative structures and conductive structures, and second support pillar structures vertically extending through the stack structure in a second staircase region including additional steps defined at edges of additional tiers of the insulative structures and conductive structures, the second support pillar structures having a smaller cross-sectional area than the first support pillar structures. Related memory devices, electronic systems, and methods are also described.
-
-
-
-
-
-
-
-
-
Search Results
124
records
(took 0.024 seconds)
