公开(公告)号：US10269625B1

公开(公告)日：2019-04-23

申请号：US15857197

申请日：2017-12-28

Applicant: Micron Technology, Inc.

Inventor： John B. Matovu ,  David S. Meyaard ,  Gowrisankar Damarla ,  Sri Sai Sivakumar Vegunta ,  Kunal Shrotri ,  Shashank Saraf ,  Kevin R. Gast ,  Jivaan Kishore Jhothiraman ,  Suresh Ramarajan ,  Lifang Xu ,  Rithu K. Bhonsle ,  Rutuparna Narulkar ,  Matthew J. King

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H01L27/11582 ,  H01L27/11556

Abstract: A method of forming a semiconductor structure includes forming a sacrificial material over a stack comprising alternating levels of a dielectric material and another material, forming an opening through the sacrificial material and at least some of the alternating levels of the dielectric material and the another material, forming at least one oxide material in the opening and overlying surfaces of the sacrificial material, an uppermost surface of the at least one oxide material extending more distal from a surface of a substrate than an uppermost level of the dielectric material and the another material, planarizing at least a portion of the at least one oxide material to expose a portion of the sacrificial material, and removing the sacrificial material while the uppermost surface of the at least one oxide material remains more distal from the surface of the substrate than the uppermost level of the alternating levels of the dielectric material and the another material. Related methods of forming semiconductor structures and related semiconductor devices are disclosed.

公开(公告)号：US20150155440A1

公开(公告)日：2015-06-04

申请号：US14617423

申请日：2015-02-09

Applicant: Micron Technology, Inc.

Inventor： Xiaolong Fang ,  Lifang Xu ,  Tingkai Li ,  Thomas Gehrke

IPC: H01L33/32 ,  H01L33/00 ,  H01L21/66

CPC classification number: H01L33/32 ,  H01L21/78 ,  H01L22/10 ,  H01L22/32 ,  H01L22/34 ,  H01L23/544 ,  H01L33/0066 ,  H01L33/007 ,  H01L33/0095 ,  H01L33/48 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Semiconductor growth substrates and associated systems and methods for die singulation are disclosed. A representative method for manufacturing semiconductor devices includes forming spaced-apart structures at a dicing street located between neighboring device growth regions of a substrate material. The method can further include epitaxially growing a semiconductor material by adding a first portion of semiconductor material to the device growth regions and adding a second portion of semiconductor material to the structures. The method can still further include forming semiconductor devices at the device growth regions, and separating the semiconductor devices from each other at the dicing street by removing the spaced-apart structures and the underlying substrate material at the dicing street.

Abstract translation: 公开了半导体生长衬底和用于芯片分离的相关系统和方法。 用于制造半导体器件的代表性方法包括在位于衬底材料的相邻器件生长区域之间的切割街道上形成间隔开的结构。 该方法还可以包括通过将半导体材料的第一部分添加到器件生长区域并将半导体材料的第二部分添加到该结构体来外延生长半导体材料。 该方法还可以进一步包括在器件生长区域处形成半导体器件，并且在切割街道处通过在切割街道处去除间隔开的结构和下面的衬底材料来将半导体器件彼此分离。

公开(公告)号：US20140319536A1

公开(公告)日：2014-10-30

申请号：US14262538

申请日：2014-04-25

Applicant: Micron Technology, Inc.

Inventor： Scott E. Sills ,  Lifang Xu ,  Scott D. Schellhammer ,  Thomas Gehrke ,  Zaiyuan Ren ,  Anton J. De Villiers

IPC: H01L33/24 ,  H01L33/06 ,  H01L33/32

CPC classification number: H01L33/24 ,  H01L33/06 ,  H01L33/22 ,  H01L33/32 ,  H01L33/382 ,  H01L33/405

Abstract: Solid state lighting (“SSL”) devices with cellular arrays and associated methods of manufacturing are disclosed herein. In one embodiment, a light emitting diode includes a semiconductor material having a first surface and a second surface opposite the first surface. The semiconductor material has an aperture extending into the semiconductor material from the first surface. The light emitting diode also includes an active region in direct contact with the semiconductor material, and at least a portion of the active region is in the aperture of the semiconductor material.

Abstract translation: 本文公开了具有蜂窝阵列和相关制造方法的固态照明（“SSL”）设备。 在一个实施例中，发光二极管包括具有第一表面和与第一表面相对的第二表面的半导体材料。 半导体材料具有从第一表面延伸到半导体材料中的孔。 发光二极管还包括与半导体材料直接接触的有源区，并且有源区的至少一部分位于半导体材料的孔中。

公开(公告)号：US20250107204A1

公开(公告)日：2025-03-27

申请号：US18974584

申请日：2024-12-09

Applicant: Micron Technology, Inc.

Inventor： Lifang Xu ,  Richard J. Hill ,  Indra V. Chary ,  Lars P. Heineck

IPC: H01L29/417 ,  H01L21/768 ,  H01L23/528 ,  H01L29/40

Abstract: Microelectronic devices include a tiered stack having vertically alternating insulative and conductive structures. A first series of stadiums is defined in the tiered stack within a first block of a dual-block structure. A second series of stadiums is defined in the tiered stack within a second block of the dual-block structure. The first and second series of stadiums are substantially symmetrically structured about a trench at a center of the dual-block structure. The trench extends a width of the first and second series of stadiums. The stadiums of the first and second series of stadiums have opposing staircase structures comprising steps at ends of the conductive structures of the tiered stack. Conductive source/drain contact structures are in the stack and extend substantially vertically from a source/drain region at a floor of the trench. Additional microelectronic devices are also disclosed, as are methods of fabrication and electronic systems.

公开(公告)号：US12166094B2

公开(公告)日：2024-12-10

申请号：US17373258

申请日：2021-07-12

Applicant: Micron Technology, Inc.

Inventor： Lifang Xu ,  Richard J. Hill ,  Indra V. Chary ,  Lars P. Heineck

IPC: H01L29/417 ,  H01L21/768 ,  H01L23/528 ,  H01L29/40

Abstract: Microelectronic devices include a tiered stack having vertically alternating insulative and conductive structures. A first series of stadiums is defined in the tiered stack within a first block of a dual-block structure. A second series of stadiums is defined in the tiered stack within a second block of the dual-block structure. The first and second series of stadiums are substantially symmetrically structured about a trench at a center of the dual-block structure. The trench extends a width of the first and second series of stadiums. The stadiums of the first and second series of stadiums have opposing staircase structures comprising steps at ends of the conductive structures of the tiered stack. Conductive source/drain contact structures are in the stack and extend substantially vertically from a source/drain region at a floor of the trench. Additional microelectronic devices are also disclosed, as are methods of fabrication and electronic systems.

公开(公告)号：US12040274B2

公开(公告)日：2024-07-16

申请号：US17314485

申请日：2021-05-07

Applicant: Micron Technology, Inc.

Inventor： Lingyu Kong ,  Lifang Xu ,  Indra V. Chary ,  Shuangqiang Luo ,  Sok Han Wong

IPC: H10B41/27 ,  H01L21/768 ,  H01L23/00 ,  H01L23/528 ,  H01L23/535 ,  H10B43/27

CPC classification number: H01L23/535 ,  H01L21/76805 ,  H01L21/76895 ,  H01L23/528 ,  H01L23/562 ,  H10B41/27 ,  H10B43/27

Abstract: A microelectronic device comprises a stack structure comprising insulative structures vertically interleaved with conductive structures, first support pillar structures vertically extending through the stack structure in a first staircase region including steps defined at edges of tiers of the insulative structures and conductive structures, and second support pillar structures vertically extending through the stack structure in a second staircase region including additional steps defined at edges of additional tiers of the insulative structures and conductive structures, the second support pillar structures having a smaller cross-sectional area than the first support pillar structures. Related memory devices, electronic systems, and methods are also described.

公开(公告)号：US20240186239A1

公开(公告)日：2024-06-06

申请号：US18440581

申请日：2024-02-13

Applicant: Micron Technology, Inc.

Inventor： Shuangqiang Luo ,  Lifang Xu

IPC: H01L23/522 ,  H01L21/768 ,  H10B69/00

CPC classification number: H01L23/5226 ,  H01L21/76816 ,  H10B69/00

Abstract: Microelectronic devices include a stack structure having a vertically alternating sequence of insulative structures and conductive structures arranged in tiers. At least one stadium, of stadiums within the stack structure, comprise staircase(s) having steps provided by a group of the conductive structures. Step contacts extend to the steps of the staircase(s) of the at least one of the stadiums. Each conductive structure of the group of conductive structures has more than one of the step contacts in contact therewith at at least one of the steps of the staircase(s). Additional microelectronic devices are also disclosed, as are methods of fabrication and electronic systems.

公开(公告)号：US11978705B2

公开(公告)日：2024-05-07

申请号：US17643061

申请日：2021-12-07

Applicant: Micron Technology, Inc.

Inventor： Shuangqiang Luo ,  Lifang Xu ,  Xiao Li ,  Jivaan Kishore Jhothiraman ,  Mohadeseh Asadolahi Baboli

IPC: H01L23/535 ,  H01L21/768 ,  H01L23/522 ,  H01L23/528 ,  H10B41/27 ,  H10B43/27

CPC classification number: H01L23/535 ,  H01L21/76805 ,  H01L21/76816 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76877 ,  H01L21/76895 ,  H01L23/5226 ,  H01L23/5283 ,  H10B41/27 ,  H10B43/27

Abstract: A microelectronic device having a stack structure with an alternating sequence of conductive material and insulative material arranged in tiers, and having blocks separated by dielectric slot structures. Each of the blocks has a stadium structure, a filled trench overlying the stadium structure, support structures extending through the filled trench and tiers of the stack structure, and dielectric liner structures covering sidewalls of the support structures. The stadium structure has staircase structures each having steps with edges of the tiers of the stack structure. The filled trench has a dielectric material interposed between at least two additional dielectric materials. The dielectric liner structures have first protrusions at vertical positions of the dielectric material, and second protrusions at vertical positions of the conductive material of the tiers of the stack structure. The second protrusions have greater horizontal dimensions that the first protrusions. Memory devices, electronic systems, and methods are also described.

公开(公告)号：US20240147713A1

公开(公告)日：2024-05-02

申请号：US18394273

申请日：2023-12-22

Applicant: Micron Technology, Inc.

Inventor： Lifang Xu ,  Sidhartha Gupta ,  Kar Wui Thong ,  Harsh Narendarakumar Jain

IPC: H10B41/27 ,  G11C5/06 ,  H01L29/66 ,  H01L29/78 ,  H10B43/27

CPC classification number: H10B41/27 ,  G11C5/06 ,  H01L29/66666 ,  H01L29/7827 ,  H10B43/27

Abstract: A method of forming a microelectronic device including a first stack structure comprising alternating levels of insulative structures and other insulative structures, forming strings of memory cells through the first stack structure, forming a second stack structure over the first stack structure, based at least partially on observed amount of pillar bending within the first stack structure, forming a first tailored reticle specific to the observed amount of pillar bending, utilizing the first tailored reticle to form openings extending through the second stack structure and over some of the strings of memory cells, wherein centers of the openings over the strings of memory cells are at least substantially aligned with the centers of uppermost surfaces of the strings of memory cells in a direction of the observed pillar bending, and forming upper pillars extending through the second stack structure and over some of the strings of memory cells.

公开(公告)号：US20240071919A1

公开(公告)日：2024-02-29

申请号：US17823472

申请日：2022-08-30

Applicant: Micron Technology, Inc.

Inventor： Mohad Baboli ,  Yiping Wang ,  Xiao Li ,  Lifang Xu ,  John M. Meldrim ,  Jivaan Kishore Jhothiraman ,  Shuangqiang Luo

IPC: H01L23/528 ,  H01L21/768 ,  H01L23/535

CPC classification number: H01L23/5283 ,  H01L21/76816 ,  H01L21/76822 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76895 ,  H01L23/535

Abstract: A microelectronic device includes a stack structure comprising blocks separated from one another by dielectric slot structures and each including a vertically alternating sequence of conductive structures and insulative structures arranged in tiers. At least one of the blocks comprising a stadium structure comprising opposing staircase structures each having steps comprising edges of the tiers; and a filled trench vertically overlying and within horizontal boundaries of the stadium structure of the at least one of the blocks. The filled trench includes a dielectric liner material on the opposing staircase structures of the stadium structure and on inner sidewalls of the two bridge regions and at least one dielectric structure doped with one or more of carbon and boron on the dielectric liner material, the at least one dielectric structure horizontally overlapping the steps of the stadium structure.