公开(公告)号：US4295055A

公开(公告)日：1981-10-13

申请号：US46028

申请日：1979-06-06

申请人： Iwao Takemoto ,  Norio Koike ,  Shinya Ohba ,  Haruhisa Ando ,  Masaaki Nakai ,  Syoji Hanamura ,  Ryuichi Izawa ,  Masaharu Kubo ,  Masakazu Aoki ,  Shuhei Tanaka

发明人： Iwao Takemoto ,  Norio Koike ,  Shinya Ohba ,  Haruhisa Ando ,  Masaaki Nakai ,  Syoji Hanamura ,  Ryuichi Izawa ,  Masaharu Kubo ,  Masakazu Aoki ,  Shuhei Tanaka

IPC分类号： G11C19/00 ,  G11C19/18 ,  G11C19/28 ,  H01L27/146 ,  H01L31/10 ,  H03K5/15 ,  H04N3/14

CPC分类号： H03K5/15093 ,  G11C19/184 ,  G11C19/28

摘要： A circuit for generating scanning pulses comprising a plurality of stages of basic circuits connected in series, said each basic circuit comprising first, second and third insulated gate field-effect transistors (MISTs) each of which has first and second terminals each being either of source and drain terminals and a gate terminal, said first terminal of said first MIST being used as a clock pulse-applying terminal, said gate terminal of said first MIST being used as an input terminal, said second terminal of said first MIST and said first terminal and said gate terminal of said second MIST being connected and used as a scanning pulse output terminal, said second terminal of said second MIST and said first terminal of said third MIST being connected and used as an output terminal, said second terminal of said third MIST being used as a ground terminal, said gate terminal of said third MIST being used as a feedback input terminal.

摘要翻译： 一种用于产生扫描脉冲的电路，包括串联连接的多级基本电路，所述每个基本电路包括第一，第二和第三绝缘栅极场效应晶体管（MIST），每个绝缘栅场效应晶体管的第一和第二端子均为源极 所述第一MIST的所述第一端子用作时钟脉冲施加端子，所述第一MIST的所述栅极端子用作输入端子，所述第一MIST的所述第二端子和所述第一端子的所述第一端子 并且所述第二MIST的所述栅极端子被连接并用作扫描脉冲输出端子，所述第二MIST的所述第二端子和所述第三MIST的所述第一端子被连接并用作输出端子，所述第三MIST的所述第二端子 被用作接地端子，所述第三MIST的所述栅极端子用作反馈输入端子。

公开(公告)号：US4223330A

公开(公告)日：1980-09-16

申请号：US5567

申请日：1979-01-22

申请人： Norio Koike ,  Iwao Takemoto ,  Shinya Ohba ,  Masaharu Kubo ,  Shuhei Tanaka

发明人： Norio Koike ,  Iwao Takemoto ,  Shinya Ohba ,  Masaharu Kubo ,  Shuhei Tanaka

IPC分类号： H01L27/146 ,  H04N5/335 ,  H04N5/359 ,  H04N5/374 ,  H01L27/14 ,  H01L29/78

CPC分类号： H01L27/14654

摘要： In a solid-state imaging device having, in one major surface region of a semiconductor substrate, photoelectric conversion elements which are disposed in a two-dimensional array, vertical switching metal-insulator-semiconductor field effect transistors and horizontal switching metal-insulator-semiconductor field effect transistors which select the photoelectric conversion elements, and vertical and horizontal scanning circuits which turn the switching transistors "on" and "off," a solid-state imaging device characterized in that the vertical switching metal-insulator-semiconductor field effect transistors which are not selected are placed into a deeper cutoff state, i.e., the major surface regions of the semiconductor substrate corresponding to gate electrodes of these vertical switching metal-insulator-semiconductor field effect transistors are placed at an accumulation level.

摘要翻译： 在具有在半导体衬底的一个主表面区域中设置为二维阵列的光电转换元件的立体成像器件中，垂直开关金属 - 绝缘体 - 半导体场效应晶体管和水平开关金属 - 绝缘体半导体 选择光电转换元件的场效应晶体管以及使开关晶体管“导通”和“截止”的垂直和水平扫描电路，其特征在于垂直开关金属 - 绝缘体半导体场效应晶体管 未选择的位置被置于更深的截止状态，即，对应于这些垂直开关金属 - 绝缘体 - 半导体场效应晶体管的栅极的半导体衬底的主表面区域被放置在累积水平。

公开(公告)号：US07039566B2

公开(公告)日：2006-05-02

申请号：US10396083

申请日：2003-03-24

申请人： Norio Koike

发明人： Norio Koike

IPC分类号： G06F17/50 ,  G01R31/26

CPC分类号： G06F17/5036 ,  G06F17/18

摘要： A hot carrier lifetime of a MOS transistor is estimated, depending on model formulas: 1/τ=1/τ0+1/τb; τb∝1sub−mb·Idmb−2·exp(a/|Vbs|), where τ denotes a lifetime, Isub denotes a substrate current, Id denotes a drain current, Vbs denotes a substrate voltage, τ0 denotes a lifetime at the time the substrate voltage Vbs=0, τb denotes a quantity representing deterioration of a lifetime at the time the substrate voltage |Vbs|>0, and mb and ‘a’ are model parameters. Furthermore, a parameter Age representing a cumulative stress quantity is calculated depending on model formulas: Age=Age0+Ageb; Ageb=∫1/Hb[Isubmb·Id2−m]·exp(−a/|Vbs|)dt, where t denotes time, Hb is a model parameter, Age0 denotes a parameter representing a cumulative stress quantity at the time the substrate voltage Vbs=0, and Agebs denotes a quantity representing an increase of the cumulative stress quantity at the time the substrate voltage at |Vbs|>0. Thereby, a lifetime in actual use is determined with accuracy even when a substrate voltage is applied, and circuit characteristic degradation is simulated with high accuracy.

摘要翻译： 根据模型公式估计MOS晶体管的热载流子寿命：1 / tau = 1 /τ0 + 1 /τb b; tau>>>> exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp exp （a / | V SUB）|其中，τ表示寿命，I SUB表示衬底电流，I表示漏极电流， V SUB表示衬底电压，τO表示衬底电压V BAT = 0时的寿命，τ< / SUB>表示在基板电压| V bs> 0时表示寿命的劣化的量，mb和'a'是模型参数。 此外，根据模型公式计算表示累积应力量的参数Age：年龄=年龄 +年龄B 年龄 exp（-a / | V bs |）dt，其中t表示时间，H B b是模型参数， 年龄<0 表示表示衬底电压V BAT = 0时的累积应力量的参数，而Age < 基板电压在| V bs> 0时的累积应力量的增加。 因此，即使施加基板电压，也能够精确地确定实际使用寿命，并且以高精度模拟电路特性劣化。

公开(公告)号：US20050203719A1

公开(公告)日：2005-09-15

申请号：US10957706

申请日：2004-10-05

申请人： Norio Koike

发明人： Norio Koike

IPC分类号： G06F17/50 ,  G01R31/26 ,  G06F17/10 ,  H01L21/336 ,  H01L21/66 ,  H01L29/00 ,  H01L29/78

CPC分类号： G06F17/5036 ,  G06F17/5009 ,  G06F2217/76 ,  G06F2217/80

摘要： In calculating a substrate current Isub using a substrate current model equation expressed as Isub=(Ai/Bi)·(Vds−Vdsat)·Id·exp (−Bi·lc/(Vds−Vdsat)) (where Id, Vds and Vdsat are drain current, a drain voltage and a saturation drain voltage, respectively, of a MOS transistor, lc is a characteristic length, Ai is a model parameter and Bi is a given constant), the characteristic length lc is a function lc=lc[lc0+lc1·Vgd] (where lc0 and lc1 are model parameters) of a primary expression (lc0+lc1·Vgd) regarding a gate-drain voltage Vgd (=Vgs−Vds: Vgs is a gate voltage of the MOS transistor) of the MOS transistor.

摘要翻译： 在使用表示为Isub =（Ai / Bi）的基板电流模型方程（Vds-Vdsat）.Id.exp（-Bi.lc/(Vds-Vdsat））（其中Id，Vds和Vdsat 分别是MOS晶体管的漏极电流，漏极电压和饱和漏极电压，lc是特征长度，Ai是模型参数，Bi是给定常数），特征长度lc是函数lc = lc [ 关于栅极 - 漏极电压Vgd（= Vgs-Vds：Vgs是栅极电压）的初级表达式（lc 0 + lc 1 .Vgd），其中lc 0 + lc 1 .Vgd]（其中lc 0和lc 1是模型参数） 的MOS晶体管）。

公开(公告)号：US4500915A

公开(公告)日：1985-02-19

申请号：US423446

申请日：1982-09-24

申请人： Norio Koike ,  Toshihisa Tsukada ,  Toru Baji ,  Akira Sasano

发明人： Norio Koike ,  Toshihisa Tsukada ,  Toru Baji ,  Akira Sasano

IPC分类号： H01L29/762 ,  H01L21/339 ,  H01L27/148 ,  H04N9/07

CPC分类号： H01L27/14843 ,  H01L27/14868 ,  H04N3/1575

摘要： The present invention consists in providing a CCD type color solid-state imager in which color signals respectively separated in time can be derived from picture elements for respective colors arrayed in the shape of a matrix and which permits interlacing without degrading a resolution and without causing image lag. Concretely, pairs of CCD shift registers which are electrically insulated and separated and which run in the vertical direction are arrayed in the horizontal direction, signal charges stored in adjacent picture elements are sent into the individual opposing CCD registers through transfer gates arrayed in a checkerboard pattern, and signal charges transferred in time sequence are distributed to a plurality of CCD shift registers which run in the horizontal direction, whereby a CCD type color solid-state imager having a high resolution and exhibiting no image lag is obtained.

摘要翻译： 本发明的目的在于提供一种CCD型彩色固态成像器，其中分别在时间上分离出的色信号可以从以矩阵形排列的各种颜色的图像元素中导出，并且允许隔行扫描而不降低分辨率并且不引起图像 落后。 具体地说，电绝缘和分离并沿垂直方向延伸的CCD对移位寄存器沿水平方向排列，存储在相邻像素中的信号电荷通过排列在棋盘图案中的传输门发送到各个相对的CCD寄存器 ，并且以时间顺序传送的信号电荷被分配到在水平方向上运行的多个CCD移位寄存器，由此获得具有高分辨率且不显示图像滞后的CCD型彩色固态成像器。

公开(公告)号：US4364973A

公开(公告)日：1982-12-21

申请号：US247737

申请日：1981-03-26

申请人： Norio Koike ,  Toru Baji ,  Toshihisa Tsukada ,  Hideaki Yamamoto

发明人： Norio Koike ,  Toru Baji ,  Toshihisa Tsukada ,  Hideaki Yamamoto

IPC分类号： H01L27/14 ,  H01L27/146 ,  H01L31/18 ,  H04N5/335 ,  H04N5/369 ,  H04N5/372 ,  H04N5/374 ,  B05D1/32

CPC分类号： H01L27/14665

摘要： A method for fabricating a solid-state imaging device using photoconductive film, comprising the step of depositing a photoconductive material onto a scanner IC by the use of a shield plate, the scanner IC including vertical switching MOS transistors and horizontal switching MOS transistors arrayed in the form of a matrix and vertical and horizontal scanning shift registers for scanning the vertical and horizontal switching MOS transistors respectively, the shield plate having an open part corresponding to a vertical switching MOS transistor array area.

摘要翻译： 一种使用光电导膜制造固态成像装置的方法，包括通过使用屏蔽板将光电导材料沉积到扫描仪IC上的步骤，所述扫描器IC包括垂直开关MOS晶体管和排列在 形式的矩阵和用于扫描垂直和水平切换MOS晶体管的垂直和水平扫描移位寄存器，所述屏蔽板具有对应于垂直开关MOS晶体管阵列区域的开路部分。

公开(公告)号：US4360821A

公开(公告)日：1982-11-23

申请号：US66230

申请日：1979-08-13

申请人： Toshihisa Tsukada ,  Eiichi Maruyama ,  Toru Baji ,  Saburo Ataka ,  Yoshinori Imamura ,  Akira Sasano ,  Masaharu Kubo ,  Norio Koike ,  Shusaku Nagahara

发明人： Toshihisa Tsukada ,  Eiichi Maruyama ,  Toru Baji ,  Saburo Ataka ,  Yoshinori Imamura ,  Akira Sasano ,  Masaharu Kubo ,  Norio Koike ,  Shusaku Nagahara

IPC分类号： H01L27/146 ,  H01L27/14

CPC分类号： H01L27/14665

摘要： In a solid-state imaging device having a plurality of photosensitive portions and a semiconductor substrate which includes at least scanning means for scanning the photosensitive portions, the photosensitive portions including a layer of a photosensitive material overlying the semiconductor substrate and a transparent electrically conductive film overlying the photosensitive material layer; a solid-state imaging device characterized in that the photosensitive material is an amorphous material whose indispensable constituent is silicon and which contains hydrogen. The hydrogen content of the photosensitive material is preferably 5 atomic-% to 30 atomic-%, especially 10 atomic-% to 25 atomic-%.

摘要翻译： 在具有多个感光部分的固态成像装置和至少包括用于扫描感光部分的扫描装置的半导体衬底上，感光部分包括覆盖在半导体衬底上的感光材料层和覆盖着透明导电膜的透明导电膜 感光材料层; 一种固态成像装置，其特征在于感光材料是不可缺少的成分是硅并且含有氢的无定形材料。 感光材料的氢含量优选为5原子％至30原子％，特别是10原子％至25原子％。

公开(公告)号：US4323912A

公开(公告)日：1982-04-06

申请号：US152690

申请日：1980-05-23

申请人： Norio Koike ,  Toshihisa Tsukada ,  Haruhisa Ando ,  Hideaki Yamamoto ,  Tadaaki Hirai ,  Masaharu Kubo ,  Eiichi Maruyama ,  Toru Baji ,  Yukio Takasaki ,  Shusaku Nagahara

发明人： Norio Koike ,  Toshihisa Tsukada ,  Haruhisa Ando ,  Hideaki Yamamoto ,  Tadaaki Hirai ,  Masaharu Kubo ,  Eiichi Maruyama ,  Toru Baji ,  Yukio Takasaki ,  Shusaku Nagahara

IPC分类号： H01L27/146 ,  H04N5/335 ,  H04N5/341 ,  H04N5/369 ,  H04N5/372 ,  H04N5/374 ,  H01L27/14

CPC分类号： H01L27/14665

摘要： In a solid-state imaging device having a semiconductor integrated circuit in which a plurality of switching elements for addressing positions of picture elements and scanning circuitry for turning the switching elements "on" and "off" in time sequence are disposed on an identical substrate, a photoconductive film which is disposed on the integrated circuit and which is connected with the respective switching elements, and a light transmitting electrode which is disposed on the photoconductive film, a voltage being applied to the light transmitting electrode thereby to bias a region of the photoconductive film on a light entrance side either positively or negatively with respect to a region thereof on the opposite side; a solid-state imaging device characterized in that said each switching element is an element which uses carriers of a polarity opposite to that of carriers having a greater mobility in said photoconductive film.

摘要翻译： 在具有半导体集成电路的固态成像装置中，其中用于寻址用于寻址位置的多个开关元件和用于将开关元件“开”和“关”的扫描电路按时间顺序设置在相同的基板上， 设置在集成电路上并与各个开关元件连接的光电导膜和设置在光电导膜上的透光电极，施加到光透射电极的电压，从而偏压光电导区域 相对于其相对侧的区域，光入射侧的膜是正或负的; 一种固态成像装置，其特征在于，所述每个开关元件是使用与所述光电导膜中迁移率较高的载流子极性相反的载流子的元件。

公开(公告)号：US4242694A

公开(公告)日：1980-12-30

申请号：US832676

申请日：1977-09-12

申请人： Norio Koike ,  Masaharu Kubo

发明人： Norio Koike ,  Masaharu Kubo

IPC分类号： H04N9/07 ,  H01L27/108 ,  H01L27/148 ,  H04N1/04 ,  H01L27/14 ,  H01L29/78 ,  H01L31/00

CPC分类号： H01L27/14843 ,  H01L27/108 ,  H01L27/14812

摘要： A solid-state color imaging device contains semiconductive photoelectric elements for light of the respective primary colors, and means for sequentially transmitting charges as electric signals, the charges having been generated and stored according to the quantities of the corresponding primary color light beams received by the photoelectric elements. Transparent conductive films are provided through transparent insulating films on the light receiving sides of the photoelectric elements for at least two primary color light beams, and the charge storage capacitances of the respective photoelectric elements or the ratios of the quantities of light actually reaching photoelectric transduction portions to the entering quantities of the corresponding primary color light beam in the respective photoelectric elements are set at predetermined values.

摘要翻译： 固体彩色成像装置包含用于各种原色光的半导体光电元件，以及用于依次将电荷作为电信号传输的装置，电荷根据由所述原色接收的相应原色光束的量而被生成和存储 光电元件。 透明导电膜通过用于至少两个原色光束的光电元件的光接收侧上的透明绝缘膜提供，并且各个光电元件的电荷存储电容或实际到达光电转换部分的光量比 将相应的光电元件中的相应原色光束的输入量设定为预定值。

公开(公告)号：US4143389A

公开(公告)日：1979-03-06

申请号：US823646

申请日：1977-08-11

申请人： Norio Koike ,  Masaharu Kubo

发明人： Norio Koike ,  Masaharu Kubo

IPC分类号： H01L27/146 ,  H01L31/113 ,  H04N5/335 ,  H04N5/374 ,  H01L27/14

CPC分类号： H01L31/1136 ,  H01L27/14643

摘要： In a solid-state image pickup device having photoelectric elements each of which includes one or more switching MOS field-effect transistors and which are arrayed in one dimension or two dimensions on one semiconductor substrate, and scanning circuits which address the photoelectric devices time-sequentially, a transparent or semitransparent electrode is disposed over a light detecting region provided for the switching field-effect transistor, with an insulating oxide film intervening therebetween, whereby a capacitance is formed between the electrode and the substrate, charges generated under the electrode by photoexcitation are stored in a charge-storage region including the capacitance for a certain time, and the stored charges are taken out by the scanning circuits to a signal output line connecting the drains of the transistors in common.