Electroformed metallization
    21.
    发明申请
    Electroformed metallization 失效
    电铸金属化

    公开(公告)号:US20050282399A1

    公开(公告)日:2005-12-22

    申请号:US10871938

    申请日:2004-06-17

    摘要: A method is provided for electroforming metal integrated circuit structures. The method comprises: forming an opening such as a via or line through an interlevel insulator, exposing a substrate surface; forming a base layer overlying the interlevel insulator and substrate surface; forming a strike layer overlying the base layer; forming a top layer overlying the strike layer; selectively etching to remove the top layer overlying the substrate surface, exposing a strike layer surface; and, electroforming a metal structure overlying the strike layer surface. The electroformed metal structure is deposited using an electroplating or electroless deposition process. Typically, the metal is Cu, Au, Ir, Ru, Rh, Pd, Os, Pt, or Ag. The base, strike, and top layers can be deposited using physical vapor deposition (PVD), evaporation, reactive sputtering, or metal organic chemical vapor deposition (MOCVD).

    摘要翻译: 提供了一种电铸金属集成电路结构的方法。 该方法包括:通过层间绝缘体形成诸如通孔或线的开口,暴露衬底表面; 形成覆盖层间绝缘体和衬底表面的基层; 形成覆盖基层的冲击层; 形成覆盖所述冲击层的顶层; 选择性蚀刻以去除覆盖在衬底表面上的顶层,暴露出一层击打层表面; 并且电铸在覆盖着撞击层表面的金属结构。 使用电镀或无电沉积工艺沉积电铸金属结构。 通常,金属是Cu,Au,Ir,Ru,Rh,Pd,Os,Pt或Ag。 可以使用物理气相沉积(PVD),蒸发,反应溅射或金属有机化学气相沉积(MOCVD)来沉积基底,打击和顶层。

    Piezo-TFT cantilever MEMS
    22.
    发明申请
    Piezo-TFT cantilever MEMS 有权
    压电薄膜悬臂MEMS

    公开(公告)号:US20050130360A1

    公开(公告)日:2005-06-16

    申请号:US11031320

    申请日:2005-01-05

    IPC分类号: H01L21/336

    摘要: A piezo-TFT cantilever microelectromechanical system (MEMS) and associated fabrication processes are provided. The method comprises: providing a substrate, such as glass for example; forming thin-films overlying the substrate; forming a thin-film cantilever beam; and simultaneously forming a TFT within the cantilever beam. The TFT is can be formed least partially overlying a cantilever beam top surface, at least partially overlying a cantilever beam bottom surface, or embedded within the cantilever beam. In one example, forming thin-films on the substrate includes: selectively forming a first layer with a first stress level; selectively forming a first active Si region overlying the first layer; and selectively forming a second layer overlying the first layer with a second stress level. The thin-film cantilever beam is formed from the first and second layers, while the TFT source/drain (S/D) and channel regions are formed from the first active Si region.

    摘要翻译: 提供了压电TFT悬臂微机电系统(MEMS)及相关制造工艺。 该方法包括:提供例如玻璃等基板; 形成覆盖衬底的薄膜; 形成薄膜悬臂梁; 并且同时在悬臂梁内形成TFT。 TFT可以形成为最少部分地覆盖在悬臂梁顶表面上,至少部分地覆盖悬臂梁底表面或嵌入在悬臂梁内。 在一个示例中,在衬底上形成薄膜包括:选择性地形成具有第一应力水平的第一层; 选择性地形成覆盖在第一层上的第一有源Si区; 以及以第二应力水平选择性地形成覆盖所述第一层的第二层。 薄膜悬臂梁由第一和第二层形成,而TFT源极/漏极(S / D)和沟道区域由第一有源Si区形成。

    Integrated MEMS packaging
    23.
    发明申请
    Integrated MEMS packaging 有权
    集成MEMS封装

    公开(公告)号:US20060148137A1

    公开(公告)日:2006-07-06

    申请号:US11178148

    申请日:2005-07-08

    IPC分类号: H01L21/84

    CPC分类号: B81C1/0023 H01L27/1214

    摘要: An integrated MEMS package and associated packaging method are provided. The method includes: forming an electrical circuit, electrically connected to the first substrate; integrating a MEMS device on a first substrate region, electrically connected to the first substrate; providing a second substrate overlying the first substrate; and, forming a wall along the first region boundaries, between the first and second substrate. In one aspect, the electrical circuit is formed using thin-film processes; and, wherein integrating the MEMS device on the first substrate region includes forming the MEMS using thin-film processes, simultaneous with the formation of the electrical device. Alternately, the MEMS device is formed in a separate process, attached to the first substrate, and electrical interconnections are formed to the first substrate using thin-film processes.

    摘要翻译: 提供集成MEMS封装和相关封装方法。 该方法包括:形成电连接到第一基板的电路; 将MEMS器件集成在电连接到第一衬底的第一衬底区域上; 提供覆盖所述第一基板的第二基板; 以及沿所述第一区域边界在所述第一和第二基板之间形成壁。 在一个方面,使用薄膜工艺形成电路; 并且其中将MEMS器件集成在第一衬底区域上包括使用薄膜工艺形成MEMS,同时形成电子器件。 或者,MEMS器件以独立的工艺形成,附接到第一衬底,并且使用薄膜工艺将电互连形成到第一衬底。

    Microelectromechanical thin-film device
    24.
    发明申请
    Microelectromechanical thin-film device 有权
    微机电薄膜器件

    公开(公告)号:US20050153475A1

    公开(公告)日:2005-07-14

    申请号:US11058501

    申请日:2005-02-14

    申请人: John Hartzell

    发明人: John Hartzell

    CPC分类号: B81C1/00 C30B13/00 C30B35/00

    摘要: Processing and systems to create, and resulting products related to, very small-dimension singular, or monolithically arrayed, semiconductor mechanical devices. Processing is laser performed on selected semiconductor material whose internal crystalline structure becomes appropriately changed to establish the desired mechanical properties for a created device.

    摘要翻译: 加工和制造系统,以及与之相关的产品,非常小尺寸的奇异或单片阵列的半导体机械装置。 对选择的半导体材料进行激光处理,该半导体材料的内部晶体结构被适当地改变以建立所需的机械性能。

    Electroformed metal structure
    25.
    发明申请
    Electroformed metal structure 有权
    电铸金属结构

    公开(公告)号:US20080054469A1

    公开(公告)日:2008-03-06

    申请号:US11978909

    申请日:2007-10-30

    IPC分类号: H01L23/52

    摘要: A method is provided for electroforming metal integrated circuit structures. The method comprises: forming an opening such as a via or line through an interlevel insulator, exposing a substrate surface; forming a base layer overlying the interlevel insulator and substrate surface; forming a strike layer overlying the base layer; forming a top layer overlying the strike layer; selectively etching to remove the top layer overlying the substrate surface, exposing a strike layer surface; and, electroforming a metal structure overlying the strike layer surface. The electroformed metal structure is deposited using an electroplating or electroless deposition process. Typically, the metal is Cu, Au, Ir, Ru, Rh, Pd, Os, Pt, or Ag. The base, strike, and top layers can be deposited using physical vapor deposition (PVD), evaporation, reactive sputtering, or metal organic chemical vapor deposition (MOCVD).

    摘要翻译: 提供了一种电铸金属集成电路结构的方法。 该方法包括:通过层间绝缘体形成诸如通孔或线的开口,暴露衬底表面; 形成覆盖层间绝缘体和衬底表面的基层; 形成覆盖基层的冲击层; 形成覆盖所述冲击层的顶层; 选择性蚀刻以去除覆盖在衬底表面上的顶层,暴露出一层击打层表面; 并且电铸在覆盖着撞击层表面的金属结构。 使用电镀或无电沉积工艺沉积电铸金属结构。 通常,金属是Cu,Au,Ir,Ru,Rh,Pd,Os,Pt或Ag。 可以使用物理气相沉积(PVD),蒸发,反应溅射或金属有机化学气相沉积(MOCVD)来沉积基底,打击和顶层。

    Thin-film microelectromechanical device fabrication process
    26.
    发明申请
    Thin-film microelectromechanical device fabrication process 有权
    薄膜微机电装置制造工艺

    公开(公告)号:US20070212805A1

    公开(公告)日:2007-09-13

    申请号:US11800019

    申请日:2007-05-03

    申请人: John Hartzell

    发明人: John Hartzell

    IPC分类号: H01L21/00

    CPC分类号: B81C1/00 C30B13/00 C30B35/00

    摘要: Processing and systems to create, and resulting products related to, very small-dimension singular, or monolithically arrayed, semiconductor mechanical devices. Processing is laser performed on selected semiconductor material whose internal crystalline structure becomes appropriately changed to establish the desired mechanical properties for a created device.

    摘要翻译: 加工和制造系统,以及与之相关的产品,非常小尺寸的奇异或单片阵列的半导体机械装置。 对选择的半导体材料进行激光处理,该半导体材料的内部晶体结构被适当地改变以建立所需的机械性能。

    Method for integrated MEMS packaging
    27.
    发明申请
    Method for integrated MEMS packaging 有权
    集成MEMS封装的方法

    公开(公告)号:US20070099327A1

    公开(公告)日:2007-05-03

    申请号:US11640592

    申请日:2006-12-18

    IPC分类号: H01L21/00

    CPC分类号: B81C1/0023 H01L27/1214

    摘要: An integrated MEMS package and associated packaging method are provided. The method includes: forming an electrical circuit, electrically connected to the first substrate; integrating a MEMS device on a first substrate region, electrically connected to the first substrate; providing a second substrate overlying the first substrate; and, forming a wall along the first region boundaries, between the first and second substrate. In one aspect, the electrical circuit is formed using thin-film processes; and, wherein integrating the MEMS device on the first substrate region includes forming the MEMS using thin-film processes, simultaneous with the formation of the electrical device. Alternately, the MEMS device is formed in a separate process, attached to the first substrate, and electrical interconnections are formed to the first substrate using thin-film processes.

    摘要翻译: 提供集成MEMS封装和相关封装方法。 该方法包括:形成电连接到第一基板的电路; 将MEMS器件集成在电连接到第一衬底的第一衬底区域上; 提供覆盖所述第一基板的第二基板; 以及沿所述第一区域边界在所述第一和第二基板之间形成壁。 在一个方面,使用薄膜工艺形成电路; 并且其中将MEMS器件集成在第一衬底区域上包括使用薄膜工艺形成MEMS,同时形成电子器件。 或者,MEMS器件以独立的工艺形成,附接到第一衬底,并且使用薄膜工艺将电互连形成到第一衬底。

    Digital light valve
    28.
    发明申请
    Digital light valve 有权
    数码光阀

    公开(公告)号:US20060252237A1

    公开(公告)日:2006-11-09

    申请号:US11483431

    申请日:2006-07-10

    申请人: John Hartzell

    发明人: John Hartzell

    IPC分类号: H01L21/20

    摘要: A system and method are provided for crystallizing a semiconductor film using a digital light valve. The method comprises: enabling pixel elements from an array of selectable pixel elements; in response to enabling the pixel elements, gating a light; sequentially exposing adjacent areas of a semiconductor film, such as Si, to the gated light; annealing the light-exposed areas of semiconductor film; and, in response to the annealing, laterally growing crystal grains in the semiconductor film. For example, the method may sequentially expose adjacent areas of semiconductor film to gated light in a first direction; and, simultaneously exposing adjacent areas of semiconductor film to gated light in a second direction, different than the first direction. For example, the second direction may be perpendicular to the first direction. As a result, crystal grains can be laterally grown simultaneously in the first and second directions.

    摘要翻译: 提供一种用于使用数字光阀使半导体膜结晶的系统和方法。 该方法包括:使可选像素元件阵列中的像素元件能够实现; 响应于使能像素元件,选择光; 将诸如Si的半导体膜的相邻区域依次曝光到门控光; 退火半导体膜的曝光区域; 并且响应于退火,在半导体膜中横向生长晶粒。 例如,该方法可以顺序地将半导体膜的相邻区域沿第一方向暴露于门控光; 并且同时将相邻的半导体膜区域暴露于与第一方向不同的第二方向的门控光。 例如,第二方向可以垂直于第一方向。 结果,晶粒可以在第一和第二方向上同时横向生长。

    Digital light valve semiconductor processing
    29.
    发明申请
    Digital light valve semiconductor processing 失效
    数字光阀半导体加工

    公开(公告)号:US20060073622A1

    公开(公告)日:2006-04-06

    申请号:US10955159

    申请日:2004-09-29

    申请人: John Hartzell

    发明人: John Hartzell

    IPC分类号: H01L21/00

    摘要: A system and method are provided for crystallizing a semiconductor film using a digital light valve. The method comprises: enabling pixel elements from an array of selectable pixel elements; in response to enabling the pixel elements, gating a light; sequentially exposing adjacent areas of a semiconductor film, such as Si, to the gated light; annealing the light-exposed areas of semiconductor film; and, in response to the annealing, laterally growing crystal grains in the semiconductor film. For example, the method may sequentially expose adjacent areas of semiconductor film to gated light in a first direction; and, simultaneously exposing adjacent areas of semiconductor film to gated light in a second direction, different than the first direction. For example, the second direction may be perpendicular to the first direction. As a result, crystal grains can be laterally grown simultaneously in the first and second directions.

    摘要翻译: 提供一种用于使用数字光阀使半导体膜结晶的系统和方法。 该方法包括:使可选像素元件阵列中的像素元件能够实现; 响应于使能像素元件,选择光; 将诸如Si的半导体膜的相邻区域依次曝光到门控光; 退火半导体膜的曝光区域; 并且响应于退火,在半导体膜中横向生长晶粒。 例如,该方法可以顺序地将半导体膜的相邻区域沿第一方向暴露于门控光; 并且同时将相邻的半导体膜区域暴露于与第一方向不同的第二方向的门控光。 例如,第二方向可以垂直于第一方向。 结果,晶粒可以在第一和第二方向上同时横向生长。