公开(公告)号：US5731858A

公开(公告)日：1998-03-24

申请号：US763103

申请日：1996-12-10

Applicant: Yuzo Hisatake ,  Ryoichi Watanabe ,  Makiko Sato ,  Hitoshi Hatoh ,  Akio Murayama

Inventor： Yuzo Hisatake ,  Ryoichi Watanabe ,  Makiko Sato ,  Hitoshi Hatoh ,  Akio Murayama

IPC: G02F1/1335 ,  G02F1/139 ,  C09K19/60

CPC classification number: G02F1/133504 ,  G02F1/133512 ,  G02F1/133553 ,  G02F1/133526 ,  G02F1/13725 ,  G02F2203/02

Abstract: A reflecting type liquid crystal display device having, a first substrate provided on one main surface thereof with a first electrode comprising a plurality of pixel electrodes arrayed in a matrix form and a wiring interposed between these pixel electrodes, the first substrate being disposed on an observation side, a second substrate provided on one main surface thereof with a second electrode and disposed to face the first substrate in such a manner that the surface bearing the second electrode faces to the surface bearing the first electrode, a liquid crystal composition layer interposed between the first substrate and the second substrate, and a white reflecting layer formed on a region of the surface of the first substrate where the first electrode is not formed.

公开(公告)号：US08262917B2

公开(公告)日：2012-09-11

申请号：US12076431

申请日：2008-03-18

Applicant: Ryoichi Watanabe

Inventor： Ryoichi Watanabe

IPC: B05D5/12 ,  H01B13/00

CPC classification number: H05K3/0014 ,  H05K3/045 ,  H05K3/107 ,  H05K3/465 ,  H05K3/4682 ,  H05K2201/0376 ,  H05K2203/0156 ,  H05K2203/0264 ,  H05K2203/0537 ,  H05K2203/0769 ,  H05K2203/308

Abstract: A fabrication method for a multilayer printed circuit board includes: forming a first circuit-forming pattern and a first insulation layer, into which the first circuit-forming pattern is inserted, on a first carrier; forming inner circuit patterns and inner insulation layers over the first insulation layer, and forming inner vias connecting the inner circuit patterns positioned on different insulation layers; forming a second circuit-forming pattern on a second carrier and inserting the second circuit-forming pattern into a second insulation layer on an outermost side; removing the first carrier and the second carrier; forming circuit-forming grooves by removing the first circuit-forming pattern and the second circuit-forming pattern, and forming via-forming indentations connected with the circuit-forming grooves; and forming outer circuit patterns and outer vias by filling the circuit-forming grooves and the via-forming indentations with a conductive material. This can provide a thin printed circuit board having high reliability and fine-lined circuits.

Abstract translation: 一种多层印刷电路板的制造方法包括：在第一载体上形成第一电路形成图案和第一电路形成图案插入其中的第一绝缘层; 在所述第一绝缘层上形成内部电路图案和内部绝缘层，以及形成连接位于不同绝缘层上的内部电路图案的内部通孔; 在第二载体上形成第二电路形成图案，并将第二电路形成图案插入最外侧的第二绝缘层; 移除所述第一载体和所述第二载体; 通过去除第一电路形成图案和第二电路形成图案形成电路形成槽，以及形成与电路形成槽连接的通孔形成凹陷; 以及通过用导电材料填充电路形成槽和通孔形成凹陷来形成外部电路图案和外部通孔。 这可以提供具有高可靠性和细线电路的薄印刷电路板。

公开(公告)号：US20100264549A1

公开(公告)日：2010-10-21

申请号：US12463945

申请日：2009-05-11

Applicant: Young Gwan KO ,  Ryoichi Watanabe ,  Sang Soo Lee

Inventor： Young Gwan KO ,  Ryoichi Watanabe ,  Sang Soo Lee

IPC: H01L23/48 ,  H01L21/78 ,  H01L21/768

CPC classification number: H01L21/486 ,  H01L21/32115 ,  H01L21/4846 ,  H01L23/49811 ,  H01L23/49827 ,  H01L23/49838 ,  H01L2924/0002 ,  H05K3/045 ,  H05K3/06 ,  H05K3/465 ,  H05K2201/09036 ,  H05K2201/09781 ,  H05K2203/0723 ,  H01L2924/00

Abstract: Disclosed herein are a trench substrate and a method of manufacturing the same. The trench substrate includes a base substrate, an insulating layer formed on one side or both sides of the base substrate and including trenches formed in a circuit region and a dummy region positioned at a peripheral edge of the trench substrate, and a circuit layer formed in the trenches of the circuit region through a plating process and including a circuit pattern and vias. Thanks to formation of the trenches in the dummy region and the cutting region, deviation in thickness of a plating layer formed on the insulating layer in a plating process is improved upon.

Abstract translation: 这里公开了沟槽衬底及其制造方法。 沟槽基板包括基底基板，形成在基底基板的一侧或两侧上的绝缘层，并且包括形成在电路区域中的沟槽和位于沟槽基板的周边边缘的虚设区域，以及电路层， 通过电镀工艺的电路区域的沟槽，并且包括电路图案和通孔。 由于在虚拟区域和切割区域中形成沟槽，因此在电镀工艺中在绝缘层上形成的镀层的厚度偏差得到改善。

公开(公告)号：US07663587B2

公开(公告)日：2010-02-16

申请号：US11468659

申请日：2006-08-30

Applicant: Yoshitaka Yamada ,  Ryoichi Watanabe ,  Masaki Kinoshita ,  Yoshihiro Watanabe ,  Sadayasu Fujibayashi ,  Norihiro Yoshida

Inventor： Yoshitaka Yamada ,  Ryoichi Watanabe ,  Masaki Kinoshita ,  Yoshihiro Watanabe ,  Sadayasu Fujibayashi ,  Norihiro Yoshida

IPC: G09G3/36

CPC classification number: G09G3/3648 ,  G02F1/1393 ,  G09G3/2007 ,  G09G2320/0271 ,  G09G2320/0285 ,  G09G2320/068 ,  G09G2330/021 ,  G09G2360/16

Abstract: A liquid crystal display device has a gradation display function of at least an n-number of gray levels and has a viewing angle characteristic of Mi/Mj≦1.3 in a case where a display luminance range in a normal direction to a display surface in a gradation range of predetermined gray levels i to j is Li to Lj and a display luminance range in an oblique viewing-angle direction of 30° or more is Mi to Mj (where n, i and j are real numbers, and n≧i>j≧0). The liquid crystal display device has a display mode in which a display image is displayed with a display luminance range of the display image being limited to Li to Lj.

Abstract translation: 液晶显示装置具有至少n个灰度级的灰度显示功能，并且在与显示面的法线方向的显示亮度范围的情况下具有Mi / Mj <= 1.3的视角特性 预定灰度i至j的灰度范围为Li至Lj，并且在30度或更大的倾斜视角方向上的显示亮度范围为Mi至Mj（其中n，i和j为实数，n> = i> j> = 0）。 液晶显示装置具有显示模式，其中显示图像被显示，显示图像的显示亮度范围被限制为Li至Lj。

公开(公告)号：US20080135150A1

公开(公告)日：2008-06-12

申请号：US11791768

申请日：2005-11-30

Applicant: Yukihiro Kiwaki ,  Ryoichi Watanabe ,  Kenichi Shibata ,  Kazuyoshi Tagawa

Inventor： Yukihiro Kiwaki ,  Ryoichi Watanabe ,  Kenichi Shibata ,  Kazuyoshi Tagawa

IPC: B60C11/11

CPC classification number: B60C11/12 ,  B60C11/0302 ,  B60C2011/1213 ,  B60C2011/1231 ,  B60C2011/1245 ,  B60C2011/1277 ,  Y10S152/03

Abstract: A plurality of shallow grooves which are shallower than a sipe are formed on land sections formed on treads of a pneumatic tire. The shallow grooves are configured so that a total sectional area of the shallow grooves per unit area in a cross section in a tire width direction in at least one of tread end areas arranged at end sides of the tread surface in the tire width direction or land end areas arranged at portions adjacent to a drain main groove on the land sections becomes larger than a total sectional area of the shallow grooves per unit on the other areas.

Abstract translation: 在充气轮胎的胎面上形成的陆部上形成有比刀槽花纹浅的多个浅槽。 浅沟槽被构造成使得在布置在轮胎宽度方向上的胎面表面的端侧的至少一个胎面端区域中，在轮胎宽度方向上的横截面中的每单位面积的浅槽的总截面积 在陆部上与排水主槽相邻的部位配置的端部区域大于其他区域的每单位的浅槽的总截面积。

公开(公告)号：US06839967B2

公开(公告)日：2005-01-11

申请号：US10202086

申请日：2002-07-25

Applicant: Kishiro Abe ,  Ryoichi Watanabe ,  Ryo Nishibayashi ,  Yuji Iwakura

Inventor： Kishiro Abe ,  Ryoichi Watanabe ,  Ryo Nishibayashi ,  Yuji Iwakura

IPC: B21D53/32 ,  B60B3/04 ,  B23P15/00

CPC classification number: B60B3/002 ,  B21D53/32 ,  Y10T29/49504

Abstract: A lightened disk for a wheel has a flange having an axially inboard edge. The inboard edge includes a general portion which is located in a plane perpendicular to an axis of the disk. The flange portion has a thickness less than 90% of a thickness of a disk material at at least the general portion of the inboard edge. A method for manufacturing a lightened disk for a wheel includes a drawing step during which the flange portion is drawn such than the flange portion has a thickness less than 90% of a thickness of a disk material at at least the general portion of the inboard edge.

Abstract translation: 用于车轮的减光盘具有具有轴向内侧边缘的凸缘。 内侧边缘包括位于垂直于盘的轴线的平面中的一般部分。 凸缘部分的厚度小于在内侧边缘的至少一般部分的盘材料的厚度的90％。 一种用于车轮减光盘的制造方法包括：拉伸步骤，在该拉伸步骤中，凸缘部分被拉伸，其中凸缘部分的厚度小于至少在内侧边缘的一般部分的盘材料的厚度的90％ 。

公开(公告)号：US06670102B2

公开(公告)日：2003-12-30

申请号：US09978124

申请日：2001-10-15

Applicant: Ryoichi Watanabe

Inventor： Ryoichi Watanabe

IPC: G03F726

CPC classification number: H05K3/421 ,  H05K3/0094 ,  H05K3/064 ,  H05K3/4644 ,  H05K2201/09509 ,  H05K2203/135

Abstract: A method for manufacturing a circuit board having a conductive via comprises the steps of providing a substrate having a first surface and a first conductive layer on at least one region of the first surface, forming an insulating layer on the first conductive layer, forming an opening in the insulating layer, so that the opening extending to the first conductive layer, forming a second conductive layer inside the opening and at least on the insulating layer near the opening, applying a positive photoresist on the second conductive layer, exposing the positive photoresist, developing the exposed positive photoresist, and removing the positive photoresist on the second conductive layer, except a portion of the second conductive layer that is inside the opening, etching the second conductive layer, to expose a surface of the second conductive layer, removing the positive photoresist from inside the opening, and forming a third conductive layer inside the opening.

公开(公告)号：US4916744A

公开(公告)日：1990-04-10

申请号：US195405

申请日：1988-05-16

Applicant: Ryoichi Watanabe

Inventor： Ryoichi Watanabe

IPC: H04N1/403

CPC classification number: H04N1/403

Abstract: A signal processing method and apparatus for measuring the background level of an image by detecting a minimum or maximum value of a smoothed image signal. The background level is used to set an optimum threshold for binary digitization.

Abstract translation: 一种用于通过检测平滑图像信号的最小值或最大值来测量图像的背景电平的信号处理方法和装置。 背景级别用于设置二进制数字化的最佳阈值。

公开(公告)号：US4362291A

公开(公告)日：1982-12-07

申请号：US237607

申请日：1981-02-24

Applicant: Yasukiyo Fuke ,  Ryoichi Watanabe

Inventor： Yasukiyo Fuke ,  Ryoichi Watanabe

IPC: B29C41/00 ,  B22D17/22 ,  B29C45/00 ,  B29C45/26 ,  B29C45/44 ,  B29C1/06 ,  B29C1/16

CPC classification number: B29C45/4421 ,  B22D17/2236 ,  B29C45/33 ,  Y10S425/005 ,  Y10S425/058

Abstract: In a metal mold for molding a hollow product having inwardly tapered side wall with a stationary die plate for forming a bottom portion of the product, a core, and a cavity plate surrounding the core, the core has a truncated pyramid shape and first and second slide cores are provided between the core and the cavity plate. The core and slide cores are constructed such that at the time of opening the mold both slide cores are moved inwardly in an interlocked relation with retractive movement of the core thus leaving one end of the molded product for enabling removal thereof.

Abstract translation: 在用于模制具有向内锥形侧壁的中空产品的金属模具中，具有用于形成产品底部的固定模板，芯和围绕芯的空腔板，芯具有截头棱锥形状，第一和第二 芯体设置在芯体和模腔板之间。 芯和滑芯被构造成使得在打开模具时，两个滑动芯以互锁的关系向内移动，从而留下模制产品的一端以使其能够移除。

公开(公告)号：US08547027B2

公开(公告)日：2013-10-01

申请号：US13237572

申请日：2011-09-20

Applicant: Takashi Akiyama ,  Rintaro Takahashi ,  Hisashi Fukasawa ,  Ryoichi Watanabe

Inventor： Takashi Akiyama ,  Rintaro Takahashi ,  Hisashi Fukasawa ,  Ryoichi Watanabe

IPC: H05B37/00

CPC classification number: H05B33/0809

Abstract: An object of the invention is to provide an LED drive circuit that can suppress the generation of harmonic noise. The LED drive circuit includes a rectifying circuit an LED array, and a current supply circuit which includes a capacitor and a time constant adjusting element, wherein the discharge time constant of the current supply circuit is set longer than the charge time constant of the current supply circuit, and wherein during a period of time when the magnitude of AC commercial power supply voltage is larger than the light emission threshold of the LED array, current to the light-emitting circuit is supplied mostly from the rectifying circuit, and during a period of time when the magnitude of AC commercial power supply voltage is not larger than the light emission threshold of the LED array, current to the light-emitting circuit is supplied from the current supply circuit.

Abstract translation: 本发明的目的是提供一种可以抑制谐波噪声的产生的LED驱动电路。 LED驱动电路包括LED阵列的整流电路和包括电容器和时间常数调节元件的电流供给电路，其中电流供给电路的放电时间常数被设定为长于电流供给的充电时间常数 并且其中在AC商用电源电压的大小大于LED阵列的发光阈值的时间段期间，到发光电路的电流主要来自整流电路，并且在一段时间 当交流商用电源电压的大小不大于LED阵列的发光阈值时，从电流供给电路供给到发光电路的电流。