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    Manufacturing method of semiconductor integrated circuit devices and mask manufacturing methods
    21.
    发明授权
    Manufacturing method of semiconductor integrated circuit devices and mask manufacturing methods 失效
    半导体集成电路器件的制造方法和掩模制造方法

    公开(公告)号：US06548312B1

    公开(公告)日：2003-04-15

    申请号：US09640721

    申请日：2000-08-18

    申请人： Katsuya Hayano ,  Norio Hasegawa ,  Akira Imai ,  Naoko Asai ,  Eiji Tsujimoto ,  Takahiro Watanabe

    发明人： Katsuya Hayano ,  Norio Hasegawa ,  Akira Imai ,  Naoko Asai ,  Eiji Tsujimoto ,  Takahiro Watanabe

    IPC分类号： H01L2100

    CPC分类号： G03F7/70433

    摘要： In order to inhibit or prevent a pattern abnormality such as the deformation or misalignment of a pattern of a semiconductor integrated circuit device, a light intensity is calculated based on the pattern data DBP of a mask and the aberration data DBL of a lens of a pattern exposure device (step 101) and then the results of the light intensity calculation is compared with the results of the light intensity calculated on condition that the lens of the pattern exposure device has no aberration (step 102), and then a pattern data exceeding an allowable level, of the pattern data of the mask, is corrected according to the amount of correction calculated on the basis of the results of the comparison such that the pattern data does not exceed the allowable level (step 104). The mask is manufactured by using the mask making data DBM after the correction and then is mounted on the pattern exposure device to transfer a predetermined pattern to a semiconductor wafer.

    摘要翻译： 为了抑制或防止诸如半导体集成电路器件的图案的变形或未对准的图案异常，基于掩模的图案数据DBP和图案的透镜的像差数据DBL计算光强度 曝光装置（步骤101），然后将光强度计算的结果与在图案曝光装置的透镜没有像差的条件下计算的光强度的结果进行比较（步骤102），然后模式数据超过 根据比较结果计算出的校正量，使图案数据不超过允许值（步骤104），对掩模的图案数据的允许电平进行校正。 通过在校正后使用掩模制作数据DBM来制造掩模，然后安装在图案曝光装置上以将预定图案转印到半导体晶片。

    PHASE SHIFT MASK, METHOD OF FORMING ASYMMETRIC PATTERN, METHOD OF MANUFACTURING DIFFRACTION GRATING, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
    24.
    发明申请
    PHASE SHIFT MASK, METHOD OF FORMING ASYMMETRIC PATTERN, METHOD OF MANUFACTURING DIFFRACTION GRATING, AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE 有权
    相位移掩模，形成非对称图案的方法，制造衍射光栅的方法和制造半导体器件的方法

    公开(公告)号：US20140302679A1

    公开(公告)日：2014-10-09

    申请号：US14350314

    申请日：2012-09-13

    申请人： Kazuyuki Kakuta ,  Toshihiko Onozuka ,  Shigeru Matsui ,  Yoshisada Ebata ,  Norio Hasegawa

    发明人： Kazuyuki Kakuta ,  Toshihiko Onozuka ,  Shigeru Matsui ,  Yoshisada Ebata ,  Norio Hasegawa

    IPC分类号： H01L21/3065 ,  G03F1/26 ,  H01L21/308

    CPC分类号： H01L21/3065 ,  G03F1/0046 ,  G03F1/26 ,  G03F1/28 ,  G03F1/30 ,  H01L21/3085

    摘要： A technique of forming an asymmetric pattern by using a phase shift mask, and further, techniques of manufacturing a diffraction grating and a semiconductor device, capable of improving accuracy of a product and capable of shortening manufacturing time. In a method of manufacturing a diffraction grating by using a phase shift mask (in which a light shield part and a light transmission part are periodically arranged), light emitted from an illumination light source is transmitted through the phase shift mask, and a photoresist on a surface of a Si wafer is exposed by providing interference between zero diffraction order light and positive first diffraction order light which are generated by the transmission through this phase shift mask onto the surface of the Si wafer, and a diffraction grating which has a blazed cross-sectional shape is formed on the Si wafer.

    摘要翻译： 通过使用相移掩模形成非对称图案的技术，以及制造衍射光栅和半导体器件的技术，能够提高产品的精度并能缩短制造时间。 在通过使用相移掩模（其中周期性地布置有遮光部分和透光部分）制造衍射光栅的方法中，从照明光源发射的光透射穿过相移掩模，并且光致抗蚀剂在 通过提供由通过该相移掩模的透射产生的零衍射级光和正的第一衍射级光之间的干涉而暴露于Si晶片的表面到Si晶片的表面上的衍射光栅和具有闪耀十字 在Si晶片上形成截面形状。

    Pattern Measuring Apparatus and Computer Program
    25.
    发明申请
    Pattern Measuring Apparatus and Computer Program 有权
    图案测量仪器和计算机程序

    公开(公告)号：US20120267528A1

    公开(公告)日：2012-10-25

    申请号：US13518706

    申请日：2010-12-01

    申请人： Kei Sakai ,  Yafeng Zhang ,  Norio Hasegawa

    发明人： Kei Sakai ,  Yafeng Zhang ,  Norio Hasegawa

    IPC分类号： H01J37/28

    CPC分类号： G03F7/70466 ,  G01B2210/56 ,  G06T7/001 ,  G06T2207/10061 ,  G06T2207/30148 ,  H01J2237/2817

    摘要： A pattern measuring apparatus which can identify a kind of gaps formed by a manufacturing process having a plurality of exposing steps such as SADP, particularly, which can suitably access a gap even if a sample has the gap that is not easily accessed is disclosed. A feature amount regarding one end side of a pattern having a plurality of patterns arranged therein and a plurality of kinds of feature amounts regarding the other end side of the pattern are extracted from a signal detected on the basis of scanning of a charged particle beam. With respect to proper kinds of feature amounts among the plurality of kinds of feature amounts, the feature amount on one side of the pattern and that on the other end side of the pattern are compared. On the basis of the comparison, the kinds of spaces among the patterns are determined.

    摘要翻译： 公开了一种图案测量装置，其可以识别由具有多个曝光步骤的制造工艺形成的间隙，例如SADP，特别是即使样品具有不容易接近的间隙也能适当地接近间隙。 从基于扫描带电粒子束检测的信号中提取关于其中布置有多个图案的图案的一端侧的特征量和关于图案的另一端的多种特征量。 对于多种特征量中的适当种类的特征量，比较图案的一侧的特征量和图案的另一端的特征量。 在比较的基础上，确定了图案间的空间种类。

    Pattern Shape Estimation Method and Pattern Measuring Device
    26.
    发明申请
    Pattern Shape Estimation Method and Pattern Measuring Device 有权
    图案形状估计方法和图案测量装置

    公开(公告)号：US20120151428A1

    公开(公告)日：2012-06-14

    申请号：US13390354

    申请日：2010-07-15

    申请人： Maki Tanaka ,  Norio Hasegawa ,  Chie Shishido ,  Mayuka Osaki

    发明人： Maki Tanaka ,  Norio Hasegawa ,  Chie Shishido ,  Mayuka Osaki

    IPC分类号： G06F17/50

    CPC分类号： G01B15/04 ,  H01L22/12 ,  H01L2924/0002 ,  H01L2924/00

    摘要： The present invention aims at proposing a library creation method and a pattern shape estimation method in which it is possible, when estimating a shape based on comparison between an actual waveform and a library, to appropriately estimate the shape.As an illustrative embodiment to achieve the object, there are proposed a method of selecting a pattern by referring to a library, a method of creating a library by use of pattern cross-sectional shapes calculated through an exposure process simulation in advance, and a method for selecting a pattern shape stored in the library.

    摘要翻译： 本发明旨在提出一种库创建方法和图案形状估计方法，其中当基于实际波形和库之间的比较来估计形状时，可以适当地估计形状。 作为实现该目的的说明性实施例，提出了通过参照库来选择图案的方法，通过使用预先通过曝光处理模拟计算的图案横截面形状来创建库的方法，以及方法 用于选择存储在库中的图案形状。

    Transmitter
    28.
    发明申请
    Transmitter 有权
    发射机

    公开(公告)号：US20060189282A1

    公开(公告)日：2006-08-24

    申请号：US10532338

    申请日：2003-10-20

    申请人： Norio Hasegawa ,  Tetsuhiko Miyatani ,  Hisashi Kawai ,  Masami Yoshida ,  Jun Watanabe

    发明人： Norio Hasegawa ,  Tetsuhiko Miyatani ,  Hisashi Kawai ,  Masami Yoshida ,  Jun Watanabe

    IPC分类号： H04B1/04 ,  H01Q11/12

    CPC分类号： H04L27/2614

    摘要： A transmitter for averagedly suppressing the variation in input level of an amplifier according to variation in carrier level. The transmitter comprises an input power calculation section (16) for calculating mean input power of each carrier, an output power calculating section (17) for calculating mean output power of each carrier after the carrier band is limited, a monitoring section (18) for identifying a carrier having the maximum mean input power, acquiring the maximum value, acquiring the mean output power of the identified carrier, determining the ratio of the mean input power to the mean output power, and calculating level control information which is the ratio of the ratio determined above to a predetermined expected value, and a signal level adjusting section (15) for adjusting the level of a multicarrier signal by multiplying the level control information outputted from the monitoring section (18).

    摘要翻译： 一种发射机，用于根据载波电平的变化平均地抑制放大器输入电平的变化。 发射机包括用于计算每个载波的平均输入功率的输入功率计算部分（16），用于在载波频带被限制之后计算每个载波的平均输出功率的输出功率计算部分（17），用于 识别具有最大平均输入功率的载波，获取最大值，获取所识别的载波的平均输出功率，确定平均输入功率与平均输出功率的比率，以及计算作为平均输入功率的比率的电平控制信息 以及用于通过乘以从监视部分（18）输出的电平控制信息来调整多载波信号的电平的信号电平调节部分（15）。

    Method of manufacturing a semiconductor device
    29.
    发明申请
    Method of manufacturing a semiconductor device 审中-公开
    制造半导体器件的方法

    公开(公告)号：US20050277065A1

    公开(公告)日：2005-12-15

    申请号：US11147222

    申请日：2005-06-08

    申请人： Norio Hasegawa ,  Katsuya Hayano

    发明人： Norio Hasegawa ,  Katsuya Hayano

    IPC分类号： G03F1/54 ,  G03F1/56 ,  G03F7/00 ,  G03F7/20 ,  H01L21/027 ,  H01L21/8238 ,  H01L27/092

    CPC分类号： G03F1/34 ,  G03F1/29 ,  G03F1/56

    摘要： By using a high-accuracy mask capable of being manufactured through a simplified step, a semiconductor device manufacturing method of forming a desired pattern over a wafer is provided. A relatively narrow groove pattern and a groove pattern wider than the narrow groove pattern are formed, and a shade film made of, for example, a resist film is formed in the relatively wide groove pattern. As a concrete method of manufacturing a mask, after applying a resist film onto the quartz glass substrate, exposure and developing processings are performed, whereby the resist film is patterned. The patterned resist film is used as a mask to form the groove patterns in the quartz glass substrate (dry etching). Subsequently, after removing the patterned resist film, a new resist film is applied. Then, patterning is performed to form the shade film only in the groove pattern.

    摘要翻译： 通过使用能够通过简化步骤制造的高精度掩模，提供了在晶片上形成期望图案的半导体器件制造方法。 形成比窄槽图案宽的相对窄的槽图案和凹槽图案，并且以比较宽的凹槽图案形成由例如抗蚀剂膜制成的遮光膜。 作为制造掩模的具体方法，在将石英玻璃基板上施加抗蚀剂膜之后，进行曝光和显影处理，从而对抗蚀剂膜进行图案化。 图案化的抗蚀剂膜用作掩模以在石英玻璃基板（干蚀刻）中形成凹槽图案。 随后，在去除图案化的抗蚀剂膜之后，施加新的抗蚀剂膜。 然后，进行图案化以仅在凹槽图案中形成遮光膜。