公开(公告)号：US10784344B2

公开(公告)日：2020-09-22

申请号：US16052091

申请日：2018-08-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Min Song ,  Woo-Seok Park ,  Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae

IPC: H01L27/148 ,  H01L29/06 ,  H01L29/423 ,  H01L29/08 ,  H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L21/306 ,  H01L21/308 ,  H01L21/02 ,  H01L29/10 ,  B82Y10/00 ,  H01L29/786 ,  H01L29/775 ,  H01L29/40 ,  H01L21/3105 ,  H01L29/16 ,  H01L29/165 ,  H01L21/8234

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a gate structure on the substrate. The semiconductor device includes a channel on the substrate. The semiconductor device includes a source/drain layer on the channel. Moreover, the semiconductor device includes a spacer on a sidewall of the gate structure. The spacer includes a central portion overlapping the channel in a vertical direction, and a protrusion portion protruding from the central portion. Related methods of manufacturing semiconductor devices are also provided.

公开(公告)号：US09653361B2

公开(公告)日：2017-05-16

申请号：US15199502

申请日：2016-06-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Il Bae ,  Kang-Ill Seo

IPC: H01L27/12 ,  H01L21/8238 ,  H01L29/78 ,  H01L27/088 ,  H01L27/092 ,  H01L29/66 ,  H01L27/11 ,  H01L29/423 ,  H01L29/786

CPC classification number: H01L21/823807 ,  H01L21/823814 ,  H01L21/823828 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78618 ,  H01L29/78654 ,  H01L29/78684 ,  H01L29/78696 ,  H01L2029/7858

Abstract: A semiconductor device includes a fin structure disposed on a substrate, a sacrificial layer pattern disposed on the fin structure, an active layer pattern disposed on the sacrificial layer pattern, and a gate dielectric layer and a gate electrode layer extending through the sacrificial layer pattern and surrounding a portion of the active layer pattern.

公开(公告)号：US12051694B2

公开(公告)日：2024-07-30

申请号：US18168332

申请日：2023-02-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chang-Woo Noh ,  Jae-Hyeoung Ma ,  Dong-Il Bae

IPC: H01L27/088 ,  H01L21/02 ,  H01L21/308 ,  H01L21/8234 ,  H01L29/10 ,  H01L29/165 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L27/0886 ,  H01L21/02532 ,  H01L21/3086 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823481 ,  H01L29/1033 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/6656 ,  H01L29/6681 ,  H01L29/785

Abstract: A semiconductor device may include first channels on a first region of a substrate and spaced apart from each other in a vertical direction substantially perpendicular to an upper surface of the substrate, second channels on a second region of the substrate and spaced apart from each other in the vertical direction, a first gate structure on the first region of the substrate and covering at least a portion of a surface of each of the first channels, and a second gate structure on the second region of the substrate and covering at least a portion of a surface of each of the second channels. The second channels may be disposed at heights substantially the same as those of corresponding ones of the first channels, and a height of a lowermost one of the second channels may be greater than a height of a lowermost one of the first channels.

公开(公告)号：US11894379B2

公开(公告)日：2024-02-06

申请号：US17844435

申请日：2022-06-20

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae ,  Seung-Min Song ,  Woo-Seok Park

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/41 ,  H01L29/66 ,  H01L29/775 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/786 ,  H01L29/423 ,  H01L29/165 ,  H01L29/20 ,  H01L29/78

CPC classification number: H01L27/0924 ,  H01L21/82385 ,  H01L21/823456 ,  H01L21/823468 ,  H01L21/823864 ,  H01L27/088 ,  H01L27/092 ,  H01L29/0669 ,  H01L29/0673 ,  H01L29/413 ,  H01L29/66439 ,  H01L29/66742 ,  H01L29/66772 ,  H01L29/775 ,  H01L29/78696 ,  H01L21/823412 ,  H01L21/823807 ,  H01L29/0646 ,  H01L29/0653 ,  H01L29/165 ,  H01L29/20 ,  H01L29/42392 ,  H01L29/7853 ,  H01L2924/13086

Abstract: A semiconductor device includes a first transistor in a first region of a substrate and a second transistor in a second region of the substrate. The first transistor includes multiple first semiconductor patterns; a first gate electrode; a first gate dielectric layer; a first source/drain region; and an inner-insulating spacer. The second transistor includes multiple second semiconductor patterns; a second gate electrode; a second gate dielectric layer; and a second source/drain region. The second gate dielectric layer extends between the second gate electrode and the second source/drain region and is in contact with the second source/drain region. The first source/drain region is not in contact with the first gate dielectric layer.

公开(公告)号：US20220093735A1

公开(公告)日：2022-03-24

申请号：US17541625

申请日：2021-12-03

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seung-Min SONG ,  Woo-Seok PARK ,  Jung-Gil YANG ,  Geum-Jong BAE ,  Dong-Il Bae

IPC: H01L29/06 ,  H01L29/423 ,  H01L29/08 ,  H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L21/306 ,  H01L21/308 ,  H01L21/02 ,  H01L29/10 ,  B82Y10/00 ,  H01L29/786 ,  H01L29/775 ,  H01L29/40

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate and a gate structure on the substrate. The semiconductor device includes a channel on the substrate. The semiconductor device includes a source/drain layer on the channel. Moreover, the semiconductor device includes a spacer on a sidewall of the gate structure. The spacer includes a central portion overlapping the channel in a vertical direction, and a protrusion portion protruding from the central portion. Related methods of manufacturing semiconductor devices are also provided.

公开(公告)号：US10431585B2

公开(公告)日：2019-10-01

申请号：US15830981

申请日：2017-12-04

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung-Gil Yang ,  Geum-Jong Bae ,  Dong-Il Bae ,  Seung-Min Song ,  Woo-Seok Park

IPC: H01L27/092 ,  H01L29/06 ,  H01L21/8234 ,  H01L29/41 ,  H01L29/66 ,  H01L29/775 ,  H01L21/8238 ,  H01L27/088 ,  H01L29/423 ,  H01L29/165 ,  H01L29/20 ,  H01L29/78

Abstract: A semiconductor device includes a first transistor in a first region and a second transistor in a second region. The first transistor includes: a first nanowire, a first gate electrode, a first gate dielectric layer, a first source/drain region, and an inner-insulating spacer. The first nanowire has a first channel region. The first gate electrode surrounds the first nanowire. The first gate dielectric layer is between the first nanowire and the first gate electrode. The first source/drain region is connected to an edge of the first nanowire. The inner-insulating spacer is between the first gate dielectric layer and the first source/drain region. The second transistor includes a second nanowire, a second gate electrode, a second gate dielectric layer, and a second source/drain region. The second nanowire has a second channel region. The second gate electrode surrounds the second nanowire. The second gate dielectric layer is between the second nanowire and the second gate electrode. The second source/drain region is connected to an edge of the second nanowire.

公开(公告)号：US09735153B2

公开(公告)日：2017-08-15

申请号：US14330306

申请日：2014-07-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Il Bae ,  Kang-Ill Seo

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/66 ,  H01L21/82 ,  H01L29/161 ,  H01L21/8234 ,  H01L21/3105 ,  H01L29/423 ,  H01L29/775 ,  H01L29/06 ,  H01L29/08

CPC classification number: H01L27/0886 ,  H01L21/31053 ,  H01L21/823431 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/161 ,  H01L29/42364 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/6681 ,  H01L29/775 ,  H01L29/7851 ,  H01L29/78696

Abstract: A semiconductor device includes a first fin structure disposed on a substrate. The first fin structure extends in a first direction. A first sacrificial layer pattern is disposed on the first fin structure. The first sacrificial layer pattern includes a left portion and a right portion arranged in the first direction. A dielectric layer pattern is disposed on the first fin structure and interposed between the left and right portions of the first sacrificial layer pattern. A first active layer pattern extending in the first direction is disposed on the first sacrificial layer pattern and the dielectric layer pattern. A first gate electrode structure is disposed on a portion of the first active layer pattern. The portion of the first active layer is disposed on the dielectric layer pattern. The first gate electrode structure extends in a second direction crossing the first direction.

公开(公告)号：US09443978B2

公开(公告)日：2016-09-13

申请号：US14330305

申请日：2014-07-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Dong-Il Bae ,  Kang-Ill Seo

IPC: H01L23/52 ,  H01L29/78 ,  H01L27/088 ,  H01L27/092 ,  H01L29/66 ,  H01L27/11

CPC classification number: H01L21/823807 ,  H01L21/823814 ,  H01L21/823828 ,  H01L27/0886 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/1104 ,  H01L27/1116 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/785 ,  H01L29/78618 ,  H01L29/78654 ,  H01L29/78684 ,  H01L29/78696 ,  H01L2029/7858

Abstract: A semiconductor device includes a fin structure disposed on a substrate, a sacrificial layer pattern disposed on the fin structure, an active layer pattern disposed on the sacrificial layer pattern, and a gate dielectric layer and a gate electrode layer extending through the sacrificial layer pattern and surrounding a portion of the active layer pattern.

Abstract translation: 半导体器件包括设置在衬底上的翅片结构，设置在鳍结构上的牺牲层图案，设置在牺牲层图案上的有源层图案，以及延伸穿过牺牲层图案的栅极电介质层和栅电极层，以及 围绕有源层图案的一部分。

公开(公告)号：US20150263172A1

公开(公告)日：2015-09-17

申请号：US14206373

申请日：2014-03-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong-Min CHO ,  Hyun-Jae Kang ,  Dong-Il Bae

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/0847 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/66795 ,  H01L29/7848 ,  H01L29/785

Abstract: A semiconductor device is provided. A substrate includes a fin. The fin extends in a first direction. A gate structure is disposed on a first region of the fin. The gate structure extends in a second direction crossing the first direction. A source/drain is disposed on a second region of the fin. The first source/drain is disposed on at least one sidewall of the gate structure. A top surface of the first region is lower than a top surface of the second region.

Abstract translation: 提供半导体器件。 衬底包括翅片。 翅片沿第一方向延伸。 栅极结构设置在鳍的第一区域上。 栅极结构沿与第一方向交叉的第二方向延伸。 源极/漏极设置在鳍片的第二区域上。 第一源极/漏极设置在栅极结构的至少一个侧壁上。 第一区域的顶表面低于第二区域的顶表面。