Semiconductor package
    22.
    发明授权

    公开(公告)号:US12170251B2

    公开(公告)日:2024-12-17

    申请号:US17317368

    申请日:2021-05-11

    Abstract: Disclosed is a semiconductor package comprising a redistribution substrate that has a first trench that extends through a top surface of the redistribution substrate, a first semiconductor chip on the redistribution substrate, a capacitor chip on a bottom surface of the first semiconductor chip, and an under-fill layer on the bottom surface of the first semiconductor chip. The redistribution substrate includes a plurality of dielectric layers vertically stacked, a plurality of redistribution patterns in each of the dielectric layers, and a plurality of dummy redistribution patterns in the first trench. The dummy redistribution patterns vertically overlap the first semiconductor chip. An uppermost surface of the dummy redistribution pattern is located at a level higher than a level of a bottom surface of the first trench.

    Semiconductor package device
    24.
    发明授权

    公开(公告)号:US11616051B2

    公开(公告)日:2023-03-28

    申请号:US17239956

    申请日:2021-04-26

    Abstract: A semiconductor package device includes a first semiconductor package, a second semiconductor package, and first connection terminals between the first and second semiconductor packages. The first semiconductor package includes a lower redistribution substrate, a semiconductor chip, and an upper redistribution substrate vertically spaced apart from the lower redistribution substrate across the semiconductor chip. The upper redistribution substrate includes a dielectric layer, redistribution patterns vertically stacked in the dielectric layer and each including line and via parts, and bonding pads on uppermost redistribution patterns. The bonding pads are exposed from the dielectric layer and in contact with the first connection terminals. A diameter of each bonding pad decreases in a first direction from a central portion at a top surface of the upper redistribution substrate to an outer portion at the top surface thereof. A thickness of each bonding pad increases in the first direction.

    Semiconductor packages
    25.
    发明授权

    公开(公告)号:US11610785B2

    公开(公告)日:2023-03-21

    申请号:US17331751

    申请日:2021-05-27

    Abstract: Disclosed is a semiconductor package comprising a semiconductor chip, an external connection member on the semiconductor chip, and a dielectric film between the semiconductor chip and the external connection member. The semiconductor chip includes a substrate, a front-end-of-line structure on the substrate, and a back-end-of-line structure on the front-end-of-line structure. The back-end-of-line structure includes metal layers stacked on the front-end-of-line structure, a first dielectric layer on the uppermost metal layer and including a contact hole that vertically overlaps a pad of an uppermost metal layer, a redistribution line on the first dielectric layer and including a contact part in the contact hole and electrically connected to the pad, a pad part, and a line part that electrically connects the contact part to the pad part, and an upper dielectric layer on the redistribution line.

    Semiconductor package
    27.
    发明授权

    公开(公告)号:US11456241B2

    公开(公告)日:2022-09-27

    申请号:US16884212

    申请日:2020-05-27

    Abstract: A semiconductor package includes a semiconductor chip, a redistribution structure below the semiconductor chip, a first insulating layer below the redistribution structure, a pad below the first insulating layer, the pad being in contact with the redistribution structure, and a bump below the pad, wherein a horizontal maximum length of an upper portion of the pad is greater than a horizontal maximum length of a lower portion of the pad.

    IMAGE SENSOR PACKAGE INCLUDING GLASS SUBSTRATE

    公开(公告)号:US20220165778A1

    公开(公告)日:2022-05-26

    申请号:US17363931

    申请日:2021-06-30

    Abstract: An image sensor package includes a glass substrate configured to focus incident light, a first redistribution layer and a second redistribution layer both disposed under the glass substrate while being horizontally spaced apart from each other by a first distance, an image sensor disposed such that an upper surface thereof is vertically spaced apart from both a lower surface of the first redistribution layer and a lower surface of the second redistribution layer by a second distance, and a first connector that connects both the first redistribution layer and the second redistribution layer to the image sensor. The thickness of the glass substrate is 0.6 to 0.8 mm. The first distance is smaller than the horizontal length of the image sensor by 50 μm to 1 mm. The second distance is equal to or less than 0.1 mm.

    SEMICONDUCTOR PACKAGES
    29.
    发明申请

    公开(公告)号:US20220130685A1

    公开(公告)日:2022-04-28

    申请号:US17331751

    申请日:2021-05-27

    Abstract: Disclosed is a semiconductor package comprising a semiconductor chip, an external connection member on the semiconductor chip, and a dielectric film between the semiconductor chip and the external connection member. The semiconductor chip includes a substrate, a front-end-of-line structure on the substrate, and a back-end-of-line structure on the front-end-of-line structure. The back-end-of-line structure includes metal layers stacked on the front-end-of-line structure, a first dielectric layer on the uppermost metal layer and including a contact hole that vertically overlaps a pad of an uppermost metal layer, a redistribution line on the first dielectric layer and including a contact part in the contact hole and electrically connected to the pad, a pad part, and a line part that electrically connects the contact part to the pad part, and an upper dielectric layer on the redistribution line.

    SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME

    公开(公告)号:US20210407940A1

    公开(公告)日:2021-12-30

    申请号:US17474614

    申请日:2021-09-14

    Abstract: A semiconductor package includes a redistribution structure including a redistribution insulating layer and a redistribution pattern, a semiconductor chip provided on a first surface of the redistribution insulation layer and electrically connected to the redistribution pattern, and a lower electrode pad provided on a second surface opposite to the first surface of the redistribution insulating layer, the lower electrode pad including a first portion embedded in the redistribution insulating layer and a second portion protruding from the second surface of the redistribution insulating layer, wherein a thickness of the first portion of the lower electrode pad is greater than a thickness of the second portion of the lower electrode pad.

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