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公开(公告)号:US20190115904A1
公开(公告)日:2019-04-18
申请号:US15988064
申请日:2018-05-24
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: YONG HWAN KIM , Wook Kim , Ji Youn Kim
IPC: H03K3/03 , H03K19/00 , H03K19/003 , G06F1/08
Abstract: Clock generation and control in a semiconductor system having process, voltage and temperature (PVT) variation. A semiconductor device may include at least first and second ring oscillators, each disposed at locations respectively closest to first and second logic circuits of an operation circuit, and generating first and second oscillating signals. A detecting circuit is configured to perform a predetermined logic operation on the first oscillating signal and the second oscillating signal to generate a first clock signal. A calibration circuit is configured to receive the first clock signal from the detecting circuit and perform a delay control on each of the first ring oscillator and the second ring oscillator to generate a second clock signal for operating the operation circuit.
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公开(公告)号:US10193080B2
公开(公告)日:2019-01-29
申请号:US14804898
申请日:2015-07-21
Applicant: Samsung Electronics Co., Ltd. , Samsung SDI Co., Ltd.
Inventor: Dalho Huh , Miyoung Chae , Hyunjung Kim , Soonok Jeon , Yeonsook Chung , Yongsik Jung , Wook Kim , Jhunmo Son , Namheon Lee , Sangmo Kim
IPC: H01L51/50 , H01L51/00 , C09K11/02 , C07D405/04 , C09K11/06 , C07D409/04 , C07D209/88 , C07D405/10 , C07D471/04
Abstract: A condensed cyclic compound represented by Formulae 1A or 1B: wherein in Formulae 1A and 1B, groups and variables are the same as described in the specification.
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公开(公告)号:US09903764B2
公开(公告)日:2018-02-27
申请号:US14617097
申请日:2015-02-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kyungsoo Lee , Sridhar Sundaram , Wook Kim , Jichul Kim , MyungKyoon Yim
CPC classification number: G01K1/026 , G01K7/425 , G01R21/02 , G06F1/26 , G06F17/5036 , G06F2217/80
Abstract: A power estimation circuit including: a power estimation manager circuit configured to receive power data and temperature data; and a storage circuit that includes a first region storing resistive-capacitive (RC) thermal modeling data, a second region storing the power data and a third region storing the temperature data, wherein the power estimation manager circuit is configured to estimate power consumption of a first node at a second time point, which occurs after a first time point, using the RC thermal modeling data, the power data and the temperature data.
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公开(公告)号:US11889749B2
公开(公告)日:2024-01-30
申请号:US16987950
申请日:2020-08-07
Applicant: Samsung Electronics Co., Ltd. , Samsung SDI Co., Ltd.
Inventor: Minsik Min , Wook Kim , Sangmo Kim , Jongsoo Kim , Joonghyuk Kim , Hyejin Bae , Jhunmo Son , Hasup Lee , Yongsik Jung
CPC classification number: H10K85/346 , C07F15/0086 , C09K11/06 , C09K2211/1029 , C09K2211/1048 , C09K2211/185 , H10K50/15 , H10K50/16 , H10K50/17 , H10K50/171 , H10K50/18
Abstract: An organometallic compound represented by Formula 1, wherein M1 is beryllium, magnesium, aluminum, calcium, titanium, manganese, cobalt, copper, zinc, gallium, germanium, zirconium, ruthenium, rhodium, palladium, silver, rhenium, platinum, or gold; A1 to A3 are each independently a C5-C30 carbocyclic group or a C1-C30 heterocyclic group; A4 is a 5-membered heterocyclic group; A5 is at least two rings of a C7-C30 carbocyclic group comprising a 6-membered carbocyclic group, or A5 is at least two rings of a C1-C30 heterocyclic group comprising a 6-membered carbocyclic group or a 6-membered heterocyclic group; X10, X20, X30, and X40 to X44 are each independently C or N; T1 to T3 are each independently a single bond, *—N[(L1)a1-(R1)b1]—*′, *—B(R1)—*′, *—P(R1)—*′, *—C(R1)(R2)—*′, *—Si(R1)(R2)—*′, *—Ge(R1)(R2)—*′, *—S—*′, *—Se—*′, *—O—*′, *—C(═O)—*′, *—S(═O)—*′, *—S(═O)2—*′, *—C(R1)═C(R2)—*′, *—C(═S)—*′, or *—C≡C—*′; and wherein the other substituents may be understood by referring to the detailed description.
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公开(公告)号:US11844266B2
公开(公告)日:2023-12-12
申请号:US16750214
申请日:2020-01-23
Applicant: Samsung Electronics Co., Ltd. , SAMSUNG SDI CO., LTD.
Inventor: Minsik Min , Sangmo Kim , Hosuk Kang , Wook Kim , Sungho Nam , Hyejin Bae , Jhunmo Son , Yongsik Jung , Jun Chwae
CPC classification number: H10K85/346 , C07F15/0086 , C09K11/06 , C09K2211/1029 , C09K2211/1044 , C09K2211/185 , H10K50/11 , H10K2101/10
Abstract: Provided are the organometallic compound represented by Formula 1 and an organic light-emitting device including the same:
M, X1 to X4, X11, ring CY2 to ring CY4, T1, T2, R1 to R4, and a1 to a4 in Formula 1 are the same as described in the present specification.-
公开(公告)号:US20230010252A1
公开(公告)日:2023-01-12
申请号:US17700825
申请日:2022-03-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Shigenobu Maeda , Wook Kim , Hongsik Kim , Heejun Kim , Seyoung Park , Seongjin Yoo , Minhong Yun , Daehan Han
IPC: G06F30/398 , G06F30/27
Abstract: Provided is a semiconductor process modeling system. The semiconductor process modeling system includes a preprocessing component configured to generate tensor data from raw data obtained from semiconductor manufacturing equipment, wherein, when the raw data is expressed as a raw matrix representing values of a plurality of process parameters for each of a plurality of wafers, at least one element of the raw matrix is omitted, when the tensor data is expressed as a tensor matrix representing values of a plurality of preprocessed process parameters for each of the plurality of wafers, the number of omitted elements of the tensor matrix is less than the number of omitted elements of the raw matrix, and the preprocessing component is configured to generate the tensor data by modifying the raw data based on at least one of characteristics of the semiconductor manufacturing equipment and characteristics of the plurality of process parameters.
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27.
公开(公告)号:US11531385B2
公开(公告)日:2022-12-20
申请号:US16519621
申请日:2019-07-23
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yong-Hwan Kim , Wook Kim , In-Sub Shin
IPC: G06F1/28 , G06F1/32 , H03K3/03 , H03K3/037 , H03L7/08 , H03L7/097 , H03L7/099 , G06F1/3296 , G06F1/08 , G01R9/00 , G06F15/78
Abstract: In one embodiment, the voltage droop monitoring circuit includes a ring oscillator circuit block configured to generate a plurality of oscillation signals and configured to output a selected oscillation signal from one of the plurality of oscillation signals based on a first control signal. The first control signal is based on a power supply voltage of a functional circuit block. The voltage droop monitoring circuit further includes a counter configured to generate a count value based on the selected oscillation signal, and a droop detector configured detect droop in the power supply voltage of the functional circuit block based on the count value and at least one threshold value.
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公开(公告)号:US20210405670A1
公开(公告)日:2021-12-30
申请号:US17471378
申请日:2021-09-10
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yun-Hyeok Im , Myung-Kyoon Yim , Wook Kim , Kyoung-Min Lee , Kyung-Soo Lee
Abstract: To dynamically manage a temperature of an electronic device, a local temperature is provided by measuring a temperature of a local spot in the electronic device and a reference temperature is provided by measuring a temperature of a reference spot in the electronic device where the reference spot and the local spot are thermally coupled. A target temperature corresponding to a limit value of the reference temperature is adjusted based on the local temperature and a power level of the electronic device is controlled based on the same target temperature. The target temperature may be set to a relatively high value to secure performance of the electronic device when the local temperature is relatively low. Alternatively, the target temperature may be set to a relatively low value to pursue stability of the electronic device when the local temperature is relatively high.
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公开(公告)号:US11011710B2
公开(公告)日:2021-05-18
申请号:US16192051
申请日:2018-11-15
Applicant: Samsung Electronics Co., Ltd. , Samsung SDI Co., Ltd.
Inventor: Eunsuk Kwon , Wook Kim , Minsik Min , Sangho Park , Hyejin Bae , Jhunmo Son , Hasup Lee , Yongsik Jung
Abstract: An organometallic compound represented by Formula 1: M11(L11)n11(L12)n12 Formula 1 wherein, in Formula 1, M11, L11, L12, n11, and n12 are the same as described in the specification.
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公开(公告)号:US10972080B2
公开(公告)日:2021-04-06
申请号:US16865502
申请日:2020-05-04
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Yong Hwan Kim , Wook Kim , Ji Youn Kim
Abstract: Clock generation and control in a semiconductor system having process, voltage and temperature (PVT) variation. A semiconductor device may include at least first and second ring oscillators, each disposed at locations respectively closest to first and second logic circuits of an operation circuit, and generating first and second oscillating signals. A detecting circuit is configured to perform a predetermined logic operation on the first oscillating signal and the second oscillating signal to generate a first clock signal. A calibration circuit is configured to receive the first clock signal from the detecting circuit and perform a delay control on each of the first ring oscillator and the second ring oscillator to generate a second clock signal for operating the operation circuit.
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