Abstract:
A BioMEMS microelectromechanical apparatus and for fabricating the same is disclosed. A substrate is provided with at least one signal conduit formed on the substrate. A sacrificial layer of sacrificial material may be deposited on the signal conduit and optionally patterned to remove sacrificial material from outside the packaging covered area. A bonding layer may be deposited on at least a portion of the signal conduit and on the sacrificial layer when included. The bonding layer may be planarized and patterned to form one or more cap bonding pads and define a packaging covered area. A cap may be bonded on the cap bonding pad to define a capped area and so that the signal conduit extends from outside the capped area to inside the capped area. Additionally, a test material such as a fluid may be provided within the capped area.
Abstract:
An integrated semiconductor device for manipulating and processing bio-entity samples and methods are described. The device includes a lower substrate, at least one optical signal conduit disposed on the lower substrate, at least one cap bonding pad disposed on the lower substrate, a cap configured to form a capped area, and disposed on the at least one cap bonding pad, a microfluidic channel, wherein a first side of the microfluidic channel is formed on the lower substrate and a second side of the microfluidic channel is formed on the cap, a photosensor array coupled to sensor control circuitry, and logic circuitry coupled to the fluidic control circuitry, and the sensor control circuitry.
Abstract:
The present disclosure provides a bio-field effect transistor (BioFET) device and methods of fabricating a BioFET and a BioFET device. The method includes forming a BioFET using one or more process steps compatible with or typical to a complementary metal-oxide-semiconductor (CMOS) process. The BioFET device includes a gate structure disposed on a first surface of a substrate and an interface layer formed on a second surface of the substrate. The substrate is thinned from the second surface to expose a channel region before forming the interface layer.
Abstract:
One aspect of the present disclosure pertains to a device. The device includes a substrate, a logic circuit disposed on the substrate, and a nanoelectromechanical systems (NEMS) device electrically connected to the logic circuit and formed on the substrate. The NEMS device includes a first electrode electrically connected to the logic circuit, a second electrode electrically connected to a first power supply, a movable feature electrically connected to the second electrode, and a control electrode operable to move the movable feature relative to the first electrode.
Abstract:
Various embodiments of the present disclosure are directed towards a microelectromechanical system (MEMS) device. The MEMS device includes a first dielectric structure disposed over a first semiconductor substrate, where the first dielectric structure at least partially defines a cavity. A second semiconductor substrate is disposed over the first dielectric structure and includes a movable mass, where opposite sidewalls of the movable mass are disposed between opposite sidewall of the cavity. A first piezoelectric anti-stiction structure is disposed between the movable mass and the first dielectric structure, wherein the first piezoelectric anti-stiction structure includes a first piezoelectric structure and a first electrode disposed between the first piezoelectric structure and the first dielectric structure.
Abstract:
Various embodiments of the present disclosure are directed towards an integrated chip including a first conductive structure and a second conductive structure. A dielectric structure is arranged between the first conductive structure and the second conductive structure. The dielectric structure comprises an upper region over a lower region. The lower region comprises a first lateral surface and a second lateral surface on opposing sides of the upper region. A passivation layer overlies the second conductive structure and the dielectric structure. The passivation layer comprises a lateral segment contacting the first lateral surface. A height of the lateral segment is greater than a height of the upper region. A top surface of the lateral segment is below a top surface of the passivation layer.
Abstract:
A method for manufacturing a semiconductor structure is provided, wherein the method includes the following operations. A substrate having a transistor is received, wherein the transistor includes a channel region and a gate on a first side of the channel region. A second side of the channel region of the transistor is exposed, wherein the second side is opposite to the first side. A metal oxide is formed on the second side of the channel region of the transistor, wherein the metal oxide contacts the channel region and is exposed to the environment. A semiconductor structure and an operation of a semiconductor structure thereof are also provided.
Abstract:
A method of fabricating a semiconductor structure includes: providing a first wafer; providing a second wafer having a first surface and a second surface opposite to the first surface; contacting the first surface of the second wafer with the first wafer; and forming a plurality of scribe lines on the second surface of the second wafer; wherein the plurality of scribe lines protrudes from a third surface of the second wafer, and the third surface is between the first surface and the second surface.
Abstract:
MEMS devices and methods of fabrication thereof are described. In one embodiment, the MEMS device includes a bottom alloy layer disposed over a substrate. An inner material layer is disposed on the bottom alloy layer, and a top alloy layer is disposed on the inner material layer, the top and bottom alloy layers including an alloy of at least two metals, wherein the inner material layer includes the alloy and nitrogen. The top alloy layer, the inner material layer, and the bottom alloy layer form a MEMS feature
Abstract:
A method for testing a partially fabricated bio-sensor device wafer includes aligning the partially fabricated bio-sensor device wafer on a wafer stage of a wafer-level bio-sensor processing tool. The method further includes mounting an integrated electro-microfluidic probe card to a device area on the partially fabricated bio-sensor device wafer, wherein the electro-microfluidic probe card has a first major surface. The method further includes electrically connecting one or more electronic probe tips disposed on the first major surface of the integrated electro-microfluidic probe card to conductive areas of the device area. The method further includes flowing a test fluid from a fluid supply to the integrated electro-microfluidic probe card. The method further includes electrically measuring via the one or more electronic probe tips a first electrical property of one or more bio-FETs of the device area based on the test fluid flow.