Abstract:
A device and method for providing clock data recovery (CDR) in a receiver is disclosed. The method comprises receiving a Phase Amplitude Modulation (PAM) signal; on startup, using a non-return-to-zero (NRZ)-based phase frequency detector (PFD) to acquire signal frequency from the received PAM signal; and responsive to a determination, switching to a PAM phase detector (PD) for steady state operation.
Abstract:
A relaxation oscillator reduces temperature sensitivity and phase noise at low offset frequency by periodically swapping a first current and a second current so that after the first current has been input to a first pair of circuits and the second current has been input to a second pair of circuits, the second current is input to the first pair of circuits and the first current is input to the second pair of circuits.
Abstract:
For producing a low-power, low-phase noise oscillating signal using a self-injection locking oscillator, examples include: producing, using an oscillator, a signal having a base frequency component and an Nth harmonic component, in which N is a selected integer and N>1; filtering the signal through a bandpass filter with Q factor ≥5, the filter configured to pass the Nth harmonic component as a filtered Nth harmonic component; and injecting the filtered Nth harmonic component into the oscillator to self-injection lock the base frequency of the signal.
Abstract:
An oscillator is provided with an oscillator circuit having tank circuit terminals for coupling to a tank circuit. A microelectromechanical system (MEMS) resonator serves as a tank circuit. The MEMS resonator is coupled to the oscillator circuit using a transformer with a primary coil coupled to the oscillator tank circuit terminals and a secondary coil coupled to the MEMS resonator terminals, wherein the transformer has a turns ratio of N:1 and N is greater than 1.
Abstract:
Disclosed examples include fractional frequency divider circuits, including a counter to provide phase shifted pulse output signals in response to counting of an adjustable integer number NK cycles of an input clock signal, an output circuit to provide an output clock signal having a first edge between first edges of the pulse output signals, as well as a delta-sigma modulator (DSM), clocked by the second pulse output signal to receive a first predetermined value and to provide a DSM output value, and a phase accumulator to receive a step input value representing a sum of the DSM output value and a second predetermined value. The phase accumulator provides a divisor input signal to the counter, and provides a phase adjustment value to the output circuit to control the position of the first edge of the output clock signal between the first edges of the pulse output signals.
Abstract:
The systems and methods of oscillator frequency tuning using a bulk acoustic wave resonator include a relaxation oscillator, a BAW oscillator, a frequency counter, and an adjustment module. The BAW oscillator provides an accurate time reference even over temperature changes. The BAW oscillator is turned on periodically and the relaxation oscillator is calibrated with the BAW oscillator. A temporary and periodic enablement of the BAW oscillator maintains a low current consumption. The frequency counter counts a number of full periods of the BAW oscillator that occur in one period of the relaxation oscillator. Since each frequency is known, the number of pulses of the BAW oscillator that should occur during one period of the relaxation oscillator is known. If the count is different from what should be counted, a correction may be made by adjusting an input parameter of the relaxation oscillator.
Abstract:
A Continuous Time Linear Equalizer (CTLE) and a method of operating a CTLE in a receiver for a Pulse Amplitude Modulation (PAM) signal are disclosed. The method includes initiating equalization using an initial equalization setting that is optimized to meet a first objective and responsive to a determination, shifting to a final equalization setting that is optimized to meet a second objective.
Abstract:
The present disclosure describes a low-power, low-phase-noise (LPLPN) oscillator. The LPLPN oscillator includes a resonator load, an amplifier stage, and a loop gain control circuit. The resonator load is structured to resonate at a primary resonant frequency. The amplifier stage is coupled with the resonator load to develop a loop gain that peaks at the primary resonant frequency. The loop gain control circuit is coupled with the amplifier stage, and it is structured to regulate the loop gain for facilitating the amplifier stage to generate an oscillation signal at the primary resonant frequency and suppress a noise signal at a parasitic parallel resonant frequency (PPRF).
Abstract:
A relaxation oscillator reduces temperature sensitivity and phase noise at low offset frequency by periodically swapping a first current and a second current so that after the first current has been input to a first pair of circuits and the second current has been input to a second pair of circuits, the second current is input to the first pair of circuits and the first current is input to the second pair of circuits.
Abstract:
Broadband ultrasound transducers and related methods are disclosed herein. An example ultrasonic transducer disclosed herein includes a substrate and a first membrane supported by the substrate. The first membrane is to exhibit a first frequency response when oscillated. The example ultrasonic transducer includes a second membrane supported by the substrate. The second membrane is to exhibit a second frequency response different from the first frequency response when oscillated. The example ultrasonic transducer includes a third membrane supported by the substrate. The third membrane is to exhibit one of the second frequency response or a third frequency response different from the first frequency response and the second frequency response when oscillated. A shape of the first membrane is to differ from a shape of the second membrane and a shape of the third membrane.