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公开(公告)号：US10546996B2
公开(公告)日：2020-01-28
申请号：US15664513
申请日：2017-07-31
发明人： Chun-Chieh Mo , Tsai-Hao Hung , Shih-Chi Kuo
摘要： A magnetoresistive random access memory (MRAM) structure and a method of forming the same are provided. The MRAM structure includes a conductive pillar over a substrate, a first MTJ spacer and a first conductive layer. The first MTJ spacer surrounds the conductive pillar. The first conductive layer surrounds the first MTJ spacer. The first magnetic tunnel junction (MTJ) spacer includes a first electrode, a second electrode and a magnetic tunnel junction (MTJ) layer. The first electrode is in contact with the conductive pillar and the substrate. The second electrode is positioned over the first electrode and in contact with the first conductive layer. The magnetic tunnel junction (MTJ) layer is positioned between the first electrode and the second electrode.
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公开(公告)号：US20190293867A1
公开(公告)日：2019-09-26
申请号：US16378313
申请日：2019-04-08
发明人： Tao-Cheng LIU , Tsai-Hao Hung , Shih-Chi Kuo
IPC分类号： G02B6/136 , H01L21/306 , G02B6/122 , H01L21/308
摘要： A method includes: forming a first plurality of tiers that each comprises first and second dummy layers over a substrate, wherein within each tier, the second dummy layer is disposed above the first dummy layer; forming a second plurality of recessed regions in the first plurality of tiers, wherein at least one subgroup of the second plurality of recessed regions extend through respective different numbers of the second dummy layers; and performing an etching operation to concurrently forming a third plurality of trenches with respective different depths in the substrate through the at least one subgroup of the second plurality of recessed regions.
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公开(公告)号：US09647022B2
公开(公告)日：2017-05-09
申请号：US14620460
申请日：2015-02-12
发明人： Tsai-Hao Hung , Han-Tang Lo , Shih-Chi Kuo , Tsung-Hsien Lee
IPC分类号： H01L21/266 , H01L21/761 , H01L21/265 , H01L27/146
CPC分类号： H01L27/1463 , H01L21/26533 , H01L21/266 , H01L21/761 , H01L27/1461 , H01L27/14614 , H01L27/14643 , H01L27/14689 , H01L2221/1026
摘要： The present disclosure relates to a method of forming a masking structure having a trench with a high aspect ratio, and an associated structure. In some embodiments, the method is performed by forming a first material over a substrate. The first material is selectively etched and a second material is formed onto the substrate at a position abutting sidewalls of the first material, resulting in a pillar of sacrificial material surrounded by a masking material. The pillar of sacrificial material is removed, resulting in a masking layer having a trench that extends into the masking material. Using the pillar of sacrificial material during formation of the trench allows the trench to have a high aspect ratio. For example, the sacrificial material allows for a plurality of masking layers to be iteratively formed to have laterally aligned openings that collectively form a trench extending through the masking layers.
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公开(公告)号：US11955501B2
公开(公告)日：2024-04-09
申请号：US17805573
申请日：2022-06-06
发明人： Shih-Yu Liao , Tsai-Hao Hung , Ying-Hsun Chen
IPC分类号： H01L27/146 , G01J1/44 , H04N25/70
CPC分类号： H01L27/1464 , G01J1/44 , H01L27/14621 , H01L27/14627 , H01L27/14629 , H01L27/1463 , H01L27/14634 , H01L27/14636 , H01L27/14685 , H04N25/70 , G01J2001/448
摘要： The present disclosure describes a method for the formation of mirror micro-structures on radiation-sensing regions of image sensor devices. The method includes forming an opening within a front side surface of a substrate; forming a conformal implant layer on bottom and sidewall surfaces of the opening; growing a first epitaxial layer on the bottom and the sidewall surfaces of the opening; depositing a second epitaxial layer on the first epitaxial layer to fill the opening, where the second epitaxial layer forms a radiation-sensing region. The method further includes depositing a stack on exposed surfaces of the second epitaxial layer, where the stack includes alternating pairs of a high-refractive index material layer and a low-refractive index material layer.
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公开(公告)号：US11796396B2
公开(公告)日：2023-10-24
申请号：US17216047
申请日：2021-03-29
发明人： Tsai-Hao Hung , Shih-Chi Kuo
CPC分类号： G01K7/32 , B81B3/0008 , B81C1/00944 , B81B2201/0278 , B81B2203/0136 , B81B2203/04 , B81C2201/013 , B81C2201/0105 , B81C2201/0116
摘要： The structure of a micro-electro-mechanical system (MEMS) thermal sensor and a method of fabricating the MEMS thermal sensor are disclosed. A method of fabricating a MEMS thermal sensor includes forming first and second sensing electrodes with first and second electrode fingers, respectively, on a substrate and forming a patterned layer with a rectangular cross-section between a pair of the first electrode fingers. The first and second electrode fingers are formed in an interdigitated configuration and suspended above the substrate. The method further includes modifying the patterned layer to have a curved cross-section between the pair of the first electrode fingers, forming a curved sensing element on the modified patterned layer to couple to the pair of the first electrodes, and removing the modified patterned layer.
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公开(公告)号：US11688754B2
公开(公告)日：2023-06-27
申请号：US16867873
申请日：2020-05-06
发明人： Tsai-Hao Hung , Tao-Cheng Liu , Ying-Hsun Chen
IPC分类号： H01L27/146
CPC分类号： H01L27/14643 , H01L27/1462 , H01L27/1464 , H01L27/14627 , H01L27/14629 , H01L27/14634 , H01L27/14636 , H01L27/14685
摘要： Photonic devices and methods having an increased quantum effect length are provided. In some embodiments, a photonic device includes a substrate having a first surface. A cavity extends into the substrate from the first surface to a second surface. A semiconductor layer is disposed on the second surface in the cavity of the substrate, and a cover layer is disposed on the semiconductor layer. The semiconductor layer is configured to receive incident radiation through the substrate and to totally internally reflect the radiation at an interface between the semiconductor layer and the cover layer.
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公开(公告)号：US11611039B2
公开(公告)日：2023-03-21
申请号：US17405907
申请日：2021-08-18
发明人： Tsai-Hao Hung , Shih-Chi Kuo
摘要： A memory includes: a first electrode comprising a top boundary and a sidewall; a resistive material layer, disposed above the first electrode, that comprises at least a first portion and a second portion coupled to a first end of the first portion, wherein the resistive material layer presents a variable resistance value; and a second electrode disposed above the resistive material layer.
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公开(公告)号：US11107986B2
公开(公告)日：2021-08-31
申请号：US16834232
申请日：2020-03-30
发明人： Tsai-Hao Hung , Shih-Chi Kuo
摘要： A memory includes: a first electrode comprising a top boundary and a sidewall; a resistive material layer, disposed above the first electrode, that comprises at least a first portion and a second portion coupled to a first end of the first portion, wherein the resistive material layer presents a variable resistance value; and a second electrode disposed above the resistive material layer.
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公开(公告)号：US10928590B2
公开(公告)日：2021-02-23
申请号：US16856581
申请日：2020-04-23
发明人： Tao-Cheng Liu , Tsai-Hao Hung , Shih-Chi Kuo
IPC分类号： G02B6/136 , G02B6/122 , H01L21/308 , H01L21/306 , G02B5/18
摘要： A method includes: forming a first plurality of tiers that each comprises first and second dummy layers over a substrate, wherein within each tier, the second dummy layer is disposed above the first dummy layer; forming a second plurality of recessed regions in the first plurality of tiers, wherein at least one subgroup of the second plurality of recessed regions extend through respective different numbers of the second dummy layers; and performing an etching operation to concurrently forming a third plurality of trenches with respective different depths in the substrate through the at least one subgroup of the second plurality of recessed regions.
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公开(公告)号：US10276791B1
公开(公告)日：2019-04-30
申请号：US15965881
申请日：2018-04-28
发明人： Tsai-Hao Hung , Shih-Chi Kuo
摘要： A memory includes: a first electrode comprising a top boundary and a sidewall; a resistive material layer, disposed above the first electrode, that comprises at least a first portion and a second portion coupled to a first end of the first portion; and a second electrode disposed above the resistive material layer, wherein the first portion of the resistive material layer extends along the top boundary of the first electrode and the second portion of the resistive material layer extends along an upper portion of the sidewall of the first electrode.
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