公开(公告)号：US06407432B1

公开(公告)日：2002-06-18

申请号：US09446846

申请日：1999-12-29

申请人： Minehiro Nemoto ,  Yasuyuki Kojima ,  Nobuyasu Kanekawa ,  Seigou Yukutake ,  Katsuhiro Furukawa

发明人： Minehiro Nemoto ,  Yasuyuki Kojima ,  Nobuyasu Kanekawa ,  Seigou Yukutake ,  Katsuhiro Furukawa

IPC分类号： H01L2701

CPC分类号： H01L21/76264 ,  H01L21/7624 ,  H01L21/76283 ,  H01L21/76291 ,  H01L23/49541 ,  H01L23/642 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48247 ,  H01L2224/48464 ,  H01L2224/49175 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01079 ,  H01L2924/10161 ,  H01L2924/12043 ,  H01L2924/13091 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/05599 ,  H01L2224/85399

摘要： A small sized semiconductor device having a high insulating performance between a primary side circuit and a secondary side circuit is realized. A circuit region 2, plural first and second terminal electrodes 5 connected to the circuit region 3, and an insulation-separation region 4 for separating electrically the first terminal electrodes from the second terminal electrodes, and for transmitting signals between the first and the second terminal electrodes are formed onto a semiconductor chip 1, and the insulation-separation region 4 is provided between the first and second terminal electrodes. The interval between the first and the second terminal electrodes on the same semiconductor chip can be separated with high insulating performance.

摘要翻译： 实现了在初级侧电路和次级侧电路之间具有高绝缘性能的小尺寸半导体器件。 电路区域2，连接到电路区域3的多个第一和第二端子电极5以及用于将第一端子电极与第二端子电极分离并用于在第一和第二端子之间传输信号的绝缘分离区域4 电极形成在半导体芯片1上，并且绝缘分离区域4设置在第一和第二端子电极之间。 相同半导体芯片上的第一和第二端子电极之间的间隔可以以高绝缘性能分离。

公开(公告)号：US6092217A

公开(公告)日：2000-07-18

申请号：US962879

申请日：1997-11-03

申请人： Nobuyasu Kanekawa ,  Shoji Suzuki ,  Yoshimichi Sato ,  Korefumi Tashiro ,  Keisuke Bekki ,  Hiroshi Sato ,  Makoto Nohmi ,  Shinya Ohtsuji

发明人： Nobuyasu Kanekawa ,  Shoji Suzuki ,  Yoshimichi Sato ,  Korefumi Tashiro ,  Keisuke Bekki ,  Hiroshi Sato ,  Makoto Nohmi ,  Shinya Ohtsuji

IPC分类号： G05B9/03 ,  G06F11/00 ,  G06F11/08 ,  G06F11/16 ,  G06F11/18 ,  G06F11/20 ,  G06F11/267 ,  G06F7/02 ,  H04L1/00

CPC分类号： G06F11/0763 ,  G05B9/03 ,  G06F11/085 ,  G06F11/1695 ,  G06F11/188 ,  G06F11/2023 ,  G06F11/2035 ,  G06F11/2215 ,  G06F11/008 ,  G06F11/0796 ,  G06F11/18

摘要： A self-checking circuit, which is useful for a highly reliable system configuration, includes a logic circuit having an error detection function. For function blocks for feeding out a plurality of signals that are at least duplexed, the logic circuit compares the output signals of the function blocks, and detects an error on the basis of results of the comparison. The logic circuit comprises synthesizing means provided to superimpose inherent waveforms assigned in advance to the respective output signals of the function blocks onto the output signals of one of the function blocks. The inherent waveforms are orthogonal waveforms generated by an orthogonal waveform generator circuit. The logic circuit also comprises comparison means for comparing a signal output of the synthesizing means with the signal output of the other function block to detect an error. The whole circuit including the function blocks are judged normal only if the waveforms inherent to both output signals exist.

摘要翻译： 对于高度可靠的系统配置有用的自检电路包括具有错误检测功能的逻辑电路。 对于用于输出至少双工的多个信号的功能块，逻辑电路比较功能块的输出信号，并且基于比较的结果来检测错误。 逻辑电路包括合成装置，用于将预先分配的固有波形与功能块的各个输出信号叠加到一个功能块的输出信号上。 固有波形是由正交波形发生器电路产生的正交波形。 逻辑电路还包括比较装置，用于将合成装置的信号输出与另一功能块的信号输出进行比较，以检测误差。 包括功能块的整个电路仅在存在两个输出信号固有的波形时才被判定为正常。

公开(公告)号：US5802266A

公开(公告)日：1998-09-01

申请号：US323094

申请日：1994-10-14

申请人： Nobuyasu Kanekawa ,  Shoji Suzuki ,  Yoshimichi Sato ,  Korefumi Tashiro ,  Keisuke Bekki ,  Hiroshi Sato ,  Makoto Nohmi ,  Shinya Ohtsuji

发明人： Nobuyasu Kanekawa ,  Shoji Suzuki ,  Yoshimichi Sato ,  Korefumi Tashiro ,  Keisuke Bekki ,  Hiroshi Sato ,  Makoto Nohmi ,  Shinya Ohtsuji

IPC分类号： G05B9/03 ,  G05B13/02 ,  G06F11/00 ,  G06F11/08 ,  G06F11/16 ,  G06F11/18 ,  G06F11/20 ,  G06F11/267 ,  G06F17/50 ,  H03K19/007 ,  G06F7/02 ,  H04L1/00

CPC分类号： G05B9/03 ,  G06F11/0763 ,  G06F11/085 ,  G06F11/1608 ,  G06F11/1695 ,  G06F11/188 ,  G06F11/2215 ,  G06F11/0796

摘要： A self-checking circuit, which is useful for a highly reliable system configuration, includes a logic circuit having an error detection function. For function blocks for feeding out a plurality of signals that are at least duplexed, the logic circuit compares the output signals of the function blocks, and detects an error on the basis of results of the comparison. The logic circuit comprises synthesizing circuitry provided to superimpose inherent waveforms assigned in advance to the respective output signals of the function blocks onto the output signals of one of the function blocks. The inherent waveforms are orthogonal waveforms generated by an orthogonal waveform generator circuit. The logic circuit also compares the output signals having the superimposed inherent waveforms with the signal output of the other function block to detect an error. The whole circuit including the function blocks are judged normal only if the waveforms inherent to both output signals exist.

摘要翻译： 对于高度可靠的系统配置有用的自检电路包括具有错误检测功能的逻辑电路。 对于用于输出至少双工的多个信号的功能块，逻辑电路比较功能块的输出信号，并且基于比较的结果来检测错误。 逻辑电路包括合成电路，用于将预先分配的固有波形叠加到功能块的各个输出信号到功能块之一的输出信号上。 固有波形是由正交波形发生器电路产生的正交波形。 逻辑电路还将具有叠加的固有波形的输出信号与另一功能块的信号输出进行比较，以检测错误。 包括功能块的整个电路仅在存在两个输出信号固有的波形时才被判定为正常。

公开(公告)号：US08717017B2

公开(公告)日：2014-05-06

申请号：US12708259

申请日：2010-02-18

申请人： Mutsumi Suzuki ,  Nobuyasu Kanekawa ,  Masamichi Yamada

发明人： Mutsumi Suzuki ,  Nobuyasu Kanekawa ,  Masamichi Yamada

IPC分类号： G01R33/02

CPC分类号： G01R33/091 ,  G01D1/00 ,  G01D15/00 ,  G01D21/00

摘要： There has been a problem that a bridge circuit using magneto-resistive elements or transducer elements could output a signal including an offset voltage, which could result in lower measurement accuracy. In order to solve such a problem, half-bridges each having magneto-resistive elements or transducer elements are excited with different excitation voltages so that the offset voltage is eliminated and the measurement accuracy is improved.

摘要翻译： 存在使用磁阻元件或换能器元件的桥式电路可以输出包括偏移电压的信号的问题，这可能导致较低的测量精度。 为了解决这样的问题，具有磁阻元件或换能器元件的半桥被不同的激励电压激励，从而消除了偏移电压，提高了测量精度。

公开(公告)号：US08589612B2

公开(公告)日：2013-11-19

申请号：US13106788

申请日：2011-05-12

申请人： Hiromichi Yamada ,  Kotaro Shimamura ,  Nobuyasu Kanekawa ,  Yuichi Ishiguro

发明人： Hiromichi Yamada ,  Kotaro Shimamura ,  Nobuyasu Kanekawa ,  Yuichi Ishiguro

IPC分类号： G06F13/24

CPC分类号： G06F13/24 ,  G06F11/1641 ,  G06F2201/845

摘要： A computer system which shortens standby time of CPUs and improves CPU processing efficiency of a performance mode upon switching from the performance mode (parallel operation) to a safety mode (master/checker operation) is provided. In a computer system including: at least two CPUs; a programmable interrupt controller for interrupting the CPUs; and a comparator for mutually comparing outputs of the CPUs, switching between the performance mode of executing mutually different processes by the CPUs, respectively, to improve performance and the safety mode of executing mutually the same processes by the CPUs and collating results by the comparator to detect failure can be carried out; CPUs to be interrupted can be set for each interrupt factor; and whether the performance mode is to be executed or the safety mode is to be executed can be set for each interrupt factor.

摘要翻译： 提供一种缩短CPU的待机时间并提高从性能模式（并行操作）切换到安全模式（主/检测器操作）时的CPU处理效率的计算机系统。 在一个计算机系统中，包括：至少两个CPU; 用于中断CPU的可编程中断控制器; 以及比较器，用于相互比较CPU的输出，分别由CPU执行相互不同的处理的性能模式之间进行切换，以提高CPU的性能和执行相同处理的安全模式，并将比较器的结果进行比较 检测失败可以进行; 可以为每个中断因子设置要中断的CPU; 并且可以针对每个中断因子来设置执行性能模式还是执行安全模式。

公开(公告)号：US08421441B2

公开(公告)日：2013-04-16

申请号：US12868236

申请日：2010-08-25

申请人： Teppei Hirotsu ,  Nobuyasu Kanekawa ,  Itaru Tanabe

发明人： Teppei Hirotsu ,  Nobuyasu Kanekawa ,  Itaru Tanabe

IPC分类号： G01R19/00

CPC分类号： G01R19/0092 ,  H03K17/0822

摘要： A current-controlled semiconductor device is provided which corrects fluctuations of both gain and offset of a current detection circuit to thereby enable high-accuracy current detection within a single-chip IC. The current-controlled semiconductor device is provided on the same semiconductor chip with a MOSFET, two constant current sources, and a current detection circuit which detects a current of the MOSFET and currents of the constant current sources. Further, the constant current sources are equipped with an external connecting terminal for measuring their current values. A correction measured-value holding register holds therein the current values of the constant current sources, which have been measured from outside.

摘要翻译： 提供一种电流控制半导体器件，其校正电流检测电路的增益和偏移的波动，从而使得能够在单芯片IC内进行高精度电流检测。 电流控制半导体器件设置在具有MOSFET，两个恒定电流源的同一半导体芯片上，以及检测MOSFET的电流和恒流源的电流的电流检测电路。 此外，恒流源配备有用于测量其电流值的外部连接端子。 校正测量值保持寄存器保持从外部测量的恒流源的当前值。

公开(公告)号：US20130057245A1

公开(公告)日：2013-03-07

申请号：US13557793

申请日：2012-07-25

申请人： Teppei HIROTSU ,  Nobuyasu Kanekawa ,  Ryosuke Ishida ,  Tsutomu Yamada ,  Chihiro Sato

发明人： Teppei HIROTSU ,  Nobuyasu Kanekawa ,  Ryosuke Ishida ,  Tsutomu Yamada ,  Chihiro Sato

IPC分类号： G05F3/02

CPC分类号： H02M7/53803 ,  H02M3/1588 ,  H02M7/5395 ,  H02M2001/0009 ,  Y02B70/1466

摘要： A current regulator has a current regulating semiconductor device and a microcontroller which outputs a PWM pulse for driving a load to the current regulating semiconductor device and receives outputs of a high-side current detection circuit and a low-side current detection circuit from the current regulating semiconductor device. An output mixer of the current regulating semiconductor device switches, in synchronization with the PWM pulse, between the output of the high-side current detection circuit and the output of the low-side current detection circuit on one signal line to output the output to the microcontroller.

摘要翻译： 电流调节器具有电流调节半导体器件和微控制器，其输出用于将负载驱动到电流调节半导体器件的PWM脉冲，并且从电流调节器接收高侧电流检测电路和低侧电流检测电路的输出 半导体器件。 电流调节半导体装置的输出混频器与PWM脉冲同步地在高边电流检测电路的输出和低端电流检测电路的输出之间切换，以将输出输出到 微控制器

公开(公告)号：US08291188B2

公开(公告)日：2012-10-16

申请号：US12706938

申请日：2010-02-17

申请人： Hiromichi Yamada ,  Yuichi Ishiguro ,  Nobuyasu Kanekawa

发明人： Hiromichi Yamada ,  Yuichi Ishiguro ,  Nobuyasu Kanekawa

IPC分类号： G06F12/12

CPC分类号： G06F11/1641 ,  G06F11/1683

摘要： A microcontroller in which respective CPUs execute different applications so as to improve processing performance, and the respective CPUs execute an application that requires safety and mutually compare the results thereof so as to enhance the reliability of write data is provided. The microcontroller has a plurality of processing systems made up of a first CPU, a second CPU, a first memory and a second memory, and for the instruction processing about specific processing set in advance, the write to peripheral modules which are not multiplexed is executed twice, and the write data of the first time and the second time are mutually collated.

摘要翻译： 其中相应CPU执行不同应用以提高处理性能的微控制器，并且相应的CPU执行需要安全性并相互比较其结果的应用，以提供写入数据的可靠性。 微控制器具有由第一CPU，第二CPU，第一存储器和第二存储器构成的多个处理系统，并且对于关于预先设定的特定处理的指令处理，执行未复用的对外围模块的写入 两次，并且第一次和第二次的写入数据被相互整理。

公开(公告)号：US08198847B2

公开(公告)日：2012-06-12

申请号：US12638045

申请日：2009-12-15

申请人： Tadahiko Chida ,  Akira Mishima ,  Nobuyasu Kanekawa

发明人： Tadahiko Chida ,  Akira Mishima ,  Nobuyasu Kanekawa

IPC分类号： G05B5/00

CPC分类号： H02M1/126 ,  H02P29/50

摘要： A brushless motor system which can suppress adverse influences of electromagnetic noise without increasing the size and enhancing the performance of a filter circuit. In a brushless motor system comprising a brushless motor, an inverter, and a direct current power source, a noise return line for returning a noise current is connected between the brushless motor and the inverter. The noise current is generated in the inverter and reaches the brushless motor. With the provision of the noise return line, a common mode current leaking from the brushless motor to a ground can be reduced.

摘要翻译： 一种无刷电机系统，可以抑制电磁噪声的不利影响，而不会增加滤波电路的尺寸，提高滤波电路的性能。 在包括无刷电动机，逆变器和直流电源的无刷电动机系统中，用于返回噪声电流的噪声返回线连接在无刷电动机和逆变器之间。 在变频器中产生噪声电流并到达无刷电机。 通过设置噪声回馈线，可以减少从无刷电动机泄漏到地面的共模电流。

公开(公告)号：US07207314B2

公开(公告)日：2007-04-24

申请号：US11171263

申请日：2005-07-01

申请人： Kohei Sakurai ,  Minoru Ohsuga ,  Nobuyasu Kanekawa ,  Masatoshi Hoshino ,  Atsushi Kanke ,  Yutaka Nishimura ,  Mitsuru Watabe ,  Noriyoshi Urushiwara

发明人： Kohei Sakurai ,  Minoru Ohsuga ,  Nobuyasu Kanekawa ,  Masatoshi Hoshino ,  Atsushi Kanke ,  Yutaka Nishimura ,  Mitsuru Watabe ,  Noriyoshi Urushiwara

IPC分类号： F02M69/48 ,  G01F1/68

CPC分类号： F02M35/10249 ,  F01P2050/30 ,  F02D9/02 ,  F02D9/105 ,  F02D41/3005 ,  F02D2400/18 ,  F02M35/10019 ,  F02M35/10321 ,  F02M35/10347 ,  F02M35/1038 ,  F02M35/10386

摘要： An engine electronic control unit is inserted through a through hole provided in an intake pipe and mounted in an intake air passage in a direction substantially perpendicularly with respect to a plane of the intake pipe forming the intake air passage. This unit is then secured to the intake pipe using a fixing flange provided at a connector portion. A fixing rail is protruded inside the intake pipe and leading edges of a metal base and a metal cover of the unit are inserted into this rail, thereby securing in position an end opposite to a side of the connector portion of the unit. This realizes an engine electronic control unit offering an outstanding heat radiation performance and vibration resistance, without having to provide special heat radiating parts or without involving an increase in an intake air resistance within the intake air passage. By using such an engine electronic control unit, it is possible to provide a low-cost, compact engine air intake system.

摘要翻译： 引擎电子控制单元通过设置在进气管中的通孔插入，并且相对于形成进气通道的进气管的平面基本垂直地安装在进气通道中。 然后使用设置在连接器部分处的固定凸缘将该单元固定到进气管。 进气管内部突出有固定导轨，将金属底座的前缘和单元的金属盖插入该导轨中，从而将与该单元的连接器部分侧相反的一端固定。 这实现了发动机电子控制单元，其提供优异的散热性能和抗振动性，而不必提供特殊的散热部件或不涉及增加进气通道内的进气阻力。 通过使用这样的发动机电子控制单元，可以提供低成本，紧凑的发动机进气系统。