Method for driving electro-optical device, electro-optical device and electronic equipment
    22.
    发明申请
    Method for driving electro-optical device, electro-optical device and electronic equipment 失效
    电光装置,电光装置和电子设备的驱动方法

    公开(公告)号:US20050104816A1

    公开(公告)日:2005-05-19

    申请号:US10959999

    申请日:2004-10-08

    摘要: Aspects of the invention can provide a method for driving an electro-optical device, an electro-optical device and electronic equipment that can solve the insufficient supply of the data current and current fluctuation. In the driving method, a data current can be applied to a plurality of pixels provided to a display panel unit with same value through the data line regardless of grayscale data. Upon supply of the data current, in the pixel, a transistor selected in reproduction can be turned on such that a drive current corresponding to the data current output from a driving transistor is supplied to an organic EL element, thereby emitting light. A light-off signal can be supplied to the pixel at predetermined timing such that the organic EL element emits light only in the light-emitting period computed based on the grayscale data. The pixel to which a constant data current can be supplied emits light at a luminance corresponding to the grayscale data by changing the light-emitting period corresponding to the grayscale data.

    摘要翻译: 本发明的方面可以提供一种驱动电光装置,电光装置和电子设备的方法,其可以解决数据电流和电流波动不足的供给。 在驱动方法中,无论灰度数据如何,都可以通过数据线将数据电流应用于提供给具有相同值的显示面板单元的多个像素。 在提供数据电流时,在像素中,可以接通在再现中选择的晶体管,使得与驱动晶体管输出的数据电流相对应的驱动电流被提供给有机EL元件,从而发光。 可以在预定定时向像素提供点灯信号,使得有机EL元件仅在基于灰度数据计算的发光周期中发光。 可以提供恒定数据电流的像素通过改变对应于灰度数据的发光周期而以与灰度级数据相对应的亮度发光。

    Active-matrix driving device, electrostatic capacitance detection device, and electronic equipment
    23.
    发明申请
    Active-matrix driving device, electrostatic capacitance detection device, and electronic equipment 有权
    有源矩阵驱动装置,静电电容检测装置和电子设备

    公开(公告)号:US20050083768A1

    公开(公告)日:2005-04-21

    申请号:US10916620

    申请日:2004-08-12

    申请人: Hiroyuki Hara

    发明人: Hiroyuki Hara

    CPC分类号: G11C11/22 G06K9/0002

    摘要: Aspects of the invention are intended to stabilize the initial state of an active matrix so as to reduce unnecessary power consumption and stabilize the operation. The driving device can include a selection device that is coupled to any of a plurality of row direction lines and any of a plurality of column direction lines, and by which a selected state and a non-selected state of the row direction lines or the column direction lines are switched to each other. The driving device can also include a device that switches to the non-selected state that switches the selection device coupled to the row direction lines or the selection device coupled to the column direction lines to a non-selected state. Selection by the selection device can be implemented after the selection device is switched to a non-selected state by the device that switches to the non-selected state.

    摘要翻译: 本发明的目的在于稳定有源矩阵的初始状态,以减少不必要的功耗并稳定操作。 驱动装置可以包括选择装置,其耦合到多个行方向线中的任一个和多个列方向线中的任一个,并且通过该选择装置选择状态和未选择的行方向线或列的状态 方向线彼此切换。 驱动装置还可以包括切换到非选择状态的装置,其将耦合到行方向线的选择装置或耦合到列方向线的选择装置切换到未选择状态。 选择装置的选择可以在切换到非选择状态的装置切换到非选择状态之后实现。

    Electrostatic capacitance detection device
    24.
    发明申请
    Electrostatic capacitance detection device 有权
    静电电容检测装置

    公开(公告)号:US20050078856A1

    公开(公告)日:2005-04-14

    申请号:US10925031

    申请日:2004-08-25

    IPC分类号: G01B7/28 A61B5/117 G06K9/00

    CPC分类号: G06K9/0002

    摘要: Aspects of the invention provide a superior electrostatic capacitance detecting device. The electrostatic capacitance detection device can include M number of row lines, N number of column lines, and electrostatic capacitance detecting devices formed at intersections of these lines. The electrostatic capacitance detecting element can include a signal detection element, a signal amplifying element, a column selecting element, and a row selecting element, and the signal detection element can include a capacitance detecting electrode, a capacitance detecting dielectric layer, and a reference capacitor, and one electrode of the reference capacitor connects to a column line.

    摘要翻译: 本发明提供一种优良的静电电容检测装置。 静电电容检测装置可以包括M行行线,N列列线和在这些线的交点处形成的静电电容检测装置。 静电电容检测元件可以包括信号检测元件,信号放大元件,列选择元件和行选择元件,并且信号检测元件可以包括电容检测电极,电容检测电介质层和参考电容器 ,参考电容器的一个电极连接到列线。

    Capacitance detection apparatus, driving method for the same, fingerprint sensor, and biometric authentication apparatus
    25.
    发明申请
    Capacitance detection apparatus, driving method for the same, fingerprint sensor, and biometric authentication apparatus 有权
    电容检测装置,其驱动方法,指纹传感器和生物体认证装置

    公开(公告)号:US20050062485A1

    公开(公告)日:2005-03-24

    申请号:US10911674

    申请日:2004-08-05

    申请人: Hiroyuki Hara

    发明人: Hiroyuki Hara

    CPC分类号: G06K9/0002

    摘要: Aspects of the invention can provide a fingerprint sensor with high sensing precision. The fingerprint sensor according to the invention can include capacitance detection circuits that output detection signals, which each correspond to a capacitance formed between a subject surface and the fingerprint sensor, to signal transmitting paths, and an amplification circuit that amplifies the detection signals outputted to the signal transmitting paths. The individual signal transmitting paths can be respectively connected to at least two capacitance detection circuits and the fingerprint sensor further includes a resetting means that resets the potential of the signal transmitting paths before the detection signals are outputted from the capacitance detection circuits to the signal transmitting paths.

    摘要翻译: 本发明的方面可以提供具有高感测精度的指纹传感器。 根据本发明的指纹传感器可以包括电容检测电路,其输出检测信号,每个检测信号各自对应于在被摄体表面和指纹传感器之间形成的电容,用于信号传送路径;以及放大电路,放大输出到 信号传输路径。 各个信号传输路径可以分别连接到至少两个电容检测电路,并且指纹传感器还包括复位装置,其在检测信号从电容检测电路输出到信号传输路径之前复位信号传输路径的电位 。

    Semiconductor memory device
    28.
    发明授权

    公开(公告)号:US5258957A

    公开(公告)日:1993-11-02

    申请号:US849458

    申请日:1992-03-11

    CPC分类号: G11C7/062 G11C7/18

    摘要: In a semiconductor memory device of a divided bit line system, read signals from memory cell blocks are sense-amplified together by a single differential bit line sense amplifier. The bit line sense amplifier includes a plurality of first transistors, the base electrodes of which are connected to local bit lines of the memory cell blocks, the emitter electrodes of which are commonly connected to corresponding main bit lines, and the collector electrodes of which are connected to a first power supply node, a second transistor, which forms a differential pair with each of the first transistors, the base electrode of which is applied with a reference bias potential, and the emitter electrode of which is connected to the main bit lines, a current source connected between the emitter electrode of the second transistor, and a second power supply node, and a load circuit connected between the collector electrode of the second transistor and the first power supply node. The main bit lines with a heavy load can be driven by the emitters having a large driving force, and the outputs from the memory cell blocks can be sensed without going through selectors, thus attaining high-speed read access.

    Semiconductor integrated circuit with improved I/O structure with ECL to
CMOS to ECL conversion
    29.
    发明授权
    Semiconductor integrated circuit with improved I/O structure with ECL to CMOS to ECL conversion 失效
    具有改进的I / O结构的半导体集成电路,具有ECL到CMOS到ECL转换

    公开(公告)号:US5101125A

    公开(公告)日:1992-03-31

    申请号:US511747

    申请日:1990-04-20

    CPC分类号: H03K19/017518

    摘要: A semiconductor integrated circuit includes a bias voltage generating circuit and first- and second-level signal generating circuits. The bias voltage generating circuit includes a bandgap reference circuit for generating a first fixed voltage as a first bias voltage and a second fixed voltage. A second bias voltage is generated on the basis of the second fixed voltage. The second-level signal generating circuit receives a predetermined first-level signal and generates a predetermined second-level signal on the basis of the first and second bias voltages generated by the bias voltage generating circuit. The first-level signal generating circuit receives the predetermined second-level signal and generates the predetermined first-level signal on the basis of the first and second bias voltages generated by the bias voltage generating circuit.

    Full adder circuit having an exclusive-OR circuit
    30.
    发明授权
    Full adder circuit having an exclusive-OR circuit 失效
    全加法电路具有异或电路

    公开(公告)号:US4831579A

    公开(公告)日:1989-05-16

    申请号:US734142

    申请日:1985-05-15

    CPC分类号: G06F7/501 G06F2207/4806

    摘要: A logic operation circuit includes an exclusive-OR circuit for receiving first and second logic sum signals of preceeding stages, a sum signal selection circuit for selectively generating a carry output signal or an inverted signal thereof as a carry output signal in accordance with an output signal from the exclusive-OR circuit, and a carry output signal selection circuit for selectively generating the carry input signal or the first logic sum signal as a sum signal in accordance with the output signal from the exclusive-OR circuit. The exclusive-OR circuit includes a double balance type differential amplifier connected between first and second power source terminals, and the sum signal selection circuit includes a double balance differential amplifier operated in accordance with the output signal from the exclusive-OR circuit and the carry input signal and connected between the first and second power source terminals.

    摘要翻译: 逻辑运算电路包括用于接收前级的第一和第二逻辑和信号的异或电路,和信号选择电路,用于根据输出信号选择性地产生进位输出信号或其反相信号作为进位输出信号 来自异或电路,以及进位输出信号选择电路,用于根据来自异或电路的输出信号选择性地产生进位输入信号或第一逻辑和信号作为和信号。 异或电路包括连接在第一和第二电源端子之间的双平衡型差分放大器,并且和信号选择电路包括根据来自异或电路的输出信号和进位输入端操作的双平衡差分放大器 信号并连接在第一和第二电源端子之间。