公开(公告)号：US5258957A

公开(公告)日：1993-11-02

申请号：US849458

申请日：1992-03-11

申请人： Katsuhiro Seta ,  Hiroyuki Hara ,  Takayasu Sakurai ,  Yoshinori Watanabe

发明人： Katsuhiro Seta ,  Hiroyuki Hara ,  Takayasu Sakurai ,  Yoshinori Watanabe

IPC分类号： G11C11/41 ,  G11C7/06 ,  G11C7/18 ,  G11C11/401 ,  G11C11/414 ,  G11C13/00

CPC分类号： G11C7/062 ,  G11C7/18

摘要： In a semiconductor memory device of a divided bit line system, read signals from memory cell blocks are sense-amplified together by a single differential bit line sense amplifier. The bit line sense amplifier includes a plurality of first transistors, the base electrodes of which are connected to local bit lines of the memory cell blocks, the emitter electrodes of which are commonly connected to corresponding main bit lines, and the collector electrodes of which are connected to a first power supply node, a second transistor, which forms a differential pair with each of the first transistors, the base electrode of which is applied with a reference bias potential, and the emitter electrode of which is connected to the main bit lines, a current source connected between the emitter electrode of the second transistor, and a second power supply node, and a load circuit connected between the collector electrode of the second transistor and the first power supply node. The main bit lines with a heavy load can be driven by the emitters having a large driving force, and the outputs from the memory cell blocks can be sensed without going through selectors, thus attaining high-speed read access.

公开(公告)号：US5444654A

公开(公告)日：1995-08-22

申请号：US201091

申请日：1994-02-24

申请人： Hiroyuki Hara ,  Yoshinori Watanabe

发明人： Hiroyuki Hara ,  Yoshinori Watanabe

IPC分类号： G11C7/10 ,  G11C7/12 ,  G11C17/12 ,  H01L21/82 ,  H01L21/8246 ,  H01L27/10 ,  H01L27/112 ,  H01L27/118 ,  G11C11/34 ,  G11C8/00

CPC分类号： H01L27/11896 ,  G11C17/12 ,  G11C7/1048 ,  G11C7/12

摘要： Disclosed is a semiconductor integrated circuit of a bipolar CMOS gate array type having a plurality of basic cells arranged in a matrix. Each cell comprises MOS transistors as memory cells, a bipolar transistor, a resistance and bit lines, for transferring data stored in the memory cells to the outside. The semiconductor integrated circuit is characterized in that the basic cells are grouped into a plurality of blocks, the bipolar NPN transistor in each block is used as a driver for reading operations of the data stored in the memory cells in each block, and the bit line is kept at a logic state "0" before the reading operations for the memory cells.

摘要翻译： 公开了具有以矩阵形式布置的多个基本单元的双极CMOS门阵列型半导体集成电路。 每个单元包括作为存储单元的MOS晶体管，双极晶体管，电阻和位线，用于将存储在存储单元中的数据传送到外部。 半导体集成电路的特征在于，将基本单元分组为多个块，每个块中的双极性NPN晶体管用作用于读取存储在每个块中的存储单元中的数据的驱动器，并且位线 在存储单元的读取操作之前保持在逻辑状态“0”。

公开(公告)号：US5289405A

公开(公告)日：1994-02-22

申请号：US661020

申请日：1991-02-26

申请人： Hiroyuki Hara ,  Yoshinori Watanabe

发明人： Hiroyuki Hara ,  Yoshinori Watanabe

IPC分类号： H01L27/118 ,  G11C7/06 ,  G11C8/16 ,  G11C11/419 ,  H01L21/82 ,  H01L21/8242 ,  H01L27/10 ,  H01L27/108 ,  G11C7/00

CPC分类号： G11C8/16 ,  G11C11/419 ,  G11C7/067

摘要： A semiconductor memory circuit device having memory cells constructed on a BiCMOS gate array includes amplifying means constituted by a bipolar transistor connected to the output stage of each of memory cells arranged in a matrix form on a semiconductor substrate and formed in a gate array memory cell configuration by use of the Master slice approach. The amplifying means amplifies the potential level of readout data of the memory cell and output the same to an output line, thus enhancing the driving ability of the output line and reducing the whole readout time for reading out data from the memory circuit.

摘要翻译： 具有构造在BiCMOS门阵列上的存储单元的半导体存储器电路器件包括由半导体衬底上以矩阵形式布置的每个存储单元的输出级连接的双极型晶体管构成的放大装置，形成为栅阵列存储单元配置 通过使用主切片方法。 放大装置放大存储单元的读出数据的电位并将其输出到输出线，从而提高输出线的驱动能力，并减少用于从存储器电路读出数据的整个读出时间。

公开(公告)号：US20140244128A1

公开(公告)日：2014-08-28

申请号：US14352911

申请日：2011-10-20

申请人： Yoshinori Watanabe

发明人： Yoshinori Watanabe

IPC分类号： B60T8/1761

CPC分类号： B60T8/1761 ,  B60T8/1755 ,  B60T2270/304

摘要： A vehicle braking control device includes a braking force simultaneous control mode executing unit capable of executing a braking force simultaneous control mode for simultaneously controlling right/left wheels cylinders by a brake hydraulic pressure circuit according to slip ratios of right/left wheels, a braking force independent control mode executing unit capable of executing a braking force independent control mode for independently controlling the right/left wheels cylinders, and a switching controller capable of switching the braking force simultaneous control mode and the braking force independent control mode, wherein the switching controller switches to the braking force independent control mode at the time a slip ratio difference of the right/left rear wheels becomes equal to or less than a preset and predetermined value during switching from the braking force simultaneous control mode to the braking force independent control mode.

摘要翻译： 车辆制动控制装置包括制动力同时控制模式执行单元，该制动力同时控制模式执行单元能够执行制动力同时控制模式，用于通过制动液压回路根据左/右车轮的滑移率同时控制左右车轮气缸，制动力 独立控制模式执行单元，其能够执行用于独立地控制左右轮缸的制动力独立控制模式;以及开关控制器，其能够切换制动力同时控制模式和制动力独立控制模式，其中开关控制器开关 在从制动力同时控制模式切换到制动力独立控制模式期间，左/右后轮的滑差差变为等于或小于预设值的制动力独立控制模式。

公开(公告)号：US20120225657A1

公开(公告)日：2012-09-06

申请号：US13510786

申请日：2010-09-17

申请人： Yoshinori Watanabe ,  Kojiro Hamabe

发明人： Yoshinori Watanabe ,  Kojiro Hamabe

IPC分类号： H04W36/00

CPC分类号： H04W36/0055 ,  H04W24/00 ,  H04W36/0083 ,  H04W36/0088 ,  H04W60/00

摘要： A neighbor cell list optimizing system according to the present invention is a neighbor cell list optimizing system that updates a neighbor cell list that is provided in a base station that manages a cell to which a mobile terminal establishes a connection and to which specific neighbor cells that are candidates of a handover destination cell for said mobile terminal of neighbor cells that are in the vicinity of said cell are registered, comprising: priority computation section that computes priorities of said neighbor cells to be registered to said neighbor cell list based on measurement information that represents radio communication qualities of neighbor cells in which the measured radio communication qualities exceed a threshold; and neighbor cell list updating section that registers neighbor cells in descending order of the priorities up to an upper limit of radio cells that can be registered to said neighbor cell list.

摘要翻译： 根据本发明的相邻小区列表优化系统是相邻小区列表优化系统，其更新在管理移动终端建立连接的小区的基站中提供的相邻小区列表，以及哪个特定相邻小区 是在所述小区附近登记的相邻小区的所述移动终端的切换目的地小区的候选者，包括：优先级计算部，其根据测量信息计算要登记到所述相邻小区列表的所述相邻小区的优先级， 表示测量的无线电通信质量超过阈值的相邻小区的无线电通信质量; 以及相邻小区列表更新部，其将优先级的降序登记到可以登记到所述相邻小区列表的无线电小区的上限的相邻小区。

公开(公告)号：US20120083281A1

公开(公告)日：2012-04-05

申请号：US13319481

申请日：2010-04-14

申请人： Yoshinori Watanabe ,  Yasuhiko Matsunaga

发明人： Yoshinori Watanabe ,  Yasuhiko Matsunaga

IPC分类号： H04W16/24

CPC分类号： H04W24/02 ,  H04B17/26 ,  H04B17/309 ,  H04B17/382 ,  H04W24/10

摘要： A network management system includes: wireless link quality information collection means for collecting, from a mobile terminal that is connected to the mobile communication network, wireless link quality information that indicates wireless link quality measured by the mobile terminal, the wireless link quality information containing information about quality of wireless links between the mobile terminal and two or more wireless cells; coverage evaluation means for evaluating the wireless cell coverage on the basis of wireless link quality information calculated for each of the wireless cells using the wireless link quality information collected by the wireless link quality information collection means; and wireless parameter calculation means for calculating an amount of change in changing for a wireless parameter of a wireless base station on the basis of the result of the evaluation provided by the coverage evaluation means.

摘要翻译： 网络管理系统包括：无线链路质量信息收集装置，用于从连接到移动通信网络的移动终端收集指示由移动终端测量的无线链路质量的无线链路质量信息，所述无线链路质量信息包含信息 关于移动终端与两个或多个无线小区之间的无线链路的质量; 覆盖评估装置，用于使用由无线链路质量信息收集装置收集的无线链路质量信息，基于为每个无线小区计算的无线链路质量信息来评估无线小区覆盖; 以及无线参数计算装置，用于根据由覆盖评估装置提供的评估结果来计算无线基站的无线参数的变化量的变化量。

公开(公告)号：US20110250612A1

公开(公告)日：2011-10-13

申请号：US13150312

申请日：2011-06-01

申请人： Yoshinori Watanabe

发明人： Yoshinori Watanabe

IPC分类号： C12Q1/68

CPC分类号： C07K14/47 ,  C07K14/39

摘要： The present invention is to provide meiosis-specific novel kinetochore protein Sgo1 (shugoshin) derived from fission yeast Schizosaccharomyces pombe, and a homologue or paralogue thereof having a regulatory activity of chromosome segregation; and DNAs encoding them; as a factor ensuring the retention of unidirection and cohesion in sister centromere at meiosis I in cooperation with cohesin. To elucidate the proteins protecting Rec8 during anaphase, the present inventor screened in fission yeast genes for a gene that inhibits mitotic growth and prevents sister chromatid from the separation at anaphase, when co-expressed with Rec8. In this approach, meiosis-specific protein Sgo1 that protects (Shugo) centromeric Rec8 from the degradation at anaphase I was indentified. Further, a budding yeast Sgo1 homologue and a fission yeast mitotic paralogue Sgo2 were identified.

摘要翻译： 本发明是提供衍生自裂殖酵母裂殖酵母菌的减数分裂特异性新型动粒蛋白Sgo1（shugoshin）及其具有染色体分离调节活性的同源物或旁系同源物; 和编码它们的DNA; 作为确保在减数分裂的姐妹着丝粒中保持单方向和凝聚力的一个因素，我与cohesin合作。 为了阐明在后期期间保护Rec8的蛋白质，当与Rec8共表达时，本发明人在裂殖酵母基因中筛选了抑制有丝分裂生长的基因并且在后期分离期间避免姐妹染色单体分离。 在这种方法中，鉴定了在后期I保护（Shugo）着丝粒Rec8免于降解的减数分裂特异性蛋白Sgo1。 此外，鉴定了出芽的酵母Sgo1同源物和裂殖酵母有丝分裂旁系同源物Sgo2。

公开(公告)号：US07903843B2

公开(公告)日：2011-03-08

申请号：US11727602

申请日：2007-03-27

申请人： Masaru Sawaki ,  Masatoshi Aboh ,  Takemi Ueno ,  Yoshinori Watanabe ,  Hidehiko Kawakami

发明人： Masaru Sawaki ,  Masatoshi Aboh ,  Takemi Ueno ,  Yoshinori Watanabe ,  Hidehiko Kawakami

IPC分类号： G06K9/00 ,  G08G1/16

CPC分类号： G08G1/168 ,  G08G1/161

摘要： An image processing apparatus uses a bird's eye image for supporting a backing operation of a vehicle for parking. The bird's eye image is processed to display an area view that at least includes a parking lot captured in the image. Then, the area view is displayed in a display space in a display unit of the image processing apparatus for representing a parking area and related information. In this manner, the area view excludes unnecessary part from the bird's eye image for effectively providing a visual support for the backing operation by a driver of the vehicle.

摘要翻译： 图像处理装置使用鸟瞰图来支持用于停车的车辆的后备操作。 处理鸟瞰图像以显示至少包括在图像中捕获的停车场的区域视图。 然后，在用于表示停车区域和相关信息的图像处理装置的显示单元的显示空间中显示区域视图。 以这种方式，区域视图从鸟瞰图中排除了不必要的部分，以有效地为车辆的驾驶员提供用于后背操作的视觉支撑。

公开(公告)号：US07869797B2

公开(公告)日：2011-01-11

申请号：US11726243

申请日：2007-03-21

申请人： Tetsujiro Kondo ,  Yoshinori Watanabe

发明人： Tetsujiro Kondo ,  Yoshinori Watanabe

IPC分类号： H04M3/42

CPC分类号： H04N21/4728 ,  G06Q30/06 ,  H04M15/68 ,  H04M2215/0196 ,  H04N7/17309 ,  H04N7/17318 ,  H04N19/105 ,  H04N19/12 ,  H04N19/154 ,  H04N19/162 ,  H04N19/17 ,  H04N19/23 ,  H04N19/30 ,  H04N19/503 ,  H04N19/593 ,  H04N19/63 ,  H04N19/70 ,  H04N21/234327 ,  H04N21/234345 ,  H04N21/234354 ,  H04N21/234381 ,  H04N21/23805 ,  H04N21/2402 ,  H04N21/2405 ,  H04N21/2543 ,  H04N21/25435 ,  H04N21/2662 ,  H04N21/41407 ,  H04N21/4223 ,  H04N21/4316 ,  H04N21/6377 ,  H04N21/658

摘要： A communication system for providing data corresponding to a request from a user and charging the user for the data provided, when the user designates a result of a desired operation A usage management unit selects a processor, corresponding to the user's designation, which effect operations corresponding to a plurality of different algorithms, respectively. When the processor corresponding to the designation is selected, an algorithm processor makes an operation corresponding to the designation. A management center charges the user for the use of the algorithm.

摘要翻译： 一种通信系统，用于当用户指定所需操作的结果时，提供对应于来自用户的请求的数据并向用户计费用户。使用管理单元根据用户的指定选择对应于该用户的指定的处理器 分别到多个不同的算法。 当选择与该指定对应的处理器时，算法处理器进行与该指定相对应的操作。 管理中心向用户收取使用算法的费用。

公开(公告)号：US07860321B2

公开(公告)日：2010-12-28

申请号：US11231838

申请日：2005-09-21

申请人： Yoshinori Watanabe ,  Hideyuki Rengakuji

发明人： Yoshinori Watanabe ,  Hideyuki Rengakuji

IPC分类号： G06K9/36 ,  H04N7/01

CPC分类号： H04N5/232 ,  H04N5/772

摘要： A rate conversion unit determines a frame thinning-out rate to thin out frames on the basis of a recording rate at the time of photographing and a display rate for display on a display apparatus so that a temporal updating interval of a video image between continuous fields becomes constant. After that, a frame is repeatedly inserted so that a frame rate becomes equal to the display rate.

摘要翻译： 速率转换单元基于拍摄时的记录速率和用于在显示装置上显示的显示速率来确定缩小帧的帧缩小率，使得连续场之间的视频图像的时间更新间隔 变得不变。 之后，重复插入一帧，使得帧速率等于显示速率。